mirror of
https://github.com/pConst/basic_verilog.git
synced 2025-01-28 07:02:55 +08:00
4 lines
230 B
Bash
4 lines
230 B
Bash
quartus_map --family=stratixii --optimize=speed carry_and_speed_test | tee q.log
|
|
quartus_fit --fmax=1ghz carry_and_speed_test | tee f.log
|
|
quartus_tan carry_and_speed_test | tee t.log
|
|
grep "Longest register to register delay" t.log |