mirror of
https://github.com/pConst/basic_verilog.git
synced 2025-01-28 07:02:55 +08:00
24 lines
1.2 KiB
Plaintext
24 lines
1.2 KiB
Plaintext
|
|
set_global_assignment -name FAMILY "Cyclone V"
|
|
set_global_assignment -name DEVICE 5CGXFC4C7F27C8
|
|
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
|
|
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
|
|
|
|
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY OUTPUT
|
|
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
|
|
set_global_assignment -name TOP_LEVEL_ENTITY main
|
|
|
|
|
|
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
|
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
|
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
|
set_global_assignment -name SYSTEMVERILOG_FILE main.sv
|
|
set_global_assignment -name SYSTEMVERILOG_FILE clk_divider.sv
|
|
set_global_assignment -name SDC_FILE main.sdc
|
|
|
|
|
|
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
|
|
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
|
|
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
|
|
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
|
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top |