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basic_verilog/gitignores/.gitignore_vivado
2024-05-28 10:28:40 +03:00

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#------------------------------------------------------------------------------
# .gitignore for Xilinx Vivado
# published as part of https://github.com/pConst/basic_verilog
# Konstantin Pavlov, pavlovconst@gmail.com
#------------------------------------------------------------------------------
# INFO ------------------------------------------------------------------------
# rename the file to ".gitignore" and place into your Vivado project directory
#
*.cache
*.hw
*.gen
*.ip_user_files
*.runs
*.sim
.Xil
.ioplanning
*.jou
*.log
*.str
*.tmp
usage_statistics_webtalk.*
*.xsa