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1034 lines
50 KiB
Plaintext
1034 lines
50 KiB
Plaintext
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# I/O constraints for the BittWare 520N-MX FPGA development board
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# part: 1SM21CHU2F53E2VG
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set_global_assignment -name USE_CONF_DONE SDM_IO16
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set_global_assignment -name USE_INIT_DONE SDM_IO0
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set_global_assignment -name USE_PWRMGT_SCL SDM_IO14
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set_global_assignment -name USE_PWRMGT_SDA SDM_IO11
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set_global_assignment -name USE_PWRMGT_ALERT SDM_IO12
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set_global_assignment -name PWRMGT_DEVICE_ADDRESS_IN_PMBUS_SLAVE_MODE 01
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set_global_assignment -name VID_OPERATION_MODE "PMBUS SLAVE"
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
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set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION ON
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set_global_assignment -name DEVICE_INITIALIZATION_CLOCK OSC_CLK_1_125MHZ
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set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "AVST X16"
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set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_100MHZ
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set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 1.8V
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set_global_assignment -name USE_CHECKSUM_AS_USERCODE ON
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name ENABLE_ED_CRC_CHECK ON
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name MINIMUM_SEU_INTERVAL 0
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set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON
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# Clock and reset
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set_location_assignment PIN_BB20 -to "config_clk"
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set_location_assignment PIN_BE17 -to "usr_refclk0"
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set_location_assignment PIN_BD17 -to "usr_refclk0(n)"
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set_location_assignment PIN_A24 -to "usr_refclk1"
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set_location_assignment PIN_B23 -to "usr_refclk1(n)"
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set_location_assignment PIN_AW31 -to "mem0_refclk"
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set_location_assignment PIN_AY31 -to "mem0_refclk(n)"
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set_location_assignment PIN_A42 -to "mem1_refclk"
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set_location_assignment PIN_B41 -to "mem1_refclk(n)"
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set_location_assignment PIN_AU31 -to "esram_0_refclk"
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set_location_assignment PIN_AU32 -to "esram_0_refclk(n)"
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set_location_assignment PIN_V31 -to "esram_1_refclk"
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set_location_assignment PIN_U31 -to "esram_1_refclk(n)"
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set_location_assignment PIN_AR26 -to "hbm_bottom_refclk"
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set_location_assignment PIN_AP26 -to "hbm_bottom_refclk(n)"
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set_location_assignment PIN_P27 -to "hbm_top_refclk"
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set_location_assignment PIN_R27 -to "hbm_top_refclk(n)"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "config_clk"
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set_instance_assignment -name IO_STANDARD LVDS -to "usr_refclk0"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "usr_refclk0"
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set_instance_assignment -name IO_STANDARD LVDS -to "usr_refclk1"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "usr_refclk1"
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set_instance_assignment -name IO_STANDARD LVDS -to "esram_0_refclk"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "esram_0_refclk"
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set_instance_assignment -name IO_STANDARD LVDS -to "esram_1_refclk"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "esram_1_refclk"
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set_instance_assignment -name IO_STANDARD LVDS -to "hbm_bottom_refclk"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "hbm_bottom_refclk"
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set_instance_assignment -name IO_STANDARD LVDS -to "hbm_top_refclk"
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set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to "hbm_top_refclk"
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# LEDs
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set_location_assignment PIN_AA39 -to "led_user_grn[0]"
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set_location_assignment PIN_AL38 -to "led_user_grn[1]"
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set_location_assignment PIN_AA38 -to "led_user_red[0]"
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set_location_assignment PIN_AL39 -to "led_user_red[1]"
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set_location_assignment PIN_AH39 -to "led_qsfp[0]"
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set_location_assignment PIN_AJ39 -to "led_qsfp[1]"
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set_location_assignment PIN_AK39 -to "led_qsfp[2]"
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set_location_assignment PIN_AM38 -to "led_qsfp[3]"
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set_instance_assignment -name USE_AS_3V_GPIO ON -to "led_user_red[*]"
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set_instance_assignment -name USE_AS_3V_GPIO ON -to "led_user_grn[*]"
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set_instance_assignment -name USE_AS_3V_GPIO ON -to "led_qsfp[*]"
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set_instance_assignment -name IO_STANDARD "2.5 V" -to "led_user_red[*]"
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set_instance_assignment -name IO_STANDARD "2.5 V" -to "led_user_grn[*]"
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set_instance_assignment -name IO_STANDARD "2.5 V" -to "led_qsfp[*]"
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# UART
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set_location_assignment PIN_BD12 -to "uart_tx"
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set_location_assignment PIN_BE12 -to "uart_rx"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "uart_tx"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "uart_rx"
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# I2C
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set_location_assignment PIN_BJ17 -to "fpga_i2c_sda"
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set_location_assignment PIN_BJ18 -to "fpga_i2c_scl"
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set_location_assignment PIN_BK17 -to "fpga_i2c_req_l"
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set_location_assignment PIN_BK16 -to "fpga_i2c_mux_gnt"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_i2c_sda"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_i2c_scl"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_i2c_req_l"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_i2c_mux_gnt"
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# BMC SPI
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set_location_assignment PIN_BK15 -to "bmc_spi_mosi"
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set_location_assignment PIN_BF18 -to "bmc_spi_nss"
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set_location_assignment PIN_BF19 -to "bmc_spi_sclk"
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set_location_assignment PIN_BL15 -to "bmc_spi_miso"
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set_location_assignment PIN_BH20 -to "bmc_irq"
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set_location_assignment PIN_BH19 -to "fpga_gpio_1"
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set_location_assignment PIN_BG20 -to "fpga_rst_n"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "bmc_spi_mosi"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "bmc_spi_nss"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "bmc_spi_sclk"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "bmc_spi_miso"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "bmc_irq"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_gpio_1"
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set_instance_assignment -name IO_STANDARD "1.8 V" -to "fpga_rst_n"
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# PCIe banks 1K 1L 1M
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set_location_assignment PIN_AE51 -to "pcie_tx[0]"
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set_location_assignment PIN_AE50 -to "pcie_tx[0](n)"
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set_location_assignment PIN_AC47 -to "pcie_rx[0]"
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set_location_assignment PIN_AC46 -to "pcie_rx[0](n)"
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set_location_assignment PIN_AD49 -to "pcie_tx[1]"
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set_location_assignment PIN_AD48 -to "pcie_tx[1](n)"
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set_location_assignment PIN_AD45 -to "pcie_rx[1]"
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set_location_assignment PIN_AD44 -to "pcie_rx[1](n)"
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set_location_assignment PIN_AC51 -to "pcie_tx[2]"
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set_location_assignment PIN_AC50 -to "pcie_tx[2](n)"
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set_location_assignment PIN_AA47 -to "pcie_rx[2]"
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set_location_assignment PIN_AA46 -to "pcie_rx[2](n)"
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set_location_assignment PIN_AB49 -to "pcie_tx[3]"
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set_location_assignment PIN_AB48 -to "pcie_tx[3](n)"
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set_location_assignment PIN_AB45 -to "pcie_rx[3]"
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set_location_assignment PIN_AB44 -to "pcie_rx[3](n)"
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set_location_assignment PIN_AA51 -to "pcie_tx[4]"
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set_location_assignment PIN_AA50 -to "pcie_tx[4](n)"
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set_location_assignment PIN_W47 -to "pcie_rx[4]"
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set_location_assignment PIN_W46 -to "pcie_rx[4](n)"
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set_location_assignment PIN_Y49 -to "pcie_tx[5]"
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set_location_assignment PIN_Y48 -to "pcie_tx[5](n)"
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set_location_assignment PIN_Y45 -to "pcie_rx[5]"
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set_location_assignment PIN_Y44 -to "pcie_rx[5](n)"
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set_location_assignment PIN_W51 -to "pcie_tx[6]"
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set_location_assignment PIN_W50 -to "pcie_tx[6](n)"
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set_location_assignment PIN_U47 -to "pcie_rx[6]"
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set_location_assignment PIN_U46 -to "pcie_rx[6](n)"
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set_location_assignment PIN_V49 -to "pcie_tx[7]"
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set_location_assignment PIN_V48 -to "pcie_tx[7](n)"
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set_location_assignment PIN_V45 -to "pcie_rx[7]"
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set_location_assignment PIN_V44 -to "pcie_rx[7](n)"
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set_location_assignment PIN_U51 -to "pcie_tx[8]"
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set_location_assignment PIN_U50 -to "pcie_tx[8](n)"
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set_location_assignment PIN_R47 -to "pcie_rx[8]"
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set_location_assignment PIN_R46 -to "pcie_rx[8](n)"
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set_location_assignment PIN_T49 -to "pcie_tx[9]"
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set_location_assignment PIN_T48 -to "pcie_tx[9](n)"
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set_location_assignment PIN_T45 -to "pcie_rx[9]"
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set_location_assignment PIN_T44 -to "pcie_rx[9](n)"
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set_location_assignment PIN_R51 -to "pcie_tx[10]"
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set_location_assignment PIN_R50 -to "pcie_tx[10](n)"
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set_location_assignment PIN_N47 -to "pcie_rx[10]"
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set_location_assignment PIN_N46 -to "pcie_rx[10](n)"
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set_location_assignment PIN_P49 -to "pcie_tx[11]"
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set_location_assignment PIN_P48 -to "pcie_tx[11](n)"
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set_location_assignment PIN_P45 -to "pcie_rx[11]"
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set_location_assignment PIN_P44 -to "pcie_rx[11](n)"
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set_location_assignment PIN_N51 -to "pcie_tx[12]"
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set_location_assignment PIN_N50 -to "pcie_tx[12](n)"
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set_location_assignment PIN_L47 -to "pcie_rx[12]"
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set_location_assignment PIN_L46 -to "pcie_rx[12](n)"
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set_location_assignment PIN_M49 -to "pcie_tx[13]"
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set_location_assignment PIN_M48 -to "pcie_tx[13](n)"
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set_location_assignment PIN_M45 -to "pcie_rx[13]"
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set_location_assignment PIN_M44 -to "pcie_rx[13](n)"
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set_location_assignment PIN_L51 -to "pcie_tx[14]"
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set_location_assignment PIN_L50 -to "pcie_tx[14](n)"
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set_location_assignment PIN_J47 -to "pcie_rx[14]"
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set_location_assignment PIN_J46 -to "pcie_rx[14](n)"
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set_location_assignment PIN_K49 -to "pcie_tx[15]"
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set_location_assignment PIN_K48 -to "pcie_tx[15](n)"
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set_location_assignment PIN_K45 -to "pcie_rx[15]"
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set_location_assignment PIN_K44 -to "pcie_rx[15](n)"
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set_location_assignment PIN_AC43 -to "pcie_refclk"
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set_location_assignment PIN_AC42 -to "pcie_refclk(n)"
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set_location_assignment PIN_Y39 -to "pcie_perstn"
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set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "pcie_tx[*]"
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set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "pcie_rx[*]"
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_tx[*]"
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "pcie_rx[*]"
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set_instance_assignment -name IO_STANDARD "HCSL" -to "pcie_refclk"
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set_instance_assignment -name USE_AS_3V_GPIO ON -to "pcie_perstn"
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set_instance_assignment -name IO_STANDARD "2.5 V" -to "pcie_perstn"
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# QSFP
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# QSFP0 (bank 1D)
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set_location_assignment PIN_BD49 -to "qsfp0_tx[0]"
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set_location_assignment PIN_BD48 -to "qsfp0_tx[0](n)"
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set_location_assignment PIN_BB45 -to "qsfp0_rx[0]"
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set_location_assignment PIN_BB44 -to "qsfp0_rx[0](n)"
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set_location_assignment PIN_BC51 -to "qsfp0_tx[1]"
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set_location_assignment PIN_BC50 -to "qsfp0_tx[1](n)"
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set_location_assignment PIN_BC47 -to "qsfp0_rx[1]"
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set_location_assignment PIN_BC46 -to "qsfp0_rx[1](n)"
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set_location_assignment PIN_BA51 -to "qsfp0_tx[2]"
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set_location_assignment PIN_BA50 -to "qsfp0_tx[2](n)"
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set_location_assignment PIN_AY45 -to "qsfp0_rx[2]"
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set_location_assignment PIN_AY44 -to "qsfp0_rx[2](n)"
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set_location_assignment PIN_AY49 -to "qsfp0_tx[3]"
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set_location_assignment PIN_AY48 -to "qsfp0_tx[3](n)"
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set_location_assignment PIN_AW47 -to "qsfp0_rx[3]"
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set_location_assignment PIN_AW46 -to "qsfp0_rx[3](n)"
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set_location_assignment PIN_AU43 -to "qsfp0_refclk"
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set_location_assignment PIN_AU42 -to "qsfp0_refclk(n)"
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set_location_assignment PIN_AR43 -to "qsfp0_rcvrd_refclk"
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set_location_assignment PIN_AR42 -to "qsfp0_rcvrd_refclk(n)"
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set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp0_tx[*]"
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set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp0_rx[*]"
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp0_tx[*]"
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set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp0_rx[*]"
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set_instance_assignment -name IO_STANDARD LVDS -to "qsfp0_refclk"
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set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp0_refclk"
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set_instance_assignment -name IO_STANDARD LVDS -to "qsfp0_rcvrd_refclk"
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set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp0_rcvrd_refclk"
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# QSFP1 (bank 1E)
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set_location_assignment PIN_AV49 -to "qsfp1_tx[0]"
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|
|
set_location_assignment PIN_AV48 -to "qsfp1_tx[0](n)"
|
||
|
|
set_location_assignment PIN_AU47 -to "qsfp1_rx[0]"
|
||
|
|
set_location_assignment PIN_AU46 -to "qsfp1_rx[0](n)"
|
||
|
|
set_location_assignment PIN_AU51 -to "qsfp1_tx[1]"
|
||
|
|
set_location_assignment PIN_AU50 -to "qsfp1_tx[1](n)"
|
||
|
|
set_location_assignment PIN_AT45 -to "qsfp1_rx[1]"
|
||
|
|
set_location_assignment PIN_AT44 -to "qsfp1_rx[1](n)"
|
||
|
|
set_location_assignment PIN_AR51 -to "qsfp1_tx[2]"
|
||
|
|
set_location_assignment PIN_AR50 -to "qsfp1_tx[2](n)"
|
||
|
|
set_location_assignment PIN_AP45 -to "qsfp1_rx[2]"
|
||
|
|
set_location_assignment PIN_AP44 -to "qsfp1_rx[2](n)"
|
||
|
|
set_location_assignment PIN_AM49 -to "qsfp1_tx[3]"
|
||
|
|
set_location_assignment PIN_AM48 -to "qsfp1_tx[3](n)"
|
||
|
|
set_location_assignment PIN_AL47 -to "qsfp1_rx[3]"
|
||
|
|
set_location_assignment PIN_AL46 -to "qsfp1_rx[3](n)"
|
||
|
|
set_location_assignment PIN_AN43 -to "qsfp1_refclk"
|
||
|
|
set_location_assignment PIN_AN42 -to "qsfp1_refclk(n)"
|
||
|
|
set_location_assignment PIN_AL43 -to "qsfp1_rcvrd_refclk"
|
||
|
|
set_location_assignment PIN_AL42 -to "qsfp1_rcvrd_refclk(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp1_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp1_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp1_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp1_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp1_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp1_refclk"
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp1_rcvrd_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp1_rcvrd_refclk"
|
||
|
|
|
||
|
|
# QSFP2 (bank 1F, hard 100G MAC)
|
||
|
|
set_location_assignment PIN_AN51 -to "qsfp2_tx[0]"
|
||
|
|
set_location_assignment PIN_AN50 -to "qsfp2_tx[0](n)"
|
||
|
|
set_location_assignment PIN_AM45 -to "qsfp2_rx[0]"
|
||
|
|
set_location_assignment PIN_AM44 -to "qsfp2_rx[0](n)"
|
||
|
|
set_location_assignment PIN_AL51 -to "qsfp2_tx[1]"
|
||
|
|
set_location_assignment PIN_AL50 -to "qsfp2_tx[1](n)"
|
||
|
|
set_location_assignment PIN_AK45 -to "qsfp2_rx[1]"
|
||
|
|
set_location_assignment PIN_AK44 -to "qsfp2_rx[1](n)"
|
||
|
|
set_location_assignment PIN_AJ51 -to "qsfp2_tx[2]"
|
||
|
|
set_location_assignment PIN_AJ50 -to "qsfp2_tx[2](n)"
|
||
|
|
set_location_assignment PIN_AH45 -to "qsfp2_rx[2]"
|
||
|
|
set_location_assignment PIN_AH44 -to "qsfp2_rx[2](n)"
|
||
|
|
set_location_assignment PIN_AG51 -to "qsfp2_tx[3]"
|
||
|
|
set_location_assignment PIN_AG50 -to "qsfp2_tx[3](n)"
|
||
|
|
set_location_assignment PIN_AF45 -to "qsfp2_rx[3]"
|
||
|
|
set_location_assignment PIN_AF44 -to "qsfp2_rx[3](n)"
|
||
|
|
set_location_assignment PIN_AJ43 -to "qsfp2_refclk"
|
||
|
|
set_location_assignment PIN_AJ42 -to "qsfp2_refclk(n)"
|
||
|
|
set_location_assignment PIN_AG43 -to "qsfp2_rcvrd_refclk"
|
||
|
|
set_location_assignment PIN_AG42 -to "qsfp2_rcvrd_refclk(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp2_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp2_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp2_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp2_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp2_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp2_refclk"
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp2_rcvrd_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp2_rcvrd_refclk"
|
||
|
|
|
||
|
|
# QSFP3 (bank 1N, hard 100G MAC)
|
||
|
|
set_location_assignment PIN_J51 -to "qsfp3_tx[0]"
|
||
|
|
set_location_assignment PIN_J50 -to "qsfp3_tx[0](n)"
|
||
|
|
set_location_assignment PIN_H45 -to "qsfp3_rx[0]"
|
||
|
|
set_location_assignment PIN_H44 -to "qsfp3_rx[0](n)"
|
||
|
|
set_location_assignment PIN_G51 -to "qsfp3_tx[1]"
|
||
|
|
set_location_assignment PIN_G50 -to "qsfp3_tx[1](n)"
|
||
|
|
set_location_assignment PIN_F45 -to "qsfp3_rx[1]"
|
||
|
|
set_location_assignment PIN_F44 -to "qsfp3_rx[1](n)"
|
||
|
|
set_location_assignment PIN_E51 -to "qsfp3_tx[2]"
|
||
|
|
set_location_assignment PIN_D51 -to "qsfp3_tx[2](n)"
|
||
|
|
set_location_assignment PIN_D45 -to "qsfp3_rx[2]"
|
||
|
|
set_location_assignment PIN_D44 -to "qsfp3_rx[2](n)"
|
||
|
|
set_location_assignment PIN_C50 -to "qsfp3_tx[3]"
|
||
|
|
set_location_assignment PIN_B50 -to "qsfp3_tx[3](n)"
|
||
|
|
set_location_assignment PIN_B44 -to "qsfp3_rx[3]"
|
||
|
|
set_location_assignment PIN_A44 -to "qsfp3_rx[3](n)"
|
||
|
|
set_location_assignment PIN_N43 -to "qsfp3_refclk"
|
||
|
|
set_location_assignment PIN_N42 -to "qsfp3_refclk(n)"
|
||
|
|
set_location_assignment PIN_L43 -to "qsfp3_rcvrd_refclk"
|
||
|
|
set_location_assignment PIN_L42 -to "qsfp3_rcvrd_refclk(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp3_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "qsfp3_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp3_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "qsfp3_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp3_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp3_refclk"
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "qsfp3_rcvrd_refclk"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "qsfp3_rcvrd_refclk"
|
||
|
|
|
||
|
|
set_location_assignment PIN_H19 -to "qsfp_irq_n[0]"
|
||
|
|
set_location_assignment PIN_H18 -to "qsfp_irq_n[1]"
|
||
|
|
set_location_assignment PIN_A22 -to "qsfp_irq_n[2]"
|
||
|
|
set_location_assignment PIN_C23 -to "qsfp_irq_n[3]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "qsfp_irq_n[*]"
|
||
|
|
|
||
|
|
# OCuLink
|
||
|
|
|
||
|
|
# OCuLink 0 (J26, PCIe, banks 4C, 4D)
|
||
|
|
set_location_assignment PIN_BL5 -to "oc0_tx[0]"
|
||
|
|
set_location_assignment PIN_BL6 -to "oc0_tx[0](n)"
|
||
|
|
set_location_assignment PIN_BH7 -to "oc0_rx[0]"
|
||
|
|
set_location_assignment PIN_BH8 -to "oc0_rx[0](n)"
|
||
|
|
set_location_assignment PIN_BK3 -to "oc0_tx[1]"
|
||
|
|
set_location_assignment PIN_BK4 -to "oc0_tx[1](n)"
|
||
|
|
set_location_assignment PIN_BJ5 -to "oc0_rx[1]"
|
||
|
|
set_location_assignment PIN_BJ6 -to "oc0_rx[1](n)"
|
||
|
|
set_location_assignment PIN_BH3 -to "oc0_tx[2]"
|
||
|
|
set_location_assignment PIN_BH4 -to "oc0_tx[2](n)"
|
||
|
|
set_location_assignment PIN_BG5 -to "oc0_rx[2]"
|
||
|
|
set_location_assignment PIN_BG6 -to "oc0_rx[2](n)"
|
||
|
|
set_location_assignment PIN_BG1 -to "oc0_tx[3]"
|
||
|
|
set_location_assignment PIN_BG2 -to "oc0_tx[3](n)"
|
||
|
|
set_location_assignment PIN_BF7 -to "oc0_rx[3]"
|
||
|
|
set_location_assignment PIN_BF8 -to "oc0_rx[3](n)"
|
||
|
|
set_location_assignment PIN_BF3 -to "oc0_tx[4]"
|
||
|
|
set_location_assignment PIN_BF4 -to "oc0_tx[4](n)"
|
||
|
|
set_location_assignment PIN_BE5 -to "oc0_rx[4]"
|
||
|
|
set_location_assignment PIN_BE6 -to "oc0_rx[4](n)"
|
||
|
|
set_location_assignment PIN_BE1 -to "oc0_tx[5]"
|
||
|
|
set_location_assignment PIN_BE2 -to "oc0_tx[5](n)"
|
||
|
|
set_location_assignment PIN_BD7 -to "oc0_rx[5]"
|
||
|
|
set_location_assignment PIN_BD8 -to "oc0_rx[5](n)"
|
||
|
|
set_location_assignment PIN_BD3 -to "oc0_tx[6]"
|
||
|
|
set_location_assignment PIN_BD4 -to "oc0_tx[6](n)"
|
||
|
|
set_location_assignment PIN_BB7 -to "oc0_rx[6]"
|
||
|
|
set_location_assignment PIN_BB8 -to "oc0_rx[6](n)"
|
||
|
|
set_location_assignment PIN_BC1 -to "oc0_tx[7]"
|
||
|
|
set_location_assignment PIN_BC2 -to "oc0_tx[7](n)"
|
||
|
|
set_location_assignment PIN_BC5 -to "oc0_rx[7]"
|
||
|
|
set_location_assignment PIN_BC6 -to "oc0_rx[7](n)"
|
||
|
|
set_location_assignment PIN_AW9 -to "oc0_refclk_1"
|
||
|
|
set_location_assignment PIN_AW10 -to "oc0_refclk_1(n)"
|
||
|
|
set_location_assignment PIN_BA9 -to "oc0_refclk_2"
|
||
|
|
set_location_assignment PIN_BA10 -to "oc0_refclk_2(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc0_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc0_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc0_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc0_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HCSL" -to "oc0_refclk_1"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HCSL" -to "oc0_refclk_2"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BL10 -to "oc0_gpio[0]"
|
||
|
|
set_location_assignment PIN_BH10 -to "oc0_gpio[1]"
|
||
|
|
set_location_assignment PIN_BG10 -to "oc0_gpio[2]"
|
||
|
|
set_location_assignment PIN_BF10 -to "oc0_gpio[3]"
|
||
|
|
set_location_assignment PIN_AT15 -to "oc0_gpio[4]"
|
||
|
|
set_location_assignment PIN_AR15 -to "oc0_gpio[5]"
|
||
|
|
set_location_assignment PIN_AV15 -to "oc0_gpio[6]"
|
||
|
|
set_location_assignment PIN_AU15 -to "oc0_gpio[7]"
|
||
|
|
set_location_assignment PIN_AW14 -to "oc0_gpio[8]"
|
||
|
|
set_location_assignment PIN_AV14 -to "oc0_gpio[9]"
|
||
|
|
set_location_assignment PIN_AY14 -to "oc0_gpio[10]"
|
||
|
|
set_location_assignment PIN_BA14 -to "oc0_gpio[11]"
|
||
|
|
set_location_assignment PIN_BB15 -to "oc0_gpio[12]"
|
||
|
|
set_location_assignment PIN_BA15 -to "oc0_gpio[13]"
|
||
|
|
set_location_assignment PIN_BC14 -to "oc0_gpio[14]"
|
||
|
|
set_location_assignment PIN_BC15 -to "oc0_gpio[15]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BE10 -to "oc0_gpio_dir[0]"
|
||
|
|
set_location_assignment PIN_BD10 -to "oc0_gpio_dir[1]"
|
||
|
|
set_location_assignment PIN_BC10 -to "oc0_gpio_dir[2]"
|
||
|
|
set_location_assignment PIN_AP39 -to "oc0_gpio_dir[3]"
|
||
|
|
set_location_assignment PIN_BF14 -to "oc0_gpio_dir[4]"
|
||
|
|
set_location_assignment PIN_BF13 -to "oc0_gpio_dir[5]"
|
||
|
|
set_location_assignment PIN_BH13 -to "oc0_gpio_dir[6]"
|
||
|
|
set_location_assignment PIN_BG13 -to "oc0_gpio_dir[7]"
|
||
|
|
set_location_assignment PIN_BJ13 -to "oc0_gpio_dir[8]"
|
||
|
|
set_location_assignment PIN_BJ12 -to "oc0_gpio_dir[9]"
|
||
|
|
set_location_assignment PIN_BJ14 -to "oc0_gpio_dir[10]"
|
||
|
|
set_location_assignment PIN_BK14 -to "oc0_gpio_dir[11]"
|
||
|
|
set_location_assignment PIN_BL14 -to "oc0_gpio_dir[12]"
|
||
|
|
set_location_assignment PIN_BL13 -to "oc0_gpio_dir[13]"
|
||
|
|
set_location_assignment PIN_AU17 -to "oc0_gpio_dir[14]"
|
||
|
|
set_location_assignment PIN_AU16 -to "oc0_gpio_dir[15]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_AW17 -to "oc0_buff_en_n[0]"
|
||
|
|
set_location_assignment PIN_AY17 -to "oc0_buff_en_n[1]"
|
||
|
|
set_location_assignment PIN_AW16 -to "oc0_buff_en_n[2]"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio[0]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio[1]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio[2]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio[3]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio[0]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio[1]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio[2]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio[3]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[4]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[5]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[6]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[7]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[8]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[9]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[10]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[11]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[12]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[13]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[14]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio[15]"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio_dir[0]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio_dir[1]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio_dir[2]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc0_gpio_dir[3]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio_dir[0]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio_dir[1]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio_dir[2]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc0_gpio_dir[3]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[4]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[5]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[6]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[7]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[8]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[9]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[10]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[11]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[12]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[13]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[14]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_gpio_dir[15]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc0_buff_en_n[*]"
|
||
|
|
|
||
|
|
# OCuLink 1 (J27, PCIe, banks 4K, 4L)
|
||
|
|
set_location_assignment PIN_AF3 -to "oc1_tx[0]"
|
||
|
|
set_location_assignment PIN_AF4 -to "oc1_tx[0](n)"
|
||
|
|
set_location_assignment PIN_AE5 -to "oc1_rx[0]"
|
||
|
|
set_location_assignment PIN_AE6 -to "oc1_rx[0](n)"
|
||
|
|
set_location_assignment PIN_AE1 -to "oc1_tx[1]"
|
||
|
|
set_location_assignment PIN_AE2 -to "oc1_tx[1](n)"
|
||
|
|
set_location_assignment PIN_AD7 -to "oc1_rx[1]"
|
||
|
|
set_location_assignment PIN_AD8 -to "oc1_rx[1](n)"
|
||
|
|
set_location_assignment PIN_AD3 -to "oc1_tx[2]"
|
||
|
|
set_location_assignment PIN_AD4 -to "oc1_tx[2](n)"
|
||
|
|
set_location_assignment PIN_AC5 -to "oc1_rx[2]"
|
||
|
|
set_location_assignment PIN_AC6 -to "oc1_rx[2](n)"
|
||
|
|
set_location_assignment PIN_AC1 -to "oc1_tx[3]"
|
||
|
|
set_location_assignment PIN_AC2 -to "oc1_tx[3](n)"
|
||
|
|
set_location_assignment PIN_AB7 -to "oc1_rx[3]"
|
||
|
|
set_location_assignment PIN_AB8 -to "oc1_rx[3](n)"
|
||
|
|
set_location_assignment PIN_AB3 -to "oc1_tx[4]"
|
||
|
|
set_location_assignment PIN_AB4 -to "oc1_tx[4](n)"
|
||
|
|
set_location_assignment PIN_AA5 -to "oc1_rx[4]"
|
||
|
|
set_location_assignment PIN_AA6 -to "oc1_rx[4](n)"
|
||
|
|
set_location_assignment PIN_AA1 -to "oc1_tx[5]"
|
||
|
|
set_location_assignment PIN_AA2 -to "oc1_tx[5](n)"
|
||
|
|
set_location_assignment PIN_Y7 -to "oc1_rx[5]"
|
||
|
|
set_location_assignment PIN_Y8 -to "oc1_rx[5](n)"
|
||
|
|
set_location_assignment PIN_Y3 -to "oc1_tx[6]"
|
||
|
|
set_location_assignment PIN_Y4 -to "oc1_tx[6](n)"
|
||
|
|
set_location_assignment PIN_W5 -to "oc1_rx[6]"
|
||
|
|
set_location_assignment PIN_W6 -to "oc1_rx[6](n)"
|
||
|
|
set_location_assignment PIN_W1 -to "oc1_tx[7]"
|
||
|
|
set_location_assignment PIN_W2 -to "oc1_tx[7](n)"
|
||
|
|
set_location_assignment PIN_V7 -to "oc1_rx[7]"
|
||
|
|
set_location_assignment PIN_V8 -to "oc1_rx[7](n)"
|
||
|
|
set_location_assignment PIN_AC9 -to "oc1_refclk_1"
|
||
|
|
set_location_assignment PIN_AC10 -to "oc1_refclk_1(n)"
|
||
|
|
set_location_assignment PIN_AE9 -to "oc1_refclk_2"
|
||
|
|
set_location_assignment PIN_AE10 -to "oc1_refclk_2(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc1_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc1_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc1_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc1_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HCSL" -to "oc1_refclk_1"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HCSL" -to "oc1_refclk_2"
|
||
|
|
|
||
|
|
set_location_assignment PIN_AG13 -to "oc1_gpio[0]"
|
||
|
|
set_location_assignment PIN_AL13 -to "oc1_gpio[1]"
|
||
|
|
set_location_assignment PIN_AM13 -to "oc1_gpio[2]"
|
||
|
|
set_location_assignment PIN_AN13 -to "oc1_gpio[3]"
|
||
|
|
set_location_assignment PIN_C16 -to "oc1_gpio[4]"
|
||
|
|
set_location_assignment PIN_D16 -to "oc1_gpio[5]"
|
||
|
|
set_location_assignment PIN_B15 -to "oc1_gpio[6]"
|
||
|
|
set_location_assignment PIN_B16 -to "oc1_gpio[7]"
|
||
|
|
set_location_assignment PIN_C14 -to "oc1_gpio[8]"
|
||
|
|
set_location_assignment PIN_C15 -to "oc1_gpio[9]"
|
||
|
|
set_location_assignment PIN_A14 -to "oc1_gpio[10]"
|
||
|
|
set_location_assignment PIN_A15 -to "oc1_gpio[11]"
|
||
|
|
set_location_assignment PIN_E15 -to "oc1_gpio[12]"
|
||
|
|
set_location_assignment PIN_F15 -to "oc1_gpio[13]"
|
||
|
|
set_location_assignment PIN_H15 -to "oc1_gpio[14]"
|
||
|
|
set_location_assignment PIN_G15 -to "oc1_gpio[15]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_AH13 -to "oc1_gpio_dir[0]"
|
||
|
|
set_location_assignment PIN_AP13 -to "oc1_gpio_dir[1]"
|
||
|
|
set_location_assignment PIN_AF13 -to "oc1_gpio_dir[2]"
|
||
|
|
set_location_assignment PIN_AC38 -to "oc1_gpio_dir[3]"
|
||
|
|
set_location_assignment PIN_J16 -to "oc1_gpio_dir[4]"
|
||
|
|
set_location_assignment PIN_K16 -to "oc1_gpio_dir[5]"
|
||
|
|
set_location_assignment PIN_L15 -to "oc1_gpio_dir[6]"
|
||
|
|
set_location_assignment PIN_K15 -to "oc1_gpio_dir[7]"
|
||
|
|
set_location_assignment PIN_M15 -to "oc1_gpio_dir[8]"
|
||
|
|
set_location_assignment PIN_N15 -to "oc1_gpio_dir[9]"
|
||
|
|
set_location_assignment PIN_M16 -to "oc1_gpio_dir[10]"
|
||
|
|
set_location_assignment PIN_N16 -to "oc1_gpio_dir[11]"
|
||
|
|
set_location_assignment PIN_P16 -to "oc1_gpio_dir[12]"
|
||
|
|
set_location_assignment PIN_R16 -to "oc1_gpio_dir[13]"
|
||
|
|
set_location_assignment PIN_A13 -to "oc1_gpio_dir[14]"
|
||
|
|
set_location_assignment PIN_A12 -to "oc1_gpio_dir[15]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_B13 -to "oc1_buff_en_n[0]"
|
||
|
|
set_location_assignment PIN_C13 -to "oc1_buff_en_n[1]"
|
||
|
|
set_location_assignment PIN_B12 -to "oc1_buff_en_n[2]"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio[0]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio[1]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio[2]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio[3]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio[0]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio[1]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio[2]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio[3]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[4]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[5]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[6]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[7]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[8]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[9]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[10]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[11]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[12]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[13]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[14]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio[15]"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio_dir[0]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio_dir[1]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio_dir[2]"
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc1_gpio_dir[3]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio_dir[0]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio_dir[1]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio_dir[2]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc1_gpio_dir[3]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[4]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[5]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[6]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[7]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[8]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[9]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[10]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[11]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[12]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[13]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[14]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_gpio_dir[15]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to "oc1_buff_en_n[*]"
|
||
|
|
|
||
|
|
# OCuLink 2 (J22, 25G, banks 4N, 4M)
|
||
|
|
set_location_assignment PIN_P3 -to "oc2_tx[0]"
|
||
|
|
set_location_assignment PIN_P4 -to "oc2_tx[0](n)"
|
||
|
|
set_location_assignment PIN_N5 -to "oc2_rx[0]"
|
||
|
|
set_location_assignment PIN_N6 -to "oc2_rx[0](n)"
|
||
|
|
set_location_assignment PIN_N1 -to "oc2_tx[1]"
|
||
|
|
set_location_assignment PIN_N2 -to "oc2_tx[1](n)"
|
||
|
|
set_location_assignment PIN_M7 -to "oc2_rx[1]"
|
||
|
|
set_location_assignment PIN_M8 -to "oc2_rx[1](n)"
|
||
|
|
set_location_assignment PIN_L1 -to "oc2_tx[2]"
|
||
|
|
set_location_assignment PIN_L2 -to "oc2_tx[2](n)"
|
||
|
|
set_location_assignment PIN_K7 -to "oc2_rx[2]"
|
||
|
|
set_location_assignment PIN_K8 -to "oc2_rx[2](n)"
|
||
|
|
set_location_assignment PIN_K3 -to "oc2_tx[3]"
|
||
|
|
set_location_assignment PIN_K4 -to "oc2_tx[3](n)"
|
||
|
|
set_location_assignment PIN_J5 -to "oc2_rx[3]"
|
||
|
|
set_location_assignment PIN_J6 -to "oc2_rx[3](n)"
|
||
|
|
set_location_assignment PIN_H3 -to "oc2_tx[4]"
|
||
|
|
set_location_assignment PIN_H4 -to "oc2_tx[4](n)"
|
||
|
|
set_location_assignment PIN_G5 -to "oc2_rx[4]"
|
||
|
|
set_location_assignment PIN_G6 -to "oc2_rx[4](n)"
|
||
|
|
set_location_assignment PIN_G1 -to "oc2_tx[5]"
|
||
|
|
set_location_assignment PIN_G2 -to "oc2_tx[5](n)"
|
||
|
|
set_location_assignment PIN_F7 -to "oc2_rx[5]"
|
||
|
|
set_location_assignment PIN_F8 -to "oc2_rx[5](n)"
|
||
|
|
set_location_assignment PIN_E1 -to "oc2_tx[6]"
|
||
|
|
set_location_assignment PIN_E2 -to "oc2_tx[6](n)"
|
||
|
|
set_location_assignment PIN_D7 -to "oc2_rx[6]"
|
||
|
|
set_location_assignment PIN_D8 -to "oc2_rx[6](n)"
|
||
|
|
set_location_assignment PIN_D3 -to "oc2_tx[7]"
|
||
|
|
set_location_assignment PIN_D4 -to "oc2_tx[7](n)"
|
||
|
|
set_location_assignment PIN_C5 -to "oc2_rx[7]"
|
||
|
|
set_location_assignment PIN_C6 -to "oc2_rx[7](n)"
|
||
|
|
set_location_assignment PIN_R9 -to "oc2_refclk_1"
|
||
|
|
set_location_assignment PIN_R10 -to "oc2_refclk_1(n)"
|
||
|
|
set_location_assignment PIN_L9 -to "oc2_refclk_2"
|
||
|
|
set_location_assignment PIN_L10 -to "oc2_refclk_2(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc2_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc2_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc2_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc2_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "oc2_refclk_1"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "oc2_refclk_1"
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "oc2_refclk_2"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "oc2_refclk_2"
|
||
|
|
|
||
|
|
set_location_assignment PIN_AJ13 -to "oc2_perst_n"
|
||
|
|
set_location_assignment PIN_AC39 -to "oc2_buff_in_sel"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc2_perst_n"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc2_perst_n"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc2_buff_in_sel"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc2_buff_in_sel"
|
||
|
|
|
||
|
|
# OCuLink 3 (J23, 25G, banks 4E, 4F)
|
||
|
|
set_location_assignment PIN_AV3 -to "oc3_tx[0]"
|
||
|
|
set_location_assignment PIN_AV4 -to "oc3_tx[0](n)"
|
||
|
|
set_location_assignment PIN_AU5 -to "oc3_rx[0]"
|
||
|
|
set_location_assignment PIN_AU6 -to "oc3_rx[0](n)"
|
||
|
|
set_location_assignment PIN_AU1 -to "oc3_tx[1]"
|
||
|
|
set_location_assignment PIN_AU2 -to "oc3_tx[1](n)"
|
||
|
|
set_location_assignment PIN_AT7 -to "oc3_rx[1]"
|
||
|
|
set_location_assignment PIN_AT8 -to "oc3_rx[1](n)"
|
||
|
|
set_location_assignment PIN_AR1 -to "oc3_tx[2]"
|
||
|
|
set_location_assignment PIN_AR2 -to "oc3_tx[2](n)"
|
||
|
|
set_location_assignment PIN_AP7 -to "oc3_rx[2]"
|
||
|
|
set_location_assignment PIN_AP8 -to "oc3_rx[2](n)"
|
||
|
|
set_location_assignment PIN_AP3 -to "oc3_tx[3]"
|
||
|
|
set_location_assignment PIN_AP4 -to "oc3_tx[3](n)"
|
||
|
|
set_location_assignment PIN_AN5 -to "oc3_rx[3]"
|
||
|
|
set_location_assignment PIN_AN6 -to "oc3_rx[3](n)"
|
||
|
|
set_location_assignment PIN_AM3 -to "oc3_tx[4]"
|
||
|
|
set_location_assignment PIN_AM4 -to "oc3_tx[4](n)"
|
||
|
|
set_location_assignment PIN_AL5 -to "oc3_rx[4]"
|
||
|
|
set_location_assignment PIN_AL6 -to "oc3_rx[4](n)"
|
||
|
|
set_location_assignment PIN_AL1 -to "oc3_tx[5]"
|
||
|
|
set_location_assignment PIN_AL2 -to "oc3_tx[5](n)"
|
||
|
|
set_location_assignment PIN_AK7 -to "oc3_rx[5]"
|
||
|
|
set_location_assignment PIN_AK8 -to "oc3_rx[5](n)"
|
||
|
|
set_location_assignment PIN_AJ1 -to "oc3_tx[6]"
|
||
|
|
set_location_assignment PIN_AJ2 -to "oc3_tx[6](n)"
|
||
|
|
set_location_assignment PIN_AH7 -to "oc3_rx[6]"
|
||
|
|
set_location_assignment PIN_AH8 -to "oc3_rx[6](n)"
|
||
|
|
set_location_assignment PIN_AH3 -to "oc3_tx[7]"
|
||
|
|
set_location_assignment PIN_AH4 -to "oc3_tx[7](n)"
|
||
|
|
set_location_assignment PIN_AG5 -to "oc3_rx[7]"
|
||
|
|
set_location_assignment PIN_AG6 -to "oc3_rx[7](n)"
|
||
|
|
set_location_assignment PIN_AL9 -to "oc3_refclk_1"
|
||
|
|
set_location_assignment PIN_AL10 -to "oc3_refclk_1(n)"
|
||
|
|
set_location_assignment PIN_AG9 -to "oc3_refclk_2"
|
||
|
|
set_location_assignment PIN_AG10 -to "oc3_refclk_2(n)"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc3_tx[*]"
|
||
|
|
set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to "oc3_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc3_tx[*]"
|
||
|
|
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_1V -to "oc3_rx[*]"
|
||
|
|
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "oc3_refclk_1"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "oc3_refclk_1"
|
||
|
|
set_instance_assignment -name IO_STANDARD LVDS -to "oc3_refclk_2"
|
||
|
|
set_instance_assignment -name XCVR_S10_REFCLK_TERM_TRISTATE TRISTATE_OFF -to "oc3_refclk_2"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BK10 -to "oc3_perst_n"
|
||
|
|
set_location_assignment PIN_AN39 -to "oc3_buff_in_sel"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc3_perst_n"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc3_perst_n"
|
||
|
|
|
||
|
|
set_instance_assignment -name USE_AS_3V_GPIO ON -to "oc3_buff_in_sel"
|
||
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to "oc3_buff_in_sel"
|
||
|
|
|
||
|
|
# DDR4 module 0
|
||
|
|
set_location_assignment PIN_BA33 -to "mem0_rzq"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BC31 -to "mem0_alert_n"
|
||
|
|
set_location_assignment PIN_AW33 -to "mem0_reset_n"
|
||
|
|
set_location_assignment PIN_BH35 -to "mem0_par"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BL34 -to "mem0_a[0]"
|
||
|
|
set_location_assignment PIN_BK34 -to "mem0_a[1]"
|
||
|
|
set_location_assignment PIN_BJ34 -to "mem0_a[2]"
|
||
|
|
set_location_assignment PIN_BH34 -to "mem0_a[3]"
|
||
|
|
set_location_assignment PIN_BH33 -to "mem0_a[4]"
|
||
|
|
set_location_assignment PIN_BJ33 -to "mem0_a[5]"
|
||
|
|
set_location_assignment PIN_BK35 -to "mem0_a[6]"
|
||
|
|
set_location_assignment PIN_BL35 -to "mem0_a[7]"
|
||
|
|
set_location_assignment PIN_BD33 -to "mem0_a[8]"
|
||
|
|
set_location_assignment PIN_BC33 -to "mem0_a[9]"
|
||
|
|
set_location_assignment PIN_BG33 -to "mem0_a[10]"
|
||
|
|
set_location_assignment PIN_BF33 -to "mem0_a[11]"
|
||
|
|
set_location_assignment PIN_BB33 -to "mem0_a[12]"
|
||
|
|
set_location_assignment PIN_BB32 -to "mem0_a[13]"
|
||
|
|
set_location_assignment PIN_BA32 -to "mem0_a[14]"
|
||
|
|
set_location_assignment PIN_AW32 -to "mem0_a[15]"
|
||
|
|
set_location_assignment PIN_AY32 -to "mem0_a[16]"
|
||
|
|
set_location_assignment PIN_BD32 -to "mem0_bg[0]"
|
||
|
|
set_location_assignment PIN_AV33 -to "mem0_bg[1]"
|
||
|
|
set_location_assignment PIN_AV34 -to "mem0_act_n"
|
||
|
|
set_location_assignment PIN_BA34 -to "mem0_odt[0]"
|
||
|
|
set_location_assignment PIN_AY34 -to "mem0_odt[1]"
|
||
|
|
set_location_assignment PIN_BF34 -to "mem0_ck_p[0]"
|
||
|
|
set_location_assignment PIN_BE34 -to "mem0_ck_n[0]"
|
||
|
|
set_location_assignment PIN_AW34 -to "mem0_cs_n[0]"
|
||
|
|
set_location_assignment PIN_BG35 -to "mem0_cs_n[1]"
|
||
|
|
set_location_assignment PIN_BD34 -to "mem0_cke[0]"
|
||
|
|
set_location_assignment PIN_BC34 -to "mem0_cke[1]"
|
||
|
|
set_location_assignment PIN_BF32 -to "mem0_ba[0]"
|
||
|
|
set_location_assignment PIN_BE32 -to "mem0_ba[1]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BF23 -to "mem0_dqs_p[0]"
|
||
|
|
set_location_assignment PIN_BG23 -to "mem0_dqs_n[0]"
|
||
|
|
set_location_assignment PIN_BJ22 -to "mem0_dqs_p[1]"
|
||
|
|
set_location_assignment PIN_BK22 -to "mem0_dqs_n[1]"
|
||
|
|
set_location_assignment PIN_BC26 -to "mem0_dqs_p[2]"
|
||
|
|
set_location_assignment PIN_BD26 -to "mem0_dqs_n[2]"
|
||
|
|
set_location_assignment PIN_BG25 -to "mem0_dqs_p[3]"
|
||
|
|
set_location_assignment PIN_BF25 -to "mem0_dqs_n[3]"
|
||
|
|
set_location_assignment PIN_BK26 -to "mem0_dqs_p[4]"
|
||
|
|
set_location_assignment PIN_BK25 -to "mem0_dqs_n[4]"
|
||
|
|
set_location_assignment PIN_BK24 -to "mem0_dqs_p[5]"
|
||
|
|
set_location_assignment PIN_BJ24 -to "mem0_dqs_n[5]"
|
||
|
|
set_location_assignment PIN_BJ28 -to "mem0_dqs_p[6]"
|
||
|
|
set_location_assignment PIN_BH28 -to "mem0_dqs_n[6]"
|
||
|
|
set_location_assignment PIN_BK27 -to "mem0_dqs_p[7]"
|
||
|
|
set_location_assignment PIN_BJ27 -to "mem0_dqs_n[7]"
|
||
|
|
set_location_assignment PIN_BF29 -to "mem0_dqs_p[8]"
|
||
|
|
set_location_assignment PIN_BE29 -to "mem0_dqs_n[8]"
|
||
|
|
set_location_assignment PIN_BA28 -to "mem0_dqs_p[9]"
|
||
|
|
set_location_assignment PIN_BA29 -to "mem0_dqs_n[9]"
|
||
|
|
set_location_assignment PIN_BB30 -to "mem0_dqs_p[10]"
|
||
|
|
set_location_assignment PIN_BC30 -to "mem0_dqs_n[10]"
|
||
|
|
set_location_assignment PIN_BH30 -to "mem0_dqs_p[11]"
|
||
|
|
set_location_assignment PIN_BG30 -to "mem0_dqs_n[11]"
|
||
|
|
set_location_assignment PIN_BK39 -to "mem0_dqs_p[12]"
|
||
|
|
set_location_assignment PIN_BL39 -to "mem0_dqs_n[12]"
|
||
|
|
set_location_assignment PIN_BG40 -to "mem0_dqs_p[13]"
|
||
|
|
set_location_assignment PIN_BH40 -to "mem0_dqs_n[13]"
|
||
|
|
set_location_assignment PIN_BH38 -to "mem0_dqs_p[14]"
|
||
|
|
set_location_assignment PIN_BJ38 -to "mem0_dqs_n[14]"
|
||
|
|
set_location_assignment PIN_BC38 -to "mem0_dqs_p[15]"
|
||
|
|
set_location_assignment PIN_BD38 -to "mem0_dqs_n[15]"
|
||
|
|
set_location_assignment PIN_BA37 -to "mem0_dqs_p[16]"
|
||
|
|
set_location_assignment PIN_BB37 -to "mem0_dqs_n[16]"
|
||
|
|
set_location_assignment PIN_BG37 -to "mem0_dqs_p[17]"
|
||
|
|
set_location_assignment PIN_BF37 -to "mem0_dqs_n[17]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_BE24 -to "mem0_dq[0]"
|
||
|
|
set_location_assignment PIN_BF24 -to "mem0_dq[1]"
|
||
|
|
set_location_assignment PIN_BH24 -to "mem0_dq[2]"
|
||
|
|
set_location_assignment PIN_BH25 -to "mem0_dq[3]"
|
||
|
|
set_location_assignment PIN_BL23 -to "mem0_dq[4]"
|
||
|
|
set_location_assignment PIN_BL22 -to "mem0_dq[5]"
|
||
|
|
set_location_assignment PIN_BJ23 -to "mem0_dq[6]"
|
||
|
|
set_location_assignment PIN_BH23 -to "mem0_dq[7]"
|
||
|
|
set_location_assignment PIN_AW28 -to "mem0_dq[8]"
|
||
|
|
set_location_assignment PIN_AW27 -to "mem0_dq[9]"
|
||
|
|
set_location_assignment PIN_AY27 -to "mem0_dq[10]"
|
||
|
|
set_location_assignment PIN_BA27 -to "mem0_dq[11]"
|
||
|
|
set_location_assignment PIN_BE26 -to "mem0_dq[12]"
|
||
|
|
set_location_assignment PIN_BE25 -to "mem0_dq[13]"
|
||
|
|
set_location_assignment PIN_BB26 -to "mem0_dq[14]"
|
||
|
|
set_location_assignment PIN_BB27 -to "mem0_dq[15]"
|
||
|
|
set_location_assignment PIN_BE27 -to "mem0_dq[16]"
|
||
|
|
set_location_assignment PIN_BF27 -to "mem0_dq[17]"
|
||
|
|
set_location_assignment PIN_BG26 -to "mem0_dq[18]"
|
||
|
|
set_location_assignment PIN_BG27 -to "mem0_dq[19]"
|
||
|
|
set_location_assignment PIN_BL25 -to "mem0_dq[20]"
|
||
|
|
set_location_assignment PIN_BL24 -to "mem0_dq[21]"
|
||
|
|
set_location_assignment PIN_BJ26 -to "mem0_dq[22]"
|
||
|
|
set_location_assignment PIN_BH26 -to "mem0_dq[23]"
|
||
|
|
set_location_assignment PIN_BC28 -to "mem0_dq[24]"
|
||
|
|
set_location_assignment PIN_BB28 -to "mem0_dq[25]"
|
||
|
|
set_location_assignment PIN_BD28 -to "mem0_dq[26]"
|
||
|
|
set_location_assignment PIN_BD27 -to "mem0_dq[27]"
|
||
|
|
set_location_assignment PIN_BL28 -to "mem0_dq[28]"
|
||
|
|
set_location_assignment PIN_BL27 -to "mem0_dq[29]"
|
||
|
|
set_location_assignment PIN_BG28 -to "mem0_dq[30]"
|
||
|
|
set_location_assignment PIN_BF28 -to "mem0_dq[31]"
|
||
|
|
set_location_assignment PIN_BK30 -to "mem0_dq[32]"
|
||
|
|
set_location_assignment PIN_BL30 -to "mem0_dq[33]"
|
||
|
|
set_location_assignment PIN_BK29 -to "mem0_dq[34]"
|
||
|
|
set_location_assignment PIN_BL29 -to "mem0_dq[35]"
|
||
|
|
set_location_assignment PIN_BD29 -to "mem0_dq[36]"
|
||
|
|
set_location_assignment PIN_BC29 -to "mem0_dq[37]"
|
||
|
|
set_location_assignment PIN_BJ29 -to "mem0_dq[38]"
|
||
|
|
set_location_assignment PIN_BH29 -to "mem0_dq[39]"
|
||
|
|
set_location_assignment PIN_AV30 -to "mem0_dq[40]"
|
||
|
|
set_location_assignment PIN_AV29 -to "mem0_dq[41]"
|
||
|
|
set_location_assignment PIN_AW29 -to "mem0_dq[42]"
|
||
|
|
set_location_assignment PIN_AY29 -to "mem0_dq[43]"
|
||
|
|
set_location_assignment PIN_BF30 -to "mem0_dq[44]"
|
||
|
|
set_location_assignment PIN_BE30 -to "mem0_dq[45]"
|
||
|
|
set_location_assignment PIN_AY30 -to "mem0_dq[46]"
|
||
|
|
set_location_assignment PIN_BA30 -to "mem0_dq[47]"
|
||
|
|
set_location_assignment PIN_BJ39 -to "mem0_dq[48]"
|
||
|
|
set_location_assignment PIN_BH39 -to "mem0_dq[49]"
|
||
|
|
set_location_assignment PIN_BF39 -to "mem0_dq[50]"
|
||
|
|
set_location_assignment PIN_BE39 -to "mem0_dq[51]"
|
||
|
|
set_location_assignment PIN_BE40 -to "mem0_dq[52]"
|
||
|
|
set_location_assignment PIN_BF40 -to "mem0_dq[53]"
|
||
|
|
set_location_assignment PIN_BK40 -to "mem0_dq[54]"
|
||
|
|
set_location_assignment PIN_BL40 -to "mem0_dq[55]"
|
||
|
|
set_location_assignment PIN_BL37 -to "mem0_dq[56]"
|
||
|
|
set_location_assignment PIN_BL38 -to "mem0_dq[57]"
|
||
|
|
set_location_assignment PIN_BJ37 -to "mem0_dq[58]"
|
||
|
|
set_location_assignment PIN_BK37 -to "mem0_dq[59]"
|
||
|
|
set_location_assignment PIN_BC39 -to "mem0_dq[60]"
|
||
|
|
set_location_assignment PIN_BD39 -to "mem0_dq[61]"
|
||
|
|
set_location_assignment PIN_BF38 -to "mem0_dq[62]"
|
||
|
|
set_location_assignment PIN_BG38 -to "mem0_dq[63]"
|
||
|
|
set_location_assignment PIN_BC36 -to "mem0_dq[64]"
|
||
|
|
set_location_assignment PIN_BB36 -to "mem0_dq[65]"
|
||
|
|
set_location_assignment PIN_AY36 -to "mem0_dq[66]"
|
||
|
|
set_location_assignment PIN_AW36 -to "mem0_dq[67]"
|
||
|
|
set_location_assignment PIN_BD37 -to "mem0_dq[68]"
|
||
|
|
set_location_assignment PIN_BE37 -to "mem0_dq[69]"
|
||
|
|
set_location_assignment PIN_AW37 -to "mem0_dq[70]"
|
||
|
|
set_location_assignment PIN_AY37 -to "mem0_dq[71]"
|
||
|
|
|
||
|
|
# DDR4 module 1
|
||
|
|
set_location_assignment PIN_A40 -to "mem1_rzq"
|
||
|
|
|
||
|
|
set_location_assignment PIN_P36 -to "mem1_alert_n"
|
||
|
|
set_location_assignment PIN_F35 -to "mem1_reset_n"
|
||
|
|
set_location_assignment PIN_A39 -to "mem1_par"
|
||
|
|
|
||
|
|
set_location_assignment PIN_H34 -to "mem1_a[0]"
|
||
|
|
set_location_assignment PIN_J34 -to "mem1_a[1]"
|
||
|
|
set_location_assignment PIN_G35 -to "mem1_a[2]"
|
||
|
|
set_location_assignment PIN_H35 -to "mem1_a[3]"
|
||
|
|
set_location_assignment PIN_L35 -to "mem1_a[4]"
|
||
|
|
set_location_assignment PIN_K35 -to "mem1_a[5]"
|
||
|
|
set_location_assignment PIN_L34 -to "mem1_a[6]"
|
||
|
|
set_location_assignment PIN_K34 -to "mem1_a[7]"
|
||
|
|
set_location_assignment PIN_N34 -to "mem1_a[8]"
|
||
|
|
set_location_assignment PIN_P34 -to "mem1_a[9]"
|
||
|
|
set_location_assignment PIN_M35 -to "mem1_a[10]"
|
||
|
|
set_location_assignment PIN_N35 -to "mem1_a[11]"
|
||
|
|
set_location_assignment PIN_B40 -to "mem1_a[12]"
|
||
|
|
set_location_assignment PIN_C39 -to "mem1_a[13]"
|
||
|
|
set_location_assignment PIN_D39 -to "mem1_a[14]"
|
||
|
|
set_location_assignment PIN_D38 -to "mem1_a[15]"
|
||
|
|
set_location_assignment PIN_C38 -to "mem1_a[16]"
|
||
|
|
set_location_assignment PIN_G37 -to "mem1_bg[0]"
|
||
|
|
set_location_assignment PIN_F34 -to "mem1_bg[1]"
|
||
|
|
set_location_assignment PIN_E35 -to "mem1_act_n"
|
||
|
|
set_location_assignment PIN_C36 -to "mem1_odt[0]"
|
||
|
|
set_location_assignment PIN_D36 -to "mem1_odt[1]"
|
||
|
|
set_location_assignment PIN_B37 -to "mem1_ck_p[0]"
|
||
|
|
set_location_assignment PIN_B38 -to "mem1_ck_n[0]"
|
||
|
|
set_location_assignment PIN_E36 -to "mem1_cs_n[0]"
|
||
|
|
set_location_assignment PIN_A38 -to "mem1_cs_n[1]"
|
||
|
|
set_location_assignment PIN_B36 -to "mem1_cke[0]"
|
||
|
|
set_location_assignment PIN_A37 -to "mem1_cke[1]"
|
||
|
|
set_location_assignment PIN_D37 -to "mem1_ba[0]"
|
||
|
|
set_location_assignment PIN_F37 -to "mem1_ba[1]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_K29 -to "mem1_dqs_p[0]"
|
||
|
|
set_location_assignment PIN_L29 -to "mem1_dqs_n[0]"
|
||
|
|
set_location_assignment PIN_R30 -to "mem1_dqs_p[1]"
|
||
|
|
set_location_assignment PIN_R29 -to "mem1_dqs_n[1]"
|
||
|
|
set_location_assignment PIN_E29 -to "mem1_dqs_p[2]"
|
||
|
|
set_location_assignment PIN_F29 -to "mem1_dqs_n[2]"
|
||
|
|
set_location_assignment PIN_G30 -to "mem1_dqs_p[3]"
|
||
|
|
set_location_assignment PIN_H30 -to "mem1_dqs_n[3]"
|
||
|
|
set_location_assignment PIN_M31 -to "mem1_dqs_p[4]"
|
||
|
|
set_location_assignment PIN_N31 -to "mem1_dqs_n[4]"
|
||
|
|
set_location_assignment PIN_P32 -to "mem1_dqs_p[5]"
|
||
|
|
set_location_assignment PIN_R32 -to "mem1_dqs_n[5]"
|
||
|
|
set_location_assignment PIN_G33 -to "mem1_dqs_p[6]"
|
||
|
|
set_location_assignment PIN_F33 -to "mem1_dqs_n[6]"
|
||
|
|
set_location_assignment PIN_K32 -to "mem1_dqs_p[7]"
|
||
|
|
set_location_assignment PIN_J32 -to "mem1_dqs_n[7]"
|
||
|
|
set_location_assignment PIN_D32 -to "mem1_dqs_p[8]"
|
||
|
|
set_location_assignment PIN_E32 -to "mem1_dqs_n[8]"
|
||
|
|
set_location_assignment PIN_G31 -to "mem1_dqs_p[9]"
|
||
|
|
set_location_assignment PIN_H31 -to "mem1_dqs_n[9]"
|
||
|
|
set_location_assignment PIN_B31 -to "mem1_dqs_p[10]"
|
||
|
|
set_location_assignment PIN_A32 -to "mem1_dqs_n[10]"
|
||
|
|
set_location_assignment PIN_A35 -to "mem1_dqs_p[11]"
|
||
|
|
set_location_assignment PIN_B35 -to "mem1_dqs_n[11]"
|
||
|
|
set_location_assignment PIN_E41 -to "mem1_dqs_p[12]"
|
||
|
|
set_location_assignment PIN_E40 -to "mem1_dqs_n[12]"
|
||
|
|
set_location_assignment PIN_C42 -to "mem1_dqs_p[13]"
|
||
|
|
set_location_assignment PIN_B42 -to "mem1_dqs_n[13]"
|
||
|
|
set_location_assignment PIN_H38 -to "mem1_dqs_p[14]"
|
||
|
|
set_location_assignment PIN_J38 -to "mem1_dqs_n[14]"
|
||
|
|
set_location_assignment PIN_H39 -to "mem1_dqs_p[15]"
|
||
|
|
set_location_assignment PIN_G38 -to "mem1_dqs_n[15]"
|
||
|
|
set_location_assignment PIN_E42 -to "mem1_dqs_p[16]"
|
||
|
|
set_location_assignment PIN_F42 -to "mem1_dqs_n[16]"
|
||
|
|
set_location_assignment PIN_L38 -to "mem1_dqs_p[17]"
|
||
|
|
set_location_assignment PIN_L39 -to "mem1_dqs_n[17]"
|
||
|
|
|
||
|
|
set_location_assignment PIN_H29 -to "mem1_dq[0]"
|
||
|
|
set_location_assignment PIN_J29 -to "mem1_dq[1]"
|
||
|
|
set_location_assignment PIN_M30 -to "mem1_dq[2]"
|
||
|
|
set_location_assignment PIN_N30 -to "mem1_dq[3]"
|
||
|
|
set_location_assignment PIN_N29 -to "mem1_dq[4]"
|
||
|
|
set_location_assignment PIN_P29 -to "mem1_dq[5]"
|
||
|
|
set_location_assignment PIN_K30 -to "mem1_dq[6]"
|
||
|
|
set_location_assignment PIN_L30 -to "mem1_dq[7]"
|
||
|
|
set_location_assignment PIN_A28 -to "mem1_dq[8]"
|
||
|
|
set_location_assignment PIN_A29 -to "mem1_dq[9]"
|
||
|
|
set_location_assignment PIN_C28 -to "mem1_dq[10]"
|
||
|
|
set_location_assignment PIN_B28 -to "mem1_dq[11]"
|
||
|
|
set_location_assignment PIN_E30 -to "mem1_dq[12]"
|
||
|
|
set_location_assignment PIN_F30 -to "mem1_dq[13]"
|
||
|
|
set_location_assignment PIN_C29 -to "mem1_dq[14]"
|
||
|
|
set_location_assignment PIN_D29 -to "mem1_dq[15]"
|
||
|
|
set_location_assignment PIN_N33 -to "mem1_dq[16]"
|
||
|
|
set_location_assignment PIN_P33 -to "mem1_dq[17]"
|
||
|
|
set_location_assignment PIN_L33 -to "mem1_dq[18]"
|
||
|
|
set_location_assignment PIN_M33 -to "mem1_dq[19]"
|
||
|
|
set_location_assignment PIN_P31 -to "mem1_dq[20]"
|
||
|
|
set_location_assignment PIN_R31 -to "mem1_dq[21]"
|
||
|
|
set_location_assignment PIN_T33 -to "mem1_dq[22]"
|
||
|
|
set_location_assignment PIN_T32 -to "mem1_dq[23]"
|
||
|
|
set_location_assignment PIN_C34 -to "mem1_dq[24]"
|
||
|
|
set_location_assignment PIN_C35 -to "mem1_dq[25]"
|
||
|
|
set_location_assignment PIN_D34 -to "mem1_dq[26]"
|
||
|
|
set_location_assignment PIN_E34 -to "mem1_dq[27]"
|
||
|
|
set_location_assignment PIN_M32 -to "mem1_dq[28]"
|
||
|
|
set_location_assignment PIN_L32 -to "mem1_dq[29]"
|
||
|
|
set_location_assignment PIN_H33 -to "mem1_dq[30]"
|
||
|
|
set_location_assignment PIN_J33 -to "mem1_dq[31]"
|
||
|
|
set_location_assignment PIN_J31 -to "mem1_dq[32]"
|
||
|
|
set_location_assignment PIN_K31 -to "mem1_dq[33]"
|
||
|
|
set_location_assignment PIN_B33 -to "mem1_dq[34]"
|
||
|
|
set_location_assignment PIN_B32 -to "mem1_dq[35]"
|
||
|
|
set_location_assignment PIN_F32 -to "mem1_dq[36]"
|
||
|
|
set_location_assignment PIN_G32 -to "mem1_dq[37]"
|
||
|
|
set_location_assignment PIN_D33 -to "mem1_dq[38]"
|
||
|
|
set_location_assignment PIN_C33 -to "mem1_dq[39]"
|
||
|
|
set_location_assignment PIN_B30 -to "mem1_dq[40]"
|
||
|
|
set_location_assignment PIN_A30 -to "mem1_dq[41]"
|
||
|
|
set_location_assignment PIN_C30 -to "mem1_dq[42]"
|
||
|
|
set_location_assignment PIN_C31 -to "mem1_dq[43]"
|
||
|
|
set_location_assignment PIN_A33 -to "mem1_dq[44]"
|
||
|
|
set_location_assignment PIN_A34 -to "mem1_dq[45]"
|
||
|
|
set_location_assignment PIN_D31 -to "mem1_dq[46]"
|
||
|
|
set_location_assignment PIN_E31 -to "mem1_dq[47]"
|
||
|
|
set_location_assignment PIN_E39 -to "mem1_dq[48]"
|
||
|
|
set_location_assignment PIN_F40 -to "mem1_dq[49]"
|
||
|
|
set_location_assignment PIN_F38 -to "mem1_dq[50]"
|
||
|
|
set_location_assignment PIN_F39 -to "mem1_dq[51]"
|
||
|
|
set_location_assignment PIN_C41 -to "mem1_dq[52]"
|
||
|
|
set_location_assignment PIN_C40 -to "mem1_dq[53]"
|
||
|
|
set_location_assignment PIN_D42 -to "mem1_dq[54]"
|
||
|
|
set_location_assignment PIN_D41 -to "mem1_dq[55]"
|
||
|
|
set_location_assignment PIN_R37 -to "mem1_dq[56]"
|
||
|
|
set_location_assignment PIN_P37 -to "mem1_dq[57]"
|
||
|
|
set_location_assignment PIN_P38 -to "mem1_dq[58]"
|
||
|
|
set_location_assignment PIN_N38 -to "mem1_dq[59]"
|
||
|
|
set_location_assignment PIN_J37 -to "mem1_dq[60]"
|
||
|
|
set_location_assignment PIN_K37 -to "mem1_dq[61]"
|
||
|
|
set_location_assignment PIN_L37 -to "mem1_dq[62]"
|
||
|
|
set_location_assignment PIN_M37 -to "mem1_dq[63]"
|
||
|
|
set_location_assignment PIN_H41 -to "mem1_dq[64]"
|
||
|
|
set_location_assignment PIN_G41 -to "mem1_dq[65]"
|
||
|
|
set_location_assignment PIN_G42 -to "mem1_dq[66]"
|
||
|
|
set_location_assignment PIN_H42 -to "mem1_dq[67]"
|
||
|
|
set_location_assignment PIN_K39 -to "mem1_dq[68]"
|
||
|
|
set_location_assignment PIN_J39 -to "mem1_dq[69]"
|
||
|
|
set_location_assignment PIN_H40 -to "mem1_dq[70]"
|
||
|
|
set_location_assignment PIN_G40 -to "mem1_dq[71]"
|