See :ref:`rb_overview` for definitions of the standard register block header fields.
There is one set of registers per port, with the source port for each packet determined by the ``tid`` field, which is set in the RX FIFO subsystem to identify the source port when data is aggregated from multiple ports. For each packet, the ``tdest`` field (provided by custom logic in the application section) and flow hash (computed in :ref:`mod_rx_hash` in :ref:`mod_mqnic_ingress`) are combined according to::
The goal of this setup is to enable any combination of flow hashing and custom application logic to influence queue selection, under the direction of host software.
The port count field contains information about the queue mapping configuration. The ports field contains the number of ports, while the table size field contains the log of the number of entries in the indirection table.
The port indirection table offset field contains the offset to the start of the indirection table region, relative to the start of the current region. The indirection table itself is an array of 32-bit words, which should be loaded with the
The port app mask field contains a mask value to select a portion of the application-provided ``tdest`` value. Bit 31 of this register controls the application section's ability to directly select a destination queue. If bit 31 is set, the application section can set the MSB of ``tdest`` to pass through the rest of ``tdest`` without modification.