2021-10-21 14:55:48 -07:00
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// SPDX-License-Identifier: BSD-2-Clause-Views
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2019-07-17 18:13:51 -07:00
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/*
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2021-10-21 14:55:48 -07:00
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* Copyright 2019-2021, The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation
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* are those of the authors and should not be interpreted as representing
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* official policies, either expressed or implied, of The Regents of the
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* University of California.
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*/
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2019-07-17 18:13:51 -07:00
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#include "mqnic.h"
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#include <linux/version.h>
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2021-10-08 18:31:53 -07:00
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ktime_t mqnic_read_cpl_ts(struct mqnic_dev *mdev, struct mqnic_ring *ring,
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const struct mqnic_cpl *cpl)
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2019-07-17 18:13:51 -07:00
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{
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u64 ts_s = le16_to_cpu(cpl->ts_s);
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u32 ts_ns = le32_to_cpu(cpl->ts_ns);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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if (unlikely(!ring->ts_valid || (ring->ts_s ^ ts_s) & 0xff00)) {
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// seconds MSBs do not match, update cached timestamp
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2021-12-29 22:31:46 -08:00
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if (mdev->phc_rb) {
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ring->ts_s = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_CUR_SEC_L);
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ring->ts_s |= (u64) ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_CUR_SEC_H) << 32;
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ring->ts_valid = 1;
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}
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2021-10-08 18:31:53 -07:00
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}
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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ts_s |= ring->ts_s & 0xffffffffffffff00;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return ktime_set(ts_s, ts_ns);
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2019-07-17 18:13:51 -07:00
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}
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static int mqnic_phc_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
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{
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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bool neg = false;
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u64 nom_per_fns, adj;
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2019-07-17 18:13:51 -07:00
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2021-10-21 14:44:05 -07:00
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dev_info(mdev->dev, "%s: scaled_ppm: %ld", __func__, scaled_ppm);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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if (scaled_ppm < 0) {
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neg = true;
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scaled_ppm = -scaled_ppm;
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}
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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nom_per_fns = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_NOM_PERIOD_FNS);
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2022-04-11 10:55:07 -07:00
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nom_per_fns |= (u64) ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_NOM_PERIOD_NS) << 32;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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if (nom_per_fns == 0)
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nom_per_fns = 0x4ULL << 32;
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2019-07-17 18:13:51 -07:00
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adj = div_u64(((nom_per_fns >> 16) * scaled_ppm) + 500000, 1000000);
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2019-07-17 18:13:51 -07:00
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if (neg)
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adj = nom_per_fns - adj;
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else
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adj = nom_per_fns + adj;
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(adj & 0xffffffff, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_PERIOD_FNS);
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iowrite32(adj >> 32, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_PERIOD_NS);
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2019-07-17 18:13:51 -07:00
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2021-10-21 14:44:05 -07:00
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dev_info(mdev->dev, "%s adj: 0x%llx", __func__, adj);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return 0;
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2019-07-17 18:13:51 -07:00
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}
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static int mqnic_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
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{
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_FNS);
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ts->tv_nsec = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_NS);
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ts->tv_sec = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_SEC_L);
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ts->tv_sec |= (u64) ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_SEC_H) << 32;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return 0;
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2019-07-17 18:13:51 -07:00
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}
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2021-10-08 18:31:53 -07:00
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)
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static int mqnic_phc_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,
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struct ptp_system_timestamp *sts)
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2019-07-17 18:13:51 -07:00
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{
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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ptp_read_system_prets(sts);
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2021-12-29 22:31:46 -08:00
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ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_FNS);
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ptp_read_system_postts(sts);
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2021-12-29 22:31:46 -08:00
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ts->tv_nsec = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_NS);
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ts->tv_sec = ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_SEC_L);
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ts->tv_sec |= (u64) ioread32(mdev->phc_rb->regs + MQNIC_RB_PHC_REG_GET_SEC_H) << 32;
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2019-07-17 18:13:51 -07:00
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return 0;
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}
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#endif
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static int mqnic_phc_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts)
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{
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2021-10-08 18:31:53 -07:00
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(0, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_SET_FNS);
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iowrite32(ts->tv_nsec, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_SET_NS);
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iowrite32(ts->tv_sec & 0xffffffff, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_SET_SEC_L);
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iowrite32(ts->tv_sec >> 32, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_SET_SEC_H);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return 0;
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2019-07-17 18:13:51 -07:00
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}
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static int mqnic_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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2021-10-08 18:31:53 -07:00
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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struct timespec64 ts;
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2021-10-21 14:44:05 -07:00
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dev_info(mdev->dev, "%s: delta: %lld", __func__, delta);
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2021-10-08 18:31:53 -07:00
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if (delta > 1000000000 || delta < -1000000000) {
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mqnic_phc_gettime(ptp, &ts);
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ts = timespec64_add(ts, ns_to_timespec64(delta));
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mqnic_phc_settime(ptp, &ts);
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} else {
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2021-12-29 22:31:46 -08:00
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iowrite32(0, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_ADJ_FNS);
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iowrite32(delta & 0xffffffff, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_ADJ_NS);
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iowrite32(1, mdev->phc_rb->regs + MQNIC_RB_PHC_REG_ADJ_COUNT);
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2021-10-08 18:31:53 -07:00
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}
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return 0;
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2019-07-17 18:13:51 -07:00
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}
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static int mqnic_phc_perout(struct ptp_clock_info *ptp, int on, struct ptp_perout_request *perout)
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{
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2021-10-08 18:31:53 -07:00
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struct mqnic_dev *mdev = container_of(ptp, struct mqnic_dev, ptp_clock_info);
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2021-12-29 22:31:46 -08:00
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struct reg_block *rb;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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u64 start_sec, period_sec, width_sec;
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u32 start_nsec, period_nsec, width_nsec;
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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rb = find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
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MQNIC_RB_PHC_PEROUT_VER, perout->index);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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if (!rb)
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return -EINVAL;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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if (!on) {
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2021-12-29 22:31:46 -08:00
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iowrite32(0, rb->regs + MQNIC_RB_PHC_PEROUT_REG_CTRL);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return 0;
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}
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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start_nsec = perout->start.nsec;
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start_sec = start_nsec / NSEC_PER_SEC;
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start_nsec -= start_sec * NSEC_PER_SEC;
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start_sec += perout->start.sec;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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period_nsec = perout->period.nsec;
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period_sec = period_nsec / NSEC_PER_SEC;
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period_nsec -= period_sec * NSEC_PER_SEC;
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period_sec += perout->period.sec;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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// set width to half of period
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width_sec = period_sec >> 1;
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width_nsec = (period_nsec + (period_sec & 1 ? NSEC_PER_SEC : 0)) >> 1;
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2019-07-17 18:13:51 -07:00
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2021-10-21 14:44:05 -07:00
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dev_info(mdev->dev, "%s: start: %lld.%09d", __func__, start_sec, start_nsec);
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dev_info(mdev->dev, "%s: period: %lld.%09d", __func__, period_sec, period_nsec);
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dev_info(mdev->dev, "%s: width: %lld.%09d", __func__, width_sec, width_nsec);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(0, rb->regs + MQNIC_RB_PHC_PEROUT_REG_START_FNS);
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iowrite32(start_nsec, rb->regs + MQNIC_RB_PHC_PEROUT_REG_START_NS);
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iowrite32(start_sec & 0xffffffff, rb->regs + MQNIC_RB_PHC_PEROUT_REG_START_SEC_L);
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iowrite32(start_sec >> 32, rb->regs + MQNIC_RB_PHC_PEROUT_REG_START_SEC_H);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(0, rb->regs + MQNIC_RB_PHC_PEROUT_REG_PERIOD_FNS);
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iowrite32(period_nsec, rb->regs + MQNIC_RB_PHC_PEROUT_REG_PERIOD_NS);
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iowrite32(period_sec & 0xffffffff, rb->regs + MQNIC_RB_PHC_PEROUT_REG_PERIOD_SEC_L);
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iowrite32(period_sec >> 32, rb->regs + MQNIC_RB_PHC_PEROUT_REG_PERIOD_SEC_H);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(0, rb->regs + MQNIC_RB_PHC_PEROUT_REG_WIDTH_FNS);
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iowrite32(width_nsec, rb->regs + MQNIC_RB_PHC_PEROUT_REG_WIDTH_NS);
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iowrite32(width_sec & 0xffffffff, rb->regs + MQNIC_RB_PHC_PEROUT_REG_WIDTH_SEC_L);
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iowrite32(width_sec >> 32, rb->regs + MQNIC_RB_PHC_PEROUT_REG_WIDTH_SEC_H);
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2019-07-17 18:13:51 -07:00
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2021-12-29 22:31:46 -08:00
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iowrite32(1, rb->regs + MQNIC_RB_PHC_PEROUT_REG_CTRL);
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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return 0;
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2019-07-17 18:13:51 -07:00
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}
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static int mqnic_phc_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *request, int on)
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{
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2021-10-08 18:31:53 -07:00
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if (!request)
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return -EINVAL;
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switch (request->type) {
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case PTP_CLK_REQ_EXTTS:
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return -EINVAL;
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case PTP_CLK_REQ_PEROUT:
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return mqnic_phc_perout(ptp, on, &request->perout);
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case PTP_CLK_REQ_PPS:
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return -EINVAL;
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default:
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return -EINVAL;
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}
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2019-07-17 18:13:51 -07:00
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}
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2021-01-13 20:09:09 -08:00
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static void mqnic_phc_set_from_system_clock(struct ptp_clock_info *ptp)
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2019-07-17 18:13:51 -07:00
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{
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2021-10-08 18:31:53 -07:00
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struct timespec64 ts;
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2019-07-17 18:13:51 -07:00
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2021-10-08 18:31:53 -07:00
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#ifdef ktime_get_clocktai_ts64
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ktime_get_clocktai_ts64(&ts);
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2019-07-17 18:13:51 -07:00
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#else
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ts = ktime_to_timespec64(ktime_get_clocktai());
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2019-07-17 18:13:51 -07:00
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#endif
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2021-10-08 18:31:53 -07:00
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mqnic_phc_settime(ptp, &ts);
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2019-07-17 18:13:51 -07:00
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|
|
}
|
|
|
|
|
|
|
|
void mqnic_register_phc(struct mqnic_dev *mdev)
|
|
|
|
{
|
2021-12-29 22:31:46 -08:00
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|
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int perout_ch_count = 0;
|
|
|
|
struct reg_block *rb;
|
|
|
|
|
|
|
|
if (!mdev->phc_rb) {
|
2022-04-16 23:23:20 -07:00
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dev_warn(mdev->dev, "PTP clock not present");
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2021-12-29 22:31:46 -08:00
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|
return;
|
|
|
|
}
|
2021-10-08 18:31:53 -07:00
|
|
|
|
|
|
|
if (mdev->ptp_clock) {
|
|
|
|
dev_warn(mdev->dev, "PTP clock already registered");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2022-04-16 23:23:20 -07:00
|
|
|
// count PTP period output channels
|
2021-12-29 22:31:46 -08:00
|
|
|
while ((rb = find_reg_block(mdev->rb_list, MQNIC_RB_PHC_PEROUT_TYPE,
|
|
|
|
MQNIC_RB_PHC_PEROUT_VER, perout_ch_count))) {
|
|
|
|
perout_ch_count++;
|
|
|
|
}
|
2021-10-08 18:31:53 -07:00
|
|
|
|
|
|
|
mdev->ptp_clock_info.owner = THIS_MODULE;
|
2022-02-02 18:41:19 -08:00
|
|
|
snprintf(mdev->ptp_clock_info.name, sizeof(mdev->ptp_clock_info.name),
|
|
|
|
"%s_ptp", mdev->name);
|
2021-10-08 18:31:53 -07:00
|
|
|
mdev->ptp_clock_info.max_adj = 100000000;
|
|
|
|
mdev->ptp_clock_info.n_alarm = 0;
|
|
|
|
mdev->ptp_clock_info.n_ext_ts = 0;
|
2021-12-29 22:31:46 -08:00
|
|
|
mdev->ptp_clock_info.n_per_out = perout_ch_count;
|
2021-10-08 18:31:53 -07:00
|
|
|
mdev->ptp_clock_info.n_pins = 0;
|
|
|
|
mdev->ptp_clock_info.pps = 0;
|
|
|
|
mdev->ptp_clock_info.adjfine = mqnic_phc_adjfine;
|
|
|
|
mdev->ptp_clock_info.adjtime = mqnic_phc_adjtime;
|
|
|
|
mdev->ptp_clock_info.gettime64 = mqnic_phc_gettime;
|
|
|
|
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)
|
|
|
|
mdev->ptp_clock_info.gettimex64 = mqnic_phc_gettimex;
|
2019-07-17 18:13:51 -07:00
|
|
|
#endif
|
2021-10-08 18:31:53 -07:00
|
|
|
mdev->ptp_clock_info.settime64 = mqnic_phc_settime;
|
|
|
|
mdev->ptp_clock_info.enable = mqnic_phc_enable;
|
|
|
|
mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info, mdev->dev);
|
|
|
|
|
|
|
|
if (IS_ERR(mdev->ptp_clock)) {
|
2022-04-16 23:23:20 -07:00
|
|
|
dev_err(mdev->dev, "%s: failed to register PHC (%ld)", __func__, PTR_ERR(mdev->ptp_clock));
|
2021-10-08 18:31:53 -07:00
|
|
|
mdev->ptp_clock = NULL;
|
2022-04-16 23:23:20 -07:00
|
|
|
return;
|
2021-10-08 18:31:53 -07:00
|
|
|
}
|
2022-04-16 23:23:20 -07:00
|
|
|
|
|
|
|
dev_info(mdev->dev, "registered PHC (index %d)", ptp_clock_index(mdev->ptp_clock));
|
|
|
|
|
|
|
|
mqnic_phc_set_from_system_clock(&mdev->ptp_clock_info);
|
2019-07-17 18:13:51 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
void mqnic_unregister_phc(struct mqnic_dev *mdev)
|
|
|
|
{
|
2021-10-08 18:31:53 -07:00
|
|
|
if (mdev->ptp_clock) {
|
|
|
|
ptp_clock_unregister(mdev->ptp_clock);
|
|
|
|
mdev->ptp_clock = NULL;
|
|
|
|
dev_info(mdev->dev, "unregistered PHC");
|
|
|
|
}
|
2019-07-17 18:13:51 -07:00
|
|
|
}
|