2022-04-16 12:33:50 -07:00
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# Placement constraints
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2023-03-24 00:39:18 -07:00
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create_pblock pblock_slr0
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2022-04-16 12:33:50 -07:00
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#add_cells_to_pblock [get_pblocks pblock_slr0] [get_cells -quiet ""]
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2023-03-24 00:39:18 -07:00
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resize_pblock [get_pblocks pblock_slr0] -add {SLR0}
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2022-04-16 12:33:50 -07:00
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create_pblock pblock_slr1
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add_cells_to_pblock [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/dma_if_mux_inst"]
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2023-03-30 00:10:59 -07:00
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add_cells_to_pblock -quiet [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/dma_if_mux.dma_if_mux_ctrl_inst"]
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add_cells_to_pblock -quiet [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/dma_if_mux.dma_if_mux_data_inst"]
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2022-05-02 13:16:20 -07:00
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add_cells_to_pblock [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/interface_rx_inst"]
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add_cells_to_pblock [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/interface_tx_inst"]
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add_cells_to_pblock [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/tx_fifo_inst"]
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add_cells_to_pblock [get_pblocks pblock_slr1] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/rx_fifo_inst"]
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2022-04-16 12:33:50 -07:00
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resize_pblock [get_pblocks pblock_slr1] -add {SLR1}
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2023-03-24 00:39:18 -07:00
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create_pblock pblock_slr2
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2022-04-16 12:33:50 -07:00
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#add_cells_to_pblock [get_pblocks pblock_slr2] [get_cells -quiet ""]
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2023-03-24 00:39:18 -07:00
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resize_pblock [get_pblocks pblock_slr2] -add {SLR2}
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2022-04-16 12:33:50 -07:00
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create_pblock pblock_pcie
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add_cells_to_pblock [get_pblocks pblock_pcie] [get_cells -quiet "pcie4_uscale_plus_inst"]
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add_cells_to_pblock [get_pblocks pblock_pcie] [get_cells -quiet "core_inst/core_inst/pcie_if_inst"]
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add_cells_to_pblock [get_pblocks pblock_pcie] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/pcie_axil_master_inst"]
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add_cells_to_pblock [get_pblocks pblock_pcie] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/dma_if_pcie_inst"]
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2022-06-02 23:58:29 -07:00
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add_cells_to_pblock [get_pblocks pblock_pcie] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/pcie_msix_inst"]
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2022-04-16 12:33:50 -07:00
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resize_pblock [get_pblocks pblock_pcie] -add {CLOCKREGION_X4Y5:CLOCKREGION_X5Y8}
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create_pblock pblock_eth
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2022-11-10 18:26:10 -08:00
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "qsfp0_cmac_inst"]
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "qsfp1_cmac_inst"]
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "qsfp2_cmac_inst"]
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "qsfp3_cmac_inst"]
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2022-05-04 09:03:37 -07:00
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/port[*].port_inst/port_tx_inst/tx_async_fifo_inst"]
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/port[*].port_inst/port_rx_inst/rx_async_fifo_inst"]
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add_cells_to_pblock [get_pblocks pblock_eth] [get_cells -quiet "core_inst/core_inst/core_pcie_inst/core_inst/iface[*].interface_inst/port[*].port_inst/port_tx_inst/tx_cpl_fifo_inst"]
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2022-04-16 12:33:50 -07:00
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resize_pblock [get_pblocks pblock_eth] -add {CLOCKREGION_X0Y1:CLOCKREGION_X0Y9}
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2022-11-10 18:26:10 -08:00
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# CMACs
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set_property LOC CMACE4_X0Y1 [get_cells -hierarchical -filter {NAME =~ qsfp0_cmac_inst/cmac_inst/inst/i_cmac_usplus_top/* && REF_NAME==CMACE4}]
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set_property LOC CMACE4_X0Y2 [get_cells -hierarchical -filter {NAME =~ qsfp1_cmac_inst/cmac_inst/inst/i_cmac_usplus_top/* && REF_NAME==CMACE4}]
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set_property LOC CMACE4_X0Y4 [get_cells -hierarchical -filter {NAME =~ qsfp2_cmac_inst/cmac_inst/inst/i_cmac_usplus_top/* && REF_NAME==CMACE4}]
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set_property LOC CMACE4_X0Y5 [get_cells -hierarchical -filter {NAME =~ qsfp3_cmac_inst/cmac_inst/inst/i_cmac_usplus_top/* && REF_NAME==CMACE4}]
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