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5 lines
161 B
Plaintext
5 lines
161 B
Plaintext
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# Timing constraints for cfgmclk
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# Fcfgmclk is 50 MHz +/- 15%, rounding to 15 ns period
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create_clock -period 15 -name cfgmclk [get_pins startupe3_inst/CFGMCLK]
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