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Code Issues Projects Releases Wiki Activity

Use absolute path to test directory

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This commit is contained in:
Alex Forencich 2020-12-28 19:25:59 -08:00
parent a894af4815
commit 0359d8d76a
30 changed files with 30 additions and 30 deletions
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2
example/ADM_PCIE_9V3/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -226,7 +226,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py
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@ -226,7 +226,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ATLYS/fpga/tb/fpga_core/test_fpga_core.py
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@ -147,7 +147,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/AU200/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -226,7 +226,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/AU250/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -226,7 +226,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/AU280/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -224,7 +224,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/AU50/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -180,7 +180,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/Arty/fpga/tb/fpga_core/test_fpga_core.py
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@ -145,7 +145,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/C10LP/fpga/tb/fpga_core/test_fpga_core.py
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@ -157,7 +157,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/DE2-115/fpga/tb/fpga_core/test_fpga_core.py
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@ -161,7 +161,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/DE5-Net/fpga/tb/fpga_core/test_fpga_core.py
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@ -151,7 +151,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py
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@ -158,7 +158,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ExaNIC_X25/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -158,7 +158,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/HXT100G/fpga/tb/fpga_core/test_fpga_core.py
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@ -217,7 +217,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/HXT100G/fpga_cxpt16/tb/fpga_core/test_fpga_core.py
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@ -204,7 +204,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/KC705/fpga_gmii/tb/fpga_core/test_fpga_core.py
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@ -148,7 +148,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ML605/fpga_gmii/tb/fpga_core/test_fpga_core.py
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@ -148,7 +148,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ML605/fpga_rgmii/tb/fpga_core/test_fpga_core.py
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@ -161,7 +161,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ML605/fpga_sgmii/tb/fpga_core/test_fpga_core.py
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@ -155,7 +155,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
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@ -182,7 +182,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/NexysVideo/fpga/tb/fpga_core/test_fpga_core.py
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@ -163,7 +163,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -288,7 +288,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU108/fpga_1g/tb/fpga_core/test_fpga_core.py
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@ -155,7 +155,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU118/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -332,7 +332,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU118/fpga_1g/tb/fpga_core/test_fpga_core.py
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@ -155,7 +155,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU118/fpga_25g/tb/fpga_core/test_fpga_core.py
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@ -332,7 +332,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/VCU1525/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -226,7 +226,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ZCU102/fpga/tb/fpga_core/test_fpga_core.py
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@ -189,7 +189,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/ZCU106/fpga/tb/fpga_core/test_fpga_core.py
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@ -167,7 +167,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))

2
example/fb2CG/fpga_10g/tb/fpga_core/test_fpga_core.py
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@ -224,7 +224,7 @@ async def run_test(dut):
# cocotb-test
tests_dir = os.path.dirname(__file__)
tests_dir = os.path.abspath(os.path.dirname(__file__))
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
lib_dir = os.path.abspath(os.path.join(rtl_dir, '..', 'lib'))
axis_rtl_dir = os.path.abspath(os.path.join(lib_dir, 'eth', 'lib', 'axis', 'rtl'))