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modules/mqnic: Add clock info support to mqnic kernel module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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6cfd808823
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@ -14,6 +14,7 @@ mqnic-y += mqnic_scheduler.o
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mqnic-y += mqnic_ptp.o
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mqnic-y += mqnic_i2c.o
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mqnic-y += mqnic_board.o
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mqnic-y += mqnic_clk_info.o
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mqnic-y += mqnic_tx.o
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mqnic-y += mqnic_rx.o
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mqnic-y += mqnic_cq.o
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@ -168,6 +168,7 @@ struct mqnic_dev {
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struct mqnic_reg_block *rb_list;
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struct mqnic_reg_block *fw_id_rb;
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struct mqnic_reg_block *if_rb;
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struct mqnic_reg_block *clk_info_rb;
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struct mqnic_reg_block *phc_rb;
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int dev_port_max;
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@ -184,6 +185,14 @@ struct mqnic_dev {
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u32 app_id;
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u32 core_clk_nom_per_ns_num;
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u32 core_clk_nom_per_ns_denom;
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u32 core_clk_nom_freq_hz;
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u32 ref_clk_nom_per_ns_num;
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u32 ref_clk_nom_per_ns_denom;
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u32 ref_clk_nom_freq_hz;
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u32 clk_info_channels;
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u32 if_offset;
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u32 if_count;
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u32 if_stride;
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@ -565,6 +574,13 @@ void mqnic_i2c_deinit(struct mqnic_dev *mqnic);
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int mqnic_board_init(struct mqnic_dev *mqnic);
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void mqnic_board_deinit(struct mqnic_dev *mqnic);
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// mqnic_clk_info.c
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void mqnic_clk_info_init(struct mqnic_dev *mdev);
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u32 mqnic_get_core_clk_nom_freq_hz(struct mqnic_dev *mdev);
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u32 mqnic_get_ref_clk_nom_freq_hz(struct mqnic_dev *mdev);
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u32 mqnic_get_core_clk_freq_hz(struct mqnic_dev *mdev);
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u32 mqnic_get_clk_freq_hz(struct mqnic_dev *mdev, int ch);
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// mqnic_eq.c
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int mqnic_create_eq_ring(struct mqnic_if *interface, struct mqnic_eq_ring **ring_ptr,
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int index, u8 __iomem *hw_addr);
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90
modules/mqnic/mqnic_clk_info.c
Normal file
90
modules/mqnic/mqnic_clk_info.c
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@ -0,0 +1,90 @@
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// SPDX-License-Identifier: BSD-2-Clause-Views
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/*
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* Copyright 2022, The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation
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* are those of the authors and should not be interpreted as representing
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* official policies, either expressed or implied, of The Regents of the
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* University of California.
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*/
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#include "mqnic.h"
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void mqnic_clk_info_init(struct mqnic_dev *mdev)
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{
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u32 val;
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mdev->clk_info_rb = mqnic_find_reg_block(mdev->rb_list, MQNIC_RB_CLK_INFO_TYPE, MQNIC_RB_CLK_INFO_VER, 0);
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if (!mdev->clk_info_rb)
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return;
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val = ioread32(mdev->clk_info_rb->regs + MQNIC_RB_CLK_INFO_REF_NOM_PER);
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mdev->ref_clk_nom_per_ns_num = val >> 16;
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mdev->ref_clk_nom_per_ns_denom = val & 0xffff;
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mdev->ref_clk_nom_freq_hz = (mdev->ref_clk_nom_per_ns_denom * 1000000000ull) / mdev->ref_clk_nom_per_ns_num;
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val = ioread32(mdev->clk_info_rb->regs + MQNIC_RB_CLK_INFO_CLK_NOM_PER);
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mdev->core_clk_nom_per_ns_num = val >> 16;
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mdev->core_clk_nom_per_ns_denom = val & 0xffff;
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mdev->core_clk_nom_freq_hz = (mdev->core_clk_nom_per_ns_denom * 1000000000ull) / mdev->core_clk_nom_per_ns_num;
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mdev->clk_info_channels = ioread32(mdev->clk_info_rb->regs + MQNIC_RB_CLK_INFO_COUNT);
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}
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u32 mqnic_get_core_clk_nom_freq_hz(struct mqnic_dev *mdev)
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{
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return mdev->core_clk_nom_freq_hz;
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}
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EXPORT_SYMBOL(mqnic_get_core_clk_nom_freq_hz);
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u32 mqnic_get_ref_clk_nom_freq_hz(struct mqnic_dev *mdev)
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{
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return mdev->ref_clk_nom_freq_hz;
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}
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EXPORT_SYMBOL(mqnic_get_ref_clk_nom_freq_hz);
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u32 mqnic_get_core_clk_freq_hz(struct mqnic_dev *mdev)
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{
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if (!mdev->clk_info_rb)
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return 0;
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return ioread32(mdev->clk_info_rb->regs + MQNIC_RB_CLK_INFO_CLK_FREQ);
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}
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EXPORT_SYMBOL(mqnic_get_core_clk_freq_hz);
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u32 mqnic_get_clk_freq_hz(struct mqnic_dev *mdev, int ch)
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{
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if (!mdev->clk_info_rb || ch < 0 || ch >= mdev->clk_info_channels)
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return 0;
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return ioread32(mdev->clk_info_rb->regs + MQNIC_RB_CLK_INFO_FREQ_BASE + ch*4);
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}
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EXPORT_SYMBOL(mqnic_get_clk_freq_hz);
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@ -333,6 +333,8 @@ static int mqnic_common_probe(struct mqnic_dev *mqnic)
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dev_info(dev, "Application ID: 0x%08x", mqnic->app_id);
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}
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mqnic_clk_info_init(mqnic);
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mqnic->phc_rb = mqnic_find_reg_block(mqnic->rb_list, MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER, 0);
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// Enumerate interfaces
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