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fpga/mqnic: Remove extraneous top-level parameter RX_RSS_ENABLE from config.tcl scripts

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-12-03 21:32:51 -08:00
parent 347a03b347
commit 0644a12a48
65 changed files with 0 additions and 65 deletions
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1
fpga/mqnic/250_SoC/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/250_SoC/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/250_SoC/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga_tdma/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_tdma/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU200/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU200/fpga_100g/fpga_app_dma_bench/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU200/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU250/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU250/fpga_100g/fpga_app_dma_bench/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU250/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU280/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU280/fpga_100g/fpga_app_dma_bench/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU280/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU50/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU50/fpga_100g/fpga_app_dma_bench/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU50/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_100g/fpga_24AR0/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "0"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_100g/fpga_24B/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "0"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_25g/fpga_10g_24AR0/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_25g/fpga_10g_24B/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_25g/fpga_24AR0/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DE10_Agilex/fpga_25g/fpga_24B/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku040/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku060/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/Nexus_K35_S/fpga/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/Nexus_K3P_Q/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/Nexus_K3P_Q/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/Nexus_K3P_S/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/Nexus_K3P_S/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10DX_DK/fpga_25g/fpga/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10DX_DK/fpga_25g/fpga_10g/config.tcl
View File

@ -126,7 +126,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10MX_DK/fpga_25g/fpga_10g_1sm21b/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10MX_DK/fpga_25g/fpga_10g_1sm21c/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10MX_DK/fpga_25g/fpga_1sm21b/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/S10MX_DK/fpga_25g/fpga_1sm21c/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU108/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "0"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU108/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU118/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/VCU1525/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ZCU102/fpga/fpga/config.tcl
View File

@ -122,7 +122,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl
View File

@ -130,7 +130,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl
View File

@ -122,7 +122,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_100g/fpga_app_dma_bench/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_100g/fpga_app_template/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_100g/fpga_tdma/config.tcl
View File

@ -127,7 +127,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"

1
fpga/mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl
View File

@ -139,7 +139,6 @@ dict set params TDMA_INDEX_WIDTH "6"
dict set params PTP_TS_ENABLE "1"
dict set params TX_CPL_FIFO_DEPTH "32"
dict set params TX_CHECKSUM_ENABLE "1"
dict set params RX_RSS_ENABLE "1"
dict set params RX_HASH_ENABLE "1"
dict set params RX_CHECKSUM_ENABLE "1"
dict set params TX_FIFO_DEPTH "32768"