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Split some long-running tests

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-01-26 21:55:58 -08:00
parent 73728d1994
commit 0c951a4e5a
9 changed files with 113 additions and 22 deletions
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26
tb/dma_if_axi/test_dma_if_axi.py
View File

@ -117,6 +117,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
ram_byte_lanes = tb.dma_ram.write_if.byte_lanes
tag_count = 2**len(tb.write_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -127,7 +132,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.write_enable.value = 1
for length in list(range(1, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]:
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
for ram_offset in range(1):
tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset)
axi_addr = axi_offset+0x1000
@ -168,6 +173,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
ram_byte_lanes = tb.dma_ram.write_if.byte_lanes
tag_count = 2**len(tb.read_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -178,7 +188,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.read_enable.value = 1
for length in list(range(1, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]:
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
for ram_offset in range(1):
tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset)
axi_addr = axi_offset+0x1000
@ -218,6 +228,11 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None
axi_byte_lanes = tb.axi_ram.write_if.byte_lanes
tag_count = 2**len(tb.write_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -228,7 +243,7 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None
tb.dut.write_enable.value = 1
for length in list(range(1, len(dut.s_axis_write_desc_imm) // 8)):
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
tb.log.info("length %d, axi_offset %d", length, axi_offset)
axi_addr = axi_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -278,8 +293,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axi_data_width", [64, 128])
def test_dma_if_axi(request, axi_data_width):
def test_dma_if_axi(request, axi_data_width, offset_group):
dut = "dma_if_axi"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -313,6 +329,8 @@ def test_dma_if_axi(request, axi_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', ''))

12
tb/dma_if_axi_rd/test_dma_if_axi_rd.py
View File

@ -109,6 +109,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
ram_byte_lanes = tb.dma_ram.byte_lanes
tag_count = 2**len(tb.read_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -119,7 +124,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.enable.value = 1
for length in list(range(0, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]:
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
for ram_offset in range(ram_byte_lanes+1):
tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset)
axi_addr = axi_offset+0x1000
@ -170,8 +175,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axi_data_width", [64, 128])
def test_dma_if_axi_rd(request, axi_data_width):
def test_dma_if_axi_rd(request, axi_data_width, offset_group):
dut = "dma_if_axi_rd"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -199,6 +205,8 @@ def test_dma_if_axi_rd(request, axi_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', ''))

19
tb/dma_if_axi_wr/test_dma_if_axi_wr.py
View File

@ -110,6 +110,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
ram_byte_lanes = tb.dma_ram.byte_lanes
tag_count = 2**len(tb.write_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -120,7 +125,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.enable.value = 1
for length in list(range(0, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]:
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
for ram_offset in range(ram_byte_lanes+1):
tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset)
axi_addr = axi_offset+0x1000
@ -160,6 +165,11 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None
axi_byte_lanes = tb.axi_ram.byte_lanes
tag_count = 2**len(tb.write_desc_source.bus.tag)
axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
axi_offsets = axi_offsets[group::8]
cur_tag = 1
tb.set_idle_generator(idle_inserter)
@ -170,7 +180,7 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None
tb.dut.enable.value = 1
for length in list(range(1, len(dut.s_axis_write_desc_imm) // 8)):
for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)):
for axi_offset in axi_offsets:
tb.log.info("length %d, axi_offset %d", length, axi_offset)
axi_addr = axi_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -220,8 +230,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axi_data_width", [64, 128])
def test_dma_if_axi_wr(request, axi_data_width):
def test_dma_if_axi_wr(request, axi_data_width, offset_group):
dut = "dma_if_axi_wr"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -251,6 +262,8 @@ def test_dma_if_axi_wr(request, axi_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', ''))

16
tb/pcie_axi_master/test_pcie_axi_master.py
View File

@ -147,6 +147,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.write_if.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -162,7 +167,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.completer_id.value = int(tb.dev.functions[0].pcie_id)
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -190,6 +195,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.read_if.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -314,8 +324,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("pcie_data_width", [64, 128])
def test_pcie_axi_master(request, pcie_data_width):
def test_pcie_axi_master(request, pcie_data_width, offset_group):
dut = "pcie_axi_master"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -343,6 +354,7 @@ def test_pcie_axi_master(request, pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",

11
tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py
View File

@ -147,6 +147,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -162,7 +167,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
tb.dut.completer_id.value = int(tb.dev.functions[0].pcie_id)
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -292,8 +297,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("pcie_data_width", [64, 128])
def test_pcie_axi_master_rd(request, pcie_data_width):
def test_pcie_axi_master_rd(request, pcie_data_width, offset_group):
dut = "pcie_axi_master_rd"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -317,6 +323,7 @@ def test_pcie_axi_master_rd(request, pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",

11
tb/pcie_axi_master_wr/test_pcie_axi_master_wr.py
View File

@ -133,6 +133,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -146,7 +151,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
dev_bar0 = dev.bar_window[0]
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -265,8 +270,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("pcie_data_width", [64, 128])
def test_pcie_axi_master_wr(request, pcie_data_width):
def test_pcie_axi_master_wr(request, pcie_data_width, offset_group):
dut = "pcie_axi_master_wr"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -289,6 +295,7 @@ def test_pcie_axi_master_wr(request, pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",

18
tb/pcie_us_axi_master/test_pcie_us_axi_master.py
View File

@ -180,6 +180,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.write_if.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -194,7 +199,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
dev_bar0 = dev.bar_window[0]
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in range(byte_lanes):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -222,6 +227,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.read_if.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -236,7 +246,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
dev_bar0 = dev.bar_window[0]
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in range(byte_lanes):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -340,8 +350,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512])
def test_pcie_us_axi_master(request, axis_pcie_data_width):
def test_pcie_us_axi_master(request, axis_pcie_data_width, offset_group):
dut = "pcie_us_axi_master"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -368,6 +379,7 @@ def test_pcie_us_axi_master(request, axis_pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",

11
tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py
View File

@ -177,6 +177,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -191,7 +196,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
dev_bar0 = dev.bar_window[0]
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -317,8 +322,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512])
def test_pcie_us_axi_master_rd(request, axis_pcie_data_width):
def test_pcie_us_axi_master_rd(request, axis_pcie_data_width, offset_group):
dut = "pcie_us_axi_master_rd"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -341,6 +347,7 @@ def test_pcie_us_axi_master_rd(request, axis_pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",

11
tb/pcie_us_axi_master_wr/test_pcie_us_axi_master_wr.py
View File

@ -162,6 +162,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
byte_lanes = tb.axi_ram.byte_lanes
pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096))
if os.getenv("OFFSET_GROUP") is not None:
group = int(os.getenv("OFFSET_GROUP"))
pcie_offsets = pcie_offsets[group::8]
tb.set_idle_generator(idle_inserter)
tb.set_backpressure_generator(backpressure_inserter)
@ -176,7 +181,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
dev_bar0 = dev.bar_window[0]
for length in list(range(0, byte_lanes*2))+[1024]:
for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)):
for pcie_offset in pcie_offsets:
tb.log.info("length %d, pcie_offset %d", length, pcie_offset)
pcie_addr = pcie_offset+0x1000
test_data = bytearray([x % 256 for x in range(length)])
@ -293,8 +298,9 @@ tests_dir = os.path.dirname(__file__)
rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl'))
@pytest.mark.parametrize("offset_group", list(range(8)))
@pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512])
def test_pcie_us_axi_master_wr(request, axis_pcie_data_width):
def test_pcie_us_axi_master_wr(request, axis_pcie_data_width, offset_group):
dut = "pcie_us_axi_master_wr"
module = os.path.splitext(os.path.basename(__file__))[0]
toplevel = dut
@ -316,6 +322,7 @@ def test_pcie_us_axi_master_wr(request, axis_pcie_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['OFFSET_GROUP'] = str(offset_group)
extra_env['COCOTB_RESOLVE_X'] = 'RANDOM'
sim_build = os.path.join(tests_dir, "sim_build",