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Put back lane shifting logic

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This commit is contained in:
Alex Forencich 2014-10-28 00:54:15 -07:00
parent 205be7ed27
commit 0e26b3a8a4
4 changed files with 104 additions and 121 deletions
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6
rtl/eth_axis_rx.v
View File

@ -104,13 +104,13 @@ reg store_eth_type_1;
reg [7:0] frame_ptr_reg = 0, frame_ptr_next;
reg input_axis_tready_reg = 0, input_axis_tready_next;
reg output_eth_hdr_valid_reg = 0, output_eth_hdr_valid_next;
reg [47:0] output_eth_dest_mac_reg = 0;
reg [47:0] output_eth_src_mac_reg = 0;
reg [15:0] output_eth_type_reg = 0;
reg input_axis_tready_reg = 0, input_axis_tready_next;
reg busy_reg = 0;
reg error_header_early_termination_reg = 0, error_header_early_termination_next;
@ -228,7 +228,7 @@ always @* begin
input_axis_tready_next = output_eth_payload_tready_int_early;
output_eth_payload_tdata_int = input_axis_tdata;
output_eth_payload_tvalid_int = input_axis_tvalid & input_axis_tready;
output_eth_payload_tvalid_int = input_axis_tvalid;
output_eth_payload_tlast_int = input_axis_tlast;
output_eth_payload_tuser_int = input_axis_tuser;

94
rtl/eth_axis_rx_64.v
View File

@ -84,8 +84,7 @@ with the payload in a separate AXI stream.
localparam [2:0]
STATE_IDLE = 3'd0,
STATE_READ_HEADER = 3'd1,
STATE_READ_PAYLOAD = 3'd2,
STATE_READ_PAYLOAD_LAST = 3'd3;
STATE_READ_PAYLOAD = 3'd2;
reg [2:0] state_reg = STATE_IDLE, state_next;
@ -98,22 +97,29 @@ reg transfer_in_save;
reg [7:0] frame_ptr_reg = 0, frame_ptr_next;
reg input_axis_tready_reg = 0, input_axis_tready_next;
reg output_eth_hdr_valid_reg = 0, output_eth_hdr_valid_next;
reg [47:0] output_eth_dest_mac_reg = 0;
reg [47:0] output_eth_src_mac_reg = 0;
reg [15:0] output_eth_type_reg = 0;
reg input_axis_tready_reg = 0, input_axis_tready_next;
reg busy_reg = 0;
reg error_header_early_termination_reg = 0, error_header_early_termination_next;
reg [63:0] save_axis_tdata_reg = 0;
reg [7:0] save_axis_tkeep_reg = 0;
reg save_axis_tvalid_reg = 0;
reg save_axis_tlast_reg = 0;
reg save_axis_tuser_reg = 0;
reg [63:0] shift_axis_tdata;
reg [7:0] shift_axis_tkeep;
reg shift_axis_tvalid;
reg shift_axis_tlast;
reg shift_axis_tuser;
reg shift_axis_input_tready;
reg shift_axis_extra_cycle;
// internal datapath
reg [63:0] output_eth_payload_tdata_int;
reg [7:0] output_eth_payload_tkeep_int;
@ -133,6 +139,28 @@ assign output_eth_type = output_eth_type_reg;
assign busy = busy_reg;
assign error_header_early_termination = error_header_early_termination_reg;
always @* begin
shift_axis_tdata[15:0] = save_axis_tdata_reg[63:48];
shift_axis_tkeep[1:0] = save_axis_tkeep_reg[7:6];
shift_axis_extra_cycle = save_axis_tlast_reg & (save_axis_tkeep_reg[7:6] != 0);
if (shift_axis_extra_cycle) begin
shift_axis_tdata[63:16] = 0;
shift_axis_tkeep[7:2] = 0;
shift_axis_tvalid = 1;
shift_axis_tlast = save_axis_tlast_reg;
shift_axis_tuser = save_axis_tuser_reg;
shift_axis_input_tready = flush_save;
end else begin
shift_axis_tdata[63:16] = input_axis_tdata[47:0];
shift_axis_tkeep[7:2] = input_axis_tkeep[5:0];
shift_axis_tvalid = input_axis_tvalid;
shift_axis_tlast = (input_axis_tlast & (input_axis_tkeep[7:6] == 0));
shift_axis_tuser = (input_axis_tuser & (input_axis_tkeep[7:6] == 0));
shift_axis_input_tready = ~(input_axis_tlast & input_axis_tvalid & transfer_in_save);
end
end
always @* begin
state_next = 2'bz;
@ -201,7 +229,7 @@ always @* begin
if (input_axis_tlast) begin
if (input_axis_tkeep[7:6] != 0) begin
input_axis_tready_next = 0;
state_next = STATE_READ_PAYLOAD_LAST;
state_next = STATE_READ_PAYLOAD;
end else begin
flush_save = 1;
output_eth_hdr_valid_next = 0;
@ -216,29 +244,21 @@ always @* begin
end
STATE_READ_PAYLOAD: begin
// read payload
input_axis_tready_next = output_eth_payload_tready_int_early;
input_axis_tready_next = output_eth_payload_tready_int_early & shift_axis_input_tready;
output_eth_payload_tdata_int[15:0] = save_axis_tdata_reg[63:48];
output_eth_payload_tkeep_int[1:0] = save_axis_tkeep_reg[7:6];
output_eth_payload_tdata_int = shift_axis_tdata;
output_eth_payload_tkeep_int = shift_axis_tkeep;
output_eth_payload_tvalid_int = shift_axis_tvalid;
output_eth_payload_tlast_int = shift_axis_tlast;
output_eth_payload_tuser_int = shift_axis_tuser;
output_eth_payload_tdata_int[63:16] = input_axis_tdata[47:0];
output_eth_payload_tkeep_int[7:2] = input_axis_tkeep[5:0];
output_eth_payload_tvalid_int = save_axis_tvalid_reg & input_axis_tvalid & input_axis_tready;
output_eth_payload_tlast_int = (input_axis_tlast & (input_axis_tkeep[7:6] == 0));
output_eth_payload_tuser_int = (input_axis_tuser & (input_axis_tkeep[7:6] == 0));
if (input_axis_tready & input_axis_tvalid) begin
if (output_eth_payload_tready_int & shift_axis_tvalid) begin
// word transfer through
transfer_in_save = 1;
if (input_axis_tlast) begin
if (input_axis_tkeep[7:6] != 0) begin
input_axis_tready_next = 0;
state_next = STATE_READ_PAYLOAD_LAST;
end else begin
flush_save = 1;
input_axis_tready_next = ~output_eth_hdr_valid_reg;
state_next = STATE_IDLE;
end
if (shift_axis_tlast) begin
flush_save = 1;
input_axis_tready_next = ~output_eth_hdr_valid_reg;
state_next = STATE_IDLE;
end else begin
state_next = STATE_READ_PAYLOAD;
end
@ -246,27 +266,6 @@ always @* begin
state_next = STATE_READ_PAYLOAD;
end
end
STATE_READ_PAYLOAD_LAST: begin
// read last payload word from save reg
input_axis_tready_next = 0;
output_eth_payload_tdata_int[15:0] = save_axis_tdata_reg[63:48];
output_eth_payload_tkeep_int[1:0] = save_axis_tkeep_reg[7:6];
output_eth_payload_tdata_int[63:16] = 0;
output_eth_payload_tkeep_int[7:2] = 0;
output_eth_payload_tvalid_int = 1;
output_eth_payload_tlast_int = 1;
output_eth_payload_tuser_int = save_axis_tuser_reg;
if (output_eth_payload_tready_int) begin
flush_save = 1;
input_axis_tready_next = ~output_eth_hdr_valid_reg;
state_next = STATE_IDLE;
end else begin
state_next = STATE_READ_PAYLOAD_LAST;
end
end
endcase
end
@ -281,7 +280,6 @@ always @(posedge clk or posedge rst) begin
output_eth_type_reg <= 0;
save_axis_tdata_reg <= 0;
save_axis_tkeep_reg <= 0;
save_axis_tvalid_reg <= 0;
save_axis_tlast_reg <= 0;
save_axis_tuser_reg <= 0;
busy_reg <= 0;
@ -322,13 +320,11 @@ always @(posedge clk or posedge rst) begin
if (flush_save) begin
save_axis_tdata_reg <= 0;
save_axis_tkeep_reg <= 0;
save_axis_tvalid_reg <= 0;
save_axis_tlast_reg <= 0;
save_axis_tuser_reg <= 0;
end else if (transfer_in_save) begin
save_axis_tdata_reg <= input_axis_tdata;
save_axis_tkeep_reg <= input_axis_tkeep;
save_axis_tvalid_reg <= input_axis_tvalid;
save_axis_tlast_reg <= input_axis_tlast;
save_axis_tuser_reg <= input_axis_tuser;
end

4
rtl/eth_axis_tx.v
View File

@ -133,14 +133,12 @@ always @* begin
frame_ptr_next = 0;
input_eth_hdr_ready_next = 1;
if (input_eth_hdr_valid) begin
if (input_eth_hdr_ready & input_eth_hdr_valid) begin
store_eth_hdr = 1;
input_eth_hdr_ready_next = 0;
if (output_axis_tready_int) begin
output_axis_tvalid_int = 1;
output_axis_tdata_int = input_eth_dest_mac[47:40];
output_axis_tlast_int = 0;
output_axis_tuser_int = 0;
frame_ptr_next = 1;
end
state_next = STATE_WRITE_HEADER;

121
rtl/eth_axis_tx_64.v
View File

@ -84,8 +84,7 @@ localparam [2:0]
STATE_IDLE = 3'd0,
STATE_WRITE_HEADER = 3'd1,
STATE_WRITE_HEADER_LAST = 3'd2,
STATE_WRITE_PAYLOAD = 3'd3,
STATE_WRITE_PAYLOAD_LAST = 3'd4;
STATE_WRITE_PAYLOAD = 3'd3;
reg [2:0] state_reg = STATE_IDLE, state_next;
@ -108,10 +107,17 @@ reg busy_reg = 0;
reg [63:0] save_eth_payload_tdata_reg = 0;
reg [7:0] save_eth_payload_tkeep_reg = 0;
reg save_eth_payload_tvalid_reg = 0;
reg save_eth_payload_tlast_reg = 0;
reg save_eth_payload_tuser_reg = 0;
reg [63:0] shift_eth_payload_tdata;
reg [7:0] shift_eth_payload_tkeep;
reg shift_eth_payload_tvalid;
reg shift_eth_payload_tlast;
reg shift_eth_payload_tuser;
reg shift_eth_payload_input_tready;
reg shift_eth_payload_extra_cycle;
// internal datapath
reg [63:0] output_axis_tdata_int;
reg [7:0] output_axis_tkeep_int;
@ -126,6 +132,28 @@ assign input_eth_payload_tready = input_eth_payload_tready_reg;
assign busy = busy_reg;
always @* begin
shift_eth_payload_tdata[47:0] = save_eth_payload_tdata_reg[63:16];
shift_eth_payload_tkeep[5:0] = save_eth_payload_tkeep_reg[7:2];
shift_eth_payload_extra_cycle = save_eth_payload_tlast_reg & (save_eth_payload_tkeep_reg[7:2] != 0);
if (shift_eth_payload_extra_cycle) begin
shift_eth_payload_tdata[63:48] = 0;
shift_eth_payload_tkeep[7:6] = 0;
shift_eth_payload_tvalid = 1;
shift_eth_payload_tlast = save_eth_payload_tlast_reg;
shift_eth_payload_tuser = save_eth_payload_tuser_reg;
shift_eth_payload_input_tready = flush_save;
end else begin
shift_eth_payload_tdata[63:48] = input_eth_payload_tdata[15:0];
shift_eth_payload_tkeep[7:6] = input_eth_payload_tkeep[1:0];
shift_eth_payload_tvalid = input_eth_payload_tvalid;
shift_eth_payload_tlast = (input_eth_payload_tlast & (input_eth_payload_tkeep[7:2] == 0));
shift_eth_payload_tuser = (input_eth_payload_tuser & (input_eth_payload_tkeep[7:2] == 0));
shift_eth_payload_input_tready = ~(input_eth_payload_tlast & input_eth_payload_tvalid & transfer_in_save);
end
end
always @* begin
state_next = 2'bz;
@ -152,7 +180,7 @@ always @* begin
flush_save = 1;
input_eth_hdr_ready_next = 1;
if (input_eth_hdr_valid) begin
if (input_eth_hdr_ready & input_eth_hdr_valid) begin
store_eth_hdr = 1;
input_eth_hdr_ready_next = 0;
state_next = STATE_WRITE_HEADER;
@ -167,8 +195,6 @@ always @* begin
output_axis_tdata_int[55:48] = input_eth_src_mac[47:40];
output_axis_tdata_int[63:56] = input_eth_src_mac[39:32];
output_axis_tkeep_int = 8'hff;
output_axis_tlast_int = 0;
output_axis_tuser_int = 0;
frame_ptr_next = 8;
input_eth_payload_tready_next = output_axis_tready_int_early;
state_next = STATE_WRITE_HEADER_LAST;
@ -194,9 +220,7 @@ always @* begin
output_axis_tdata_int[55:48] = input_eth_src_mac[47:40];
output_axis_tdata_int[63:56] = input_eth_src_mac[39:32];
output_axis_tkeep_int = 8'hff;
output_axis_tlast_int = 0;
output_axis_tuser_int = 0;
input_eth_payload_tready_next = output_axis_tready_int_early;
input_eth_payload_tready_next = output_axis_tready_int_early & shift_eth_payload_input_tready;
state_next = STATE_WRITE_HEADER_LAST;
end
endcase
@ -206,9 +230,9 @@ always @* begin
end
STATE_WRITE_HEADER_LAST: begin
// last header word requires first payload word; process accordingly
input_eth_payload_tready_next = output_axis_tready_int_early;
input_eth_payload_tready_next = output_axis_tready_int_early & shift_eth_payload_input_tready;
if (input_eth_payload_tready & input_eth_payload_tvalid) begin
if (input_eth_payload_tready & shift_eth_payload_tvalid) begin
frame_ptr_next = frame_ptr_reg + 8;
output_axis_tvalid_int = 1;
transfer_in_save = 1;
@ -219,21 +243,17 @@ always @* begin
output_axis_tdata_int[31:24] = eth_src_mac_reg[ 7: 0];
output_axis_tdata_int[39:32] = eth_type_reg[15: 8];
output_axis_tdata_int[47:40] = eth_type_reg[ 7: 0];
output_axis_tdata_int[55:48] = input_eth_payload_tdata[ 7: 0];
output_axis_tdata_int[63:56] = input_eth_payload_tdata[15: 8];
output_axis_tkeep_int = {input_eth_payload_tkeep[1:0], 6'h3F};
output_axis_tlast_int = (input_eth_payload_tlast & (input_eth_payload_tkeep[7:2] == 0));
output_axis_tuser_int = (input_eth_payload_tuser & (input_eth_payload_tkeep[7:2] == 0));
output_axis_tdata_int[55:48] = shift_eth_payload_tdata[55:48];
output_axis_tdata_int[63:56] = shift_eth_payload_tdata[63:56];
output_axis_tkeep_int = {shift_eth_payload_tkeep[7:6], 6'h3F};
output_axis_tlast_int = shift_eth_payload_tlast;
output_axis_tuser_int = shift_eth_payload_tuser;
if (input_eth_payload_tlast) begin
if (shift_eth_payload_tlast) begin
input_eth_payload_tready_next = 0;
if (input_eth_payload_tkeep[7:2] != 0) begin
state_next = STATE_WRITE_PAYLOAD_LAST;
end else begin
flush_save = 1;
input_eth_hdr_ready_next = 1;
state_next = STATE_IDLE;
end
flush_save = 1;
input_eth_hdr_ready_next = 1;
state_next = STATE_IDLE;
end else begin
state_next = STATE_WRITE_PAYLOAD;
end
@ -243,29 +263,22 @@ always @* begin
end
STATE_WRITE_PAYLOAD: begin
// write payload
input_eth_payload_tready_next = output_axis_tready_int_early;
input_eth_payload_tready_next = output_axis_tready_int_early & shift_eth_payload_input_tready;
output_axis_tdata_int[47:0] = save_eth_payload_tdata_reg[63:16];
output_axis_tkeep_int[5:0] = save_eth_payload_tkeep_reg[7:2];
output_axis_tdata_int = shift_eth_payload_tdata;
output_axis_tkeep_int = shift_eth_payload_tkeep;
output_axis_tvalid_int = shift_eth_payload_tvalid;
output_axis_tlast_int = shift_eth_payload_tlast;
output_axis_tuser_int = shift_eth_payload_tuser;
output_axis_tdata_int[63:48] = input_eth_payload_tdata[15:0];
output_axis_tkeep_int[7:6] = input_eth_payload_tkeep[1:0];
output_axis_tvalid_int = input_eth_payload_tvalid;
output_axis_tlast_int = (input_eth_payload_tlast & (input_eth_payload_tkeep[7:2] == 0));
output_axis_tuser_int = (input_eth_payload_tuser & (input_eth_payload_tkeep[7:2] == 0));
if (input_eth_payload_tready & input_eth_payload_tvalid) begin
if (output_axis_tready_int & shift_eth_payload_tvalid) begin
// word transfer through
transfer_in_save = 1;
if (input_eth_payload_tlast) begin
if (shift_eth_payload_tlast) begin
input_eth_payload_tready_next = 0;
if (input_eth_payload_tkeep[7:2] != 0) begin
state_next = STATE_WRITE_PAYLOAD_LAST;
end else begin
flush_save = 1;
input_eth_hdr_ready_next = 1;
state_next = STATE_IDLE;
end
flush_save = 1;
input_eth_hdr_ready_next = 1;
state_next = STATE_IDLE;
end else begin
state_next = STATE_WRITE_PAYLOAD;
end
@ -273,27 +286,6 @@ always @* begin
state_next = STATE_WRITE_PAYLOAD;
end
end
STATE_WRITE_PAYLOAD_LAST: begin
// read last payload word from save reg
input_eth_payload_tready_next = 0;
output_axis_tdata_int[47:0] = save_eth_payload_tdata_reg[63:16];
output_axis_tkeep_int[5:0] = save_eth_payload_tkeep_reg[7:2];
output_axis_tdata_int[63:48] = 0;
output_axis_tkeep_int[7:6] = 0;
output_axis_tvalid_int = 1;
output_axis_tlast_int = 1;
output_axis_tuser_int = save_eth_payload_tuser_reg;
if (output_axis_tready_int) begin
flush_save = 1;
input_eth_hdr_ready_next = 1;
state_next = STATE_IDLE;
end else begin
state_next = STATE_WRITE_PAYLOAD_LAST;
end
end
endcase
end
@ -308,7 +300,6 @@ always @(posedge clk or posedge rst) begin
eth_type_reg <= 0;
save_eth_payload_tdata_reg <= 0;
save_eth_payload_tkeep_reg <= 0;
save_eth_payload_tvalid_reg <= 0;
save_eth_payload_tlast_reg <= 0;
save_eth_payload_tuser_reg <= 0;
busy_reg <= 0;
@ -333,13 +324,11 @@ always @(posedge clk or posedge rst) begin
if (flush_save) begin
save_eth_payload_tdata_reg <= 0;
save_eth_payload_tkeep_reg <= 0;
save_eth_payload_tvalid_reg <= 0;
save_eth_payload_tlast_reg <= 0;
save_eth_payload_tuser_reg <= 0;
end else if (transfer_in_save) begin
save_eth_payload_tdata_reg <= input_eth_payload_tdata;
save_eth_payload_tkeep_reg <= input_eth_payload_tkeep;
save_eth_payload_tvalid_reg <= input_eth_payload_tvalid;
save_eth_payload_tlast_reg <= input_eth_payload_tlast;
save_eth_payload_tuser_reg <= input_eth_payload_tuser;
end