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Increase crossbar threads count

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This commit is contained in:
Alex Forencich 2019-09-11 18:06:14 -07:00
parent 5048864d86
commit 132d44cd90
9 changed files with 9 additions and 9 deletions
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2
fpga/common/rtl/interface.v
View File

@ -2155,7 +2155,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({AXI_S_COUNT{32'd2}}),
.S_THREADS({AXI_S_COUNT{32'd4}}),
.S_ACCEPT({AXI_S_COUNT{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(RAM_BASE_ADDR),

2
fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga_core.v
View File

@ -1536,7 +1536,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v
View File

@ -1533,7 +1533,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v
View File

@ -1556,7 +1556,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic/VCU118/fpga_10g/rtl/fpga_core.v
View File

@ -1475,7 +1475,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga_core.v
View File

@ -1536,7 +1536,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v
View File

@ -1533,7 +1533,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v
View File

@ -1556,7 +1556,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),

2
fpga/mqnic_tdma/VCU118/fpga_10g/rtl/fpga_core.v
View File

@ -1475,7 +1475,7 @@ axi_crossbar #(
.BUSER_ENABLE(0),
.ARUSER_ENABLE(0),
.RUSER_ENABLE(0),
.S_THREADS({2{32'd2}}),
.S_THREADS({2{32'd4}}),
.S_ACCEPT({2{32'd16}}),
.M_REGIONS(1),
.M_BASE_ADDR(IF_AXI_BASE_ADDR),