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Combine interface control blocks

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This commit is contained in:
Alex Forencich 2022-01-15 21:53:13 -08:00
parent 0f82e0c5f3
commit 137a6778da
13 changed files with 90 additions and 151 deletions
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43
fpga/common/rtl/mqnic_interface.v
View File

@ -939,11 +939,10 @@ always @(posedge clk) begin
// write operation
ctrl_reg_wr_ack_reg <= 1'b1;
case ({ctrl_reg_wr_addr >> 2, 2'b00})
// Interface control (TX)
RBB+8'h14: tx_mtu_reg <= ctrl_reg_wr_data; // IF TX ctrl: TX MTU
// Interface control (RX)
RBB+8'h34: rx_mtu_reg <= ctrl_reg_wr_data; // IF RX ctrl: RX MTU
RBB+8'h38: rss_mask_reg <= ctrl_reg_wr_data; // IF RX ctrl: RSS mask
// Interface control
RBB+8'h18: tx_mtu_reg <= ctrl_reg_wr_data; // IF ctrl: TX MTU
RBB+8'h1C: rx_mtu_reg <= ctrl_reg_wr_data; // IF ctrl: RX MTU
RBB+8'h20: rss_mask_reg <= ctrl_reg_wr_data; // IF ctrl: RSS mask
default: ctrl_reg_wr_ack_reg <= 1'b0;
endcase
end
@ -952,31 +951,23 @@ always @(posedge clk) begin
// read operation
ctrl_reg_rd_ack_reg <= 1'b1;
case ({ctrl_reg_rd_addr >> 2, 2'b00})
// Interface control (TX)
RBB+8'h00: ctrl_reg_rd_data_reg <= 32'h0000C001; // IF TX ctrl: Type
RBB+8'h04: ctrl_reg_rd_data_reg <= 32'h00000100; // IF TX ctrl: Version
RBB+8'h08: ctrl_reg_rd_data_reg <= RB_BASE_ADDR+8'h20; // IF TX ctrl: Next header
// Interface control
RBB+8'h00: ctrl_reg_rd_data_reg <= 32'h0000C001; // IF ctrl: Type
RBB+8'h04: ctrl_reg_rd_data_reg <= 32'h00000200; // IF ctrl: Version
RBB+8'h08: ctrl_reg_rd_data_reg <= RB_BASE_ADDR+8'h40; // IF ctrl: Next header
RBB+8'h0C: begin
// IF TX ctrl: features
ctrl_reg_rd_data_reg[4] <= PTP_TS_ENABLE;
ctrl_reg_rd_data_reg[8] <= TX_CHECKSUM_ENABLE;
end
RBB+8'h10: ctrl_reg_rd_data_reg <= MAX_TX_SIZE; // IF TX ctrl: Max TX MTU
RBB+8'h14: ctrl_reg_rd_data_reg <= tx_mtu_reg; // IF TX ctrl: TX MTU
// Interface control (RX)
RBB+8'h20: ctrl_reg_rd_data_reg <= 32'h0000C002; // IF RX ctrl: Type
RBB+8'h24: ctrl_reg_rd_data_reg <= 32'h00000100; // IF RX ctrl: Version
RBB+8'h28: ctrl_reg_rd_data_reg <= RB_BASE_ADDR+8'h40; // IF RX ctrl: Next header
RBB+8'h2C: begin
// IF RX ctrl: features
// IF ctrl: features
ctrl_reg_rd_data_reg[0] <= RX_RSS_ENABLE && RX_HASH_ENABLE;
ctrl_reg_rd_data_reg[4] <= PTP_TS_ENABLE;
ctrl_reg_rd_data_reg[8] <= RX_CHECKSUM_ENABLE;
ctrl_reg_rd_data_reg[9] <= RX_HASH_ENABLE;
ctrl_reg_rd_data_reg[8] <= TX_CHECKSUM_ENABLE;
ctrl_reg_rd_data_reg[9] <= RX_CHECKSUM_ENABLE;
ctrl_reg_rd_data_reg[10] <= RX_HASH_ENABLE;
end
RBB+8'h30: ctrl_reg_rd_data_reg <= MAX_RX_SIZE; // IF RX ctrl: Max RX MTU
RBB+8'h34: ctrl_reg_rd_data_reg <= rx_mtu_reg; // IF RX ctrl: RX MTU
RBB+8'h38: ctrl_reg_rd_data_reg <= rss_mask_reg; // IF RX ctrl: RSS mask
RBB+8'h10: ctrl_reg_rd_data_reg <= MAX_TX_SIZE; // IF ctrl: Max TX MTU
RBB+8'h14: ctrl_reg_rd_data_reg <= MAX_RX_SIZE; // IF ctrl: Max RX MTU
RBB+8'h18: ctrl_reg_rd_data_reg <= tx_mtu_reg; // IF ctrl: TX MTU
RBB+8'h1C: ctrl_reg_rd_data_reg <= rx_mtu_reg; // IF ctrl: RX MTU
RBB+8'h20: ctrl_reg_rd_data_reg <= rss_mask_reg; // IF ctrl: RSS mask
// Queue manager (Event)
RBB+8'h40: ctrl_reg_rd_data_reg <= 32'h0000C010; // Event QM: Type
RBB+8'h44: ctrl_reg_rd_data_reg <= 32'h00000100; // Event QM: Version

60
fpga/common/tb/mqnic.py
View File

@ -152,26 +152,20 @@ MQNIC_RB_IF_REG_COUNT = 0x10
MQNIC_RB_IF_REG_STRIDE = 0x14
MQNIC_RB_IF_REG_CSR_OFFSET = 0x18
MQNIC_RB_IF_CTRL_TX_TYPE = 0x0000C001
MQNIC_RB_IF_CTRL_TX_VER = 0x00000100
MQNIC_RB_IF_CTRL_TX_REG_FEATURES = 0x0C
MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU = 0x10
MQNIC_RB_IF_CTRL_TX_REG_MTU = 0x14
MQNIC_RB_IF_CTRL_TYPE = 0x0000C001
MQNIC_RB_IF_CTRL_VER = 0x00000200
MQNIC_RB_IF_CTRL_REG_FEATURES = 0x0C
MQNIC_RB_IF_CTRL_REG_MAX_TX_MTU = 0x10
MQNIC_RB_IF_CTRL_REG_MAX_RX_MTU = 0x14
MQNIC_RB_IF_CTRL_REG_TX_MTU = 0x18
MQNIC_RB_IF_CTRL_REG_RX_MTU = 0x1C
MQNIC_RB_IF_CTRL_REG_RSS_MASK = 0x20
MQNIC_IF_TX_FEATURE_PTP_TS = (1 << 4)
MQNIC_IF_TX_FEATURE_CSUM = (1 << 8)
MQNIC_RB_IF_CTRL_RX_TYPE = 0x0000C002
MQNIC_RB_IF_CTRL_RX_VER = 0x00000100
MQNIC_RB_IF_CTRL_RX_REG_FEATURES = 0x0C
MQNIC_RB_IF_CTRL_RX_REG_MAX_MTU = 0x10
MQNIC_RB_IF_CTRL_RX_REG_MTU = 0x14
MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK = 0x18
MQNIC_IF_RX_FEATURE_RSS = (1 << 0)
MQNIC_IF_RX_FEATURE_PTP_TS = (1 << 4)
MQNIC_IF_RX_FEATURE_CSUM = (1 << 8)
MQNIC_IF_RX_FEATURE_HASH = (1 << 9)
MQNIC_IF_FEATURE_RSS = (1 << 0)
MQNIC_IF_FEATURE_PTP_TS = (1 << 4)
MQNIC_IF_FEATURE_TX_CSUM = (1 << 8)
MQNIC_IF_FEATURE_RX_CSUM = (1 << 9)
MQNIC_IF_FEATURE_RX_HASH = (1 << 10)
MQNIC_RB_EVENT_QM_TYPE = 0x0000C010
MQNIC_RB_EVENT_QM_VER = 0x00000100
@ -798,16 +792,14 @@ class Interface:
self.port_up = False
self.reg_blocks = RegBlockList()
self.if_ctrl_tx_rb = None
self.if_ctrl_rx_rb = None
self.if_ctrl_rb = None
self.event_queue_rb = None
self.tx_queue_rb = None
self.tx_cpl_queue_rb = None
self.rx_queue_rb = None
self.rx_cpl_queue_rb = None
self.if_tx_features = None
self.if_rx_features = None
self.if_features = None
self.max_tx_mtu = 0
self.max_rx_mtu = 0
@ -850,20 +842,14 @@ class Interface:
# Enumerate registers
await self.reg_blocks.enumerate_reg_blocks(self.hw_regs, self.driver.if_csr_offset)
self.if_ctrl_tx_rb = self.reg_blocks.find(MQNIC_RB_IF_CTRL_TX_TYPE, MQNIC_RB_IF_CTRL_TX_VER)
self.if_ctrl_rb = self.reg_blocks.find(MQNIC_RB_IF_CTRL_TYPE, MQNIC_RB_IF_CTRL_VER)
self.if_tx_features = await self.if_ctrl_tx_rb.read_dword(MQNIC_RB_IF_CTRL_TX_REG_FEATURES)
self.max_tx_mtu = await self.if_ctrl_tx_rb.read_dword(MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU)
self.if_features = await self.if_ctrl_rb.read_dword(MQNIC_RB_IF_CTRL_REG_FEATURES)
self.max_tx_mtu = await self.if_ctrl_rb.read_dword(MQNIC_RB_IF_CTRL_REG_MAX_TX_MTU)
self.max_rx_mtu = await self.if_ctrl_rb.read_dword(MQNIC_RB_IF_CTRL_REG_MAX_RX_MTU)
self.log.info("IF TX features: 0x%08x", self.if_tx_features)
self.log.info("IF features: 0x%08x", self.if_features)
self.log.info("Max TX MTU: %d", self.max_tx_mtu)
self.if_ctrl_rx_rb = self.reg_blocks.find(MQNIC_RB_IF_CTRL_RX_TYPE, MQNIC_RB_IF_CTRL_RX_VER)
self.if_rx_features = await self.if_ctrl_rx_rb.read_dword(MQNIC_RB_IF_CTRL_RX_REG_FEATURES)
self.max_rx_mtu = await self.if_ctrl_rx_rb.read_dword(MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU)
self.log.info("IF RX features: 0x%08x", self.if_rx_features)
self.log.info("Max RX MTU: %d", self.max_rx_mtu)
await self.set_mtu(min(self.max_tx_mtu, self.max_rx_mtu, 9214))
@ -1214,11 +1200,11 @@ class Interface:
await ring.write_head_ptr()
async def set_mtu(self, mtu):
await self.if_ctrl_tx_rb.write_dword(MQNIC_RB_IF_CTRL_TX_REG_MTU, mtu)
await self.if_ctrl_rx_rb.write_dword(MQNIC_RB_IF_CTRL_RX_REG_MTU, mtu)
await self.if_ctrl_rb.write_dword(MQNIC_RB_IF_CTRL_REG_TX_MTU, mtu)
await self.if_ctrl_rb.write_dword(MQNIC_RB_IF_CTRL_REG_RX_MTU, mtu)
async def set_rss_mask(self, mask):
await self.if_ctrl_rx_rb.write_dword(MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK, mask)
await self.if_ctrl_rb.write_dword(MQNIC_RB_IF_CTRL_REG_RSS_MASK, mask)
async def recv(self):
if not self.pkt_rx_queue:

9
modules/mqnic/mqnic.h
View File

@ -337,8 +337,7 @@ struct mqnic_if {
struct mqnic_dev *mdev;
struct reg_block *rb_list;
struct reg_block *if_ctrl_tx_rb;
struct reg_block *if_ctrl_rx_rb;
struct reg_block *if_ctrl_rb;
struct reg_block *event_queue_rb;
struct reg_block *tx_queue_rb;
struct reg_block *tx_cpl_queue_rb;
@ -351,8 +350,7 @@ struct mqnic_if {
int dev_port_max;
int dev_port_limit;
u32 if_tx_features;
u32 if_rx_features;
u32 if_features;
u32 max_tx_mtu;
u32 max_rx_mtu;
@ -411,8 +409,7 @@ struct mqnic_priv {
bool registered;
bool port_up;
u32 if_tx_features;
u32 if_rx_features;
u32 if_features;
u32 event_queue_count;
struct mqnic_eq_ring *event_ring[MQNIC_MAX_EVENT_RINGS];

2
modules/mqnic/mqnic_ethtool.c
View File

@ -68,7 +68,7 @@ static int mqnic_get_ts_info(struct net_device *ndev,
if (mdev->ptp_clock)
info->phc_index = ptp_clock_index(mdev->ptp_clock);
if (!(priv->if_tx_features & MQNIC_IF_TX_FEATURE_PTP_TS) || !mdev->ptp_clock)
if (!(priv->if_features & MQNIC_IF_FEATURE_PTP_TS) || !mdev->ptp_clock)
return 0;
info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |

32
modules/mqnic/mqnic_hw.h
View File

@ -176,26 +176,20 @@
#define MQNIC_RB_IF_REG_STRIDE 0x14
#define MQNIC_RB_IF_REG_CSR_OFFSET 0x18
#define MQNIC_RB_IF_CTRL_TX_TYPE 0x0000C001
#define MQNIC_RB_IF_CTRL_TX_VER 0x00000100
#define MQNIC_RB_IF_CTRL_TX_REG_FEATURES 0x0C
#define MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU 0x10
#define MQNIC_RB_IF_CTRL_TX_REG_MTU 0x14
#define MQNIC_RB_IF_CTRL_TYPE 0x0000C001
#define MQNIC_RB_IF_CTRL_VER 0x00000200
#define MQNIC_RB_IF_CTRL_REG_FEATURES 0x0C
#define MQNIC_RB_IF_CTRL_REG_MAX_TX_MTU 0x10
#define MQNIC_RB_IF_CTRL_REG_MAX_RX_MTU 0x14
#define MQNIC_RB_IF_CTRL_REG_TX_MTU 0x18
#define MQNIC_RB_IF_CTRL_REG_RX_MTU 0x1C
#define MQNIC_RB_IF_CTRL_REG_RSS_MASK 0x20
#define MQNIC_IF_TX_FEATURE_PTP_TS (1 << 4)
#define MQNIC_IF_TX_FEATURE_CSUM (1 << 8)
#define MQNIC_RB_IF_CTRL_RX_TYPE 0x0000C002
#define MQNIC_RB_IF_CTRL_RX_VER 0x00000100
#define MQNIC_RB_IF_CTRL_RX_REG_FEATURES 0x0C
#define MQNIC_RB_IF_CTRL_RX_REG_MAX_MTU 0x10
#define MQNIC_RB_IF_CTRL_RX_REG_MTU 0x14
#define MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK 0x18
#define MQNIC_IF_RX_FEATURE_RSS (1 << 0)
#define MQNIC_IF_RX_FEATURE_PTP_TS (1 << 4)
#define MQNIC_IF_RX_FEATURE_CSUM (1 << 8)
#define MQNIC_IF_RX_FEATURE_HASH (1 << 9)
#define MQNIC_IF_FEATURE_RSS (1 << 0)
#define MQNIC_IF_FEATURE_PTP_TS (1 << 4)
#define MQNIC_IF_FEATURE_TX_CSUM (1 << 8)
#define MQNIC_IF_FEATURE_RX_CSUM (1 << 9)
#define MQNIC_IF_FEATURE_RX_HASH (1 << 10)
#define MQNIC_RB_EVENT_QM_TYPE 0x0000C010
#define MQNIC_RB_EVENT_QM_VER 0x00000100

38
modules/mqnic/mqnic_if.c
View File

@ -71,32 +71,20 @@ int mqnic_create_interface(struct mqnic_dev *mdev, struct mqnic_if **interface_p
dev_info(dev, " type 0x%08x (v %d.%d.%d.%d)", rb->type, rb->version >> 24,
(rb->version >> 16) & 0xff, (rb->version >> 8) & 0xff, rb->version & 0xff);
interface->if_ctrl_tx_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TX_TYPE, MQNIC_RB_IF_CTRL_TX_VER, 0);
interface->if_ctrl_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TYPE, MQNIC_RB_IF_CTRL_VER, 0);
if (!interface->if_ctrl_tx_rb) {
if (!interface->if_ctrl_rb) {
ret = -EIO;
dev_err(dev, "TX interface control block not found");
dev_err(dev, "Interface control block not found");
goto fail;
}
interface->if_tx_features = ioread32(interface->if_ctrl_tx_rb->regs + MQNIC_RB_IF_CTRL_TX_REG_FEATURES);
interface->max_tx_mtu = ioread32(interface->if_ctrl_tx_rb->regs + MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU);
interface->if_features = ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_FEATURES);
interface->max_tx_mtu = ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_MAX_TX_MTU);
interface->max_rx_mtu = ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_MAX_RX_MTU);
dev_info(dev, "IF TX features: 0x%08x", interface->if_tx_features);
dev_info(dev, "IF features: 0x%08x", interface->if_features);
dev_info(dev, "Max TX MTU: %d", interface->max_tx_mtu);
interface->if_ctrl_rx_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_RX_TYPE, MQNIC_RB_IF_CTRL_RX_VER, 0);
if (!interface->if_ctrl_rx_rb) {
ret = -EIO;
dev_err(dev, "RX interface control block not found");
goto fail;
}
interface->if_rx_features = ioread32(interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_RX_REG_FEATURES);
interface->max_rx_mtu = ioread32(interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU);
dev_info(dev, "IF RX features: 0x%08x", interface->if_rx_features);
dev_info(dev, "Max RX MTU: %d", interface->max_rx_mtu);
interface->event_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_EVENT_QM_TYPE, MQNIC_RB_EVENT_QM_VER, 0);
@ -328,30 +316,30 @@ void mqnic_destroy_interface(struct mqnic_if **interface_ptr)
u32 mqnic_interface_get_rss_mask(struct mqnic_if *interface)
{
return ioread32(interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK);
return ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_RSS_MASK);
}
void mqnic_interface_set_rss_mask(struct mqnic_if *interface, u32 rss_mask)
{
iowrite32(rss_mask, interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK);
iowrite32(rss_mask, interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_RSS_MASK);
}
u32 mqnic_interface_get_tx_mtu(struct mqnic_if *interface)
{
return ioread32(interface->if_ctrl_tx_rb->regs + MQNIC_RB_IF_CTRL_TX_REG_MTU);
return ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_TX_MTU);
}
void mqnic_interface_set_tx_mtu(struct mqnic_if *interface, u32 mtu)
{
iowrite32(mtu, interface->if_ctrl_tx_rb->regs + MQNIC_RB_IF_CTRL_TX_REG_MTU);
iowrite32(mtu, interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_TX_MTU);
}
u32 mqnic_interface_get_rx_mtu(struct mqnic_if *interface)
{
return ioread32(interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_RX_REG_MTU);
return ioread32(interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_RX_MTU);
}
void mqnic_interface_set_rx_mtu(struct mqnic_if *interface, u32 mtu)
{
iowrite32(mtu, interface->if_ctrl_rx_rb->regs + MQNIC_RB_IF_CTRL_RX_REG_MTU);
iowrite32(mtu, interface->if_ctrl_rb->regs + MQNIC_RB_IF_CTRL_REG_RX_MTU);
}

7
modules/mqnic/mqnic_netdev.c
View File

@ -381,8 +381,7 @@ int mqnic_create_netdev(struct mqnic_if *interface, struct net_device **ndev_ptr
priv->port_up = false;
// associate interface resources
priv->if_tx_features = interface->if_tx_features;
priv->if_rx_features = interface->if_rx_features;
priv->if_features = interface->if_features;
priv->event_queue_count = interface->event_queue_count;
for (k = 0; k < interface->event_queue_count; k++)
@ -469,10 +468,10 @@ int mqnic_create_netdev(struct mqnic_if *interface, struct net_device **ndev_ptr
// set up features
ndev->hw_features = NETIF_F_SG;
if (priv->if_rx_features & MQNIC_IF_RX_FEATURE_CSUM)
if (priv->if_features & MQNIC_IF_FEATURE_RX_CSUM)
ndev->hw_features |= NETIF_F_RXCSUM;
if (priv->if_tx_features & MQNIC_IF_TX_FEATURE_CSUM)
if (priv->if_features & MQNIC_IF_FEATURE_TX_CSUM)
ndev->hw_features |= NETIF_F_HW_CSUM;
ndev->features = ndev->hw_features | NETIF_F_HIGHDMA;

2
modules/mqnic/mqnic_rx.c
View File

@ -363,7 +363,7 @@ int mqnic_process_rx_cq(struct mqnic_cq_ring *cq_ring, int napi_budget)
}
// RX hardware timestamp
if (interface->if_rx_features & MQNIC_IF_RX_FEATURE_PTP_TS)
if (interface->if_features & MQNIC_IF_FEATURE_PTP_TS)
skb_hwtstamps(skb)->hwtstamp = mqnic_read_cpl_ts(interface->mdev, rx_ring, cpl);
skb_record_rx_queue(skb, rx_ring->index);

2
modules/mqnic/mqnic_tx.c
View File

@ -470,7 +470,7 @@ netdev_tx_t mqnic_start_xmit(struct sk_buff *skb, struct net_device *ndev)
// TX hardware timestamp
tx_info->ts_requested = 0;
if (unlikely(priv->if_tx_features & MQNIC_IF_TX_FEATURE_PTP_TS && shinfo->tx_flags & SKBTX_HW_TSTAMP)) {
if (unlikely(priv->if_features & MQNIC_IF_FEATURE_PTP_TS && shinfo->tx_flags & SKBTX_HW_TSTAMP)) {
dev_info(priv->dev, "%s: TX TS requested", __func__);
shinfo->tx_flags |= SKBTX_IN_PROGRESS;
tx_info->ts_requested = 1;

8
utils/mqnic-config.c
View File

@ -179,13 +179,11 @@ int main(int argc, char *argv[])
goto err;
}
printf("IF TX features: 0x%08x\n", dev_interface->if_tx_features);
printf("IF features: 0x%08x\n", dev_interface->if_features);
printf("Max TX MTU: %d\n", dev_interface->max_tx_mtu);
printf("TX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_tx_rb->regs, MQNIC_RB_IF_CTRL_TX_REG_MTU));
printf("IF RX features: 0x%08x\n", dev_interface->if_rx_features);
printf("Max RX MTU: %d\n", dev_interface->max_rx_mtu);
printf("RX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rx_rb->regs, MQNIC_RB_IF_CTRL_RX_REG_MTU));
printf("TX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_TX_MTU));
printf("RX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_RX_MTU));
printf("Event queue offset: 0x%08x\n", dev_interface->event_queue_offset);
printf("Event queue count: %d\n", dev_interface->event_queue_count);

10
utils/mqnic-dump.c
View File

@ -177,14 +177,12 @@ int main(int argc, char *argv[])
printf(" type 0x%08x (v %d.%d.%d.%d)\n", rb->type, rb->version >> 24,
(rb->version >> 16) & 0xff, (rb->version >> 8) & 0xff, rb->version & 0xff);
printf("IF TX features: 0x%08x\n", dev_interface->if_tx_features);
printf("IF features: 0x%08x\n", dev_interface->if_features);
printf("Max TX MTU: %d\n", dev_interface->max_tx_mtu);
printf("TX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_tx_rb->regs, MQNIC_RB_IF_CTRL_TX_REG_MTU));
printf("IF RX features: 0x%08x\n", dev_interface->if_rx_features);
printf("Max RX MTU: %d\n", dev_interface->max_rx_mtu);
printf("RX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rx_rb->regs, MQNIC_RB_IF_CTRL_RX_REG_MTU));
printf("RSS mask: 0x%08x\n", mqnic_reg_read32(dev_interface->if_ctrl_rx_rb->regs, MQNIC_RB_IF_CTRL_RX_REG_RSS_MASK));
printf("TX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_TX_MTU));
printf("RX MTU: %d\n", mqnic_reg_read32(dev_interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_RX_MTU));
printf("RSS mask: 0x%08x\n", mqnic_reg_read32(dev_interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_RSS_MASK));
printf("Event queue offset: 0x%08x\n", dev_interface->event_queue_offset);
printf("Event queue count: %d\n", dev_interface->event_queue_count);

22
utils/mqnic.c
View File

@ -358,27 +358,17 @@ struct mqnic_if *mqnic_if_open(struct mqnic *dev, int index, volatile uint8_t *r
goto fail;
}
interface->if_ctrl_tx_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TX_TYPE, MQNIC_RB_IF_CTRL_TX_VER, 0);
interface->if_ctrl_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_TYPE, MQNIC_RB_IF_CTRL_VER, 0);
if (!interface->if_ctrl_tx_rb)
if (!interface->if_ctrl_rb)
{
fprintf(stderr, "Error: TX interface control block not found\n");
fprintf(stderr, "Error: Interface control block not found\n");
goto fail;
}
interface->if_tx_features = mqnic_reg_read32(interface->if_ctrl_tx_rb->regs, MQNIC_RB_IF_CTRL_TX_REG_FEATURES);
interface->max_tx_mtu = mqnic_reg_read32(interface->if_ctrl_tx_rb->regs, MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU);
interface->if_ctrl_rx_rb = find_reg_block(interface->rb_list, MQNIC_RB_IF_CTRL_RX_TYPE, MQNIC_RB_IF_CTRL_RX_VER, 0);
if (!interface->if_ctrl_rx_rb)
{
fprintf(stderr, "Error: RX interface control block not found\n");
goto fail;
}
interface->if_rx_features = mqnic_reg_read32(interface->if_ctrl_rx_rb->regs, MQNIC_RB_IF_CTRL_RX_REG_FEATURES);
interface->max_rx_mtu = mqnic_reg_read32(interface->if_ctrl_rx_rb->regs, MQNIC_RB_IF_CTRL_TX_REG_MAX_MTU);
interface->if_features = mqnic_reg_read32(interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_FEATURES);
interface->max_tx_mtu = mqnic_reg_read32(interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_MAX_TX_MTU);
interface->max_rx_mtu = mqnic_reg_read32(interface->if_ctrl_rb->regs, MQNIC_RB_IF_CTRL_REG_MAX_RX_MTU);
interface->event_queue_rb = find_reg_block(interface->rb_list, MQNIC_RB_EVENT_QM_TYPE, MQNIC_RB_EVENT_QM_VER, 0);

6
utils/mqnic.h
View File

@ -90,16 +90,14 @@ struct mqnic_if {
volatile uint8_t *csr_regs;
struct reg_block *rb_list;
struct reg_block *if_ctrl_tx_rb;
struct reg_block *if_ctrl_rx_rb;
struct reg_block *if_ctrl_rb;
struct reg_block *event_queue_rb;
struct reg_block *tx_queue_rb;
struct reg_block *tx_cpl_queue_rb;
struct reg_block *rx_queue_rb;
struct reg_block *rx_cpl_queue_rb;
uint32_t if_tx_features;
uint32_t if_rx_features;
uint32_t if_features;
uint32_t max_tx_mtu;
uint32_t max_rx_mtu;