diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v index ce4250617..f2b21261a 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v @@ -575,6 +575,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -610,7 +624,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v index d7dda3187..b0edda14e 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v @@ -576,6 +576,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -611,7 +625,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v index 11eb4799a..c75d6ad07 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v @@ -576,6 +576,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -611,7 +625,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v index dfcebe8cd..25eec4db5 100644 --- a/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v @@ -580,6 +580,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -587,7 +601,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU200/fpga_10g/rtl/fpga.v b/fpga/mqnic/AU200/fpga_10g/rtl/fpga.v index 2afd554ef..dbba7061a 100644 --- a/fpga/mqnic/AU200/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/AU200/fpga_10g/rtl/fpga.v @@ -577,6 +577,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -584,7 +598,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v index dfcebe8cd..25eec4db5 100644 --- a/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v @@ -580,6 +580,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -587,7 +601,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU250/fpga_10g/rtl/fpga.v b/fpga/mqnic/AU250/fpga_10g/rtl/fpga.v index 2afd554ef..dbba7061a 100644 --- a/fpga/mqnic/AU250/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/AU250/fpga_10g/rtl/fpga.v @@ -577,6 +577,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -584,7 +598,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v index 6d0b4f0c8..13dcbf484 100644 --- a/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v @@ -466,6 +466,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4c_uscale_plus_0 pcie4c_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -473,7 +487,7 @@ pcie4c_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU280/fpga_10g/rtl/fpga.v b/fpga/mqnic/AU280/fpga_10g/rtl/fpga.v index caa4a717e..2467cb53e 100644 --- a/fpga/mqnic/AU280/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/AU280/fpga_10g/rtl/fpga.v @@ -467,6 +467,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4c_uscale_plus_0 pcie4c_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -474,7 +488,7 @@ pcie4c_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v index 11c0a4363..ca90a9c07 100644 --- a/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v @@ -444,6 +444,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4c_uscale_plus_0 pcie4c_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -451,7 +465,7 @@ pcie4c_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/AU50/fpga_10g/rtl/fpga.v b/fpga/mqnic/AU50/fpga_10g/rtl/fpga.v index c67e68f0e..950709803 100644 --- a/fpga/mqnic/AU50/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/AU50/fpga_10g/rtl/fpga.v @@ -445,6 +445,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4c_uscale_plus_0 pcie4c_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -452,7 +466,7 @@ pcie4c_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v index 0465960b5..5a8ca0975 100644 --- a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v +++ b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v @@ -542,6 +542,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie3_ultrascale_0 pcie3_ultrascale_inst ( .pci_exp_txn(pcie_tx_n), @@ -549,7 +563,7 @@ pcie3_ultrascale_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/ExaNIC_X25/fpga_10g/rtl/fpga.v b/fpga/mqnic/ExaNIC_X25/fpga_10g/rtl/fpga.v index 11a3d784e..a179f5e1c 100644 --- a/fpga/mqnic/ExaNIC_X25/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/ExaNIC_X25/fpga_10g/rtl/fpga.v @@ -528,6 +528,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -563,7 +577,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v index e511c1b0d..49b19e7d0 100644 --- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v +++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v @@ -617,6 +617,20 @@ BUFG pcie_usrclk2_bufg_inst ( .O(pcie_pipe_userclk2) ); +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie3_7x_0 pcie3_7x_inst ( .pci_exp_txn(pcie_tx_n), @@ -640,7 +654,7 @@ pcie3_7x_inst ( .mmcm_lock(), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .user_app_rdy(), diff --git a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v index 3d3082fce..7755a2695 100644 --- a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v @@ -571,6 +571,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie3_ultrascale_0 pcie3_ultrascale_inst ( .pci_exp_txn(pcie_tx_n), @@ -578,7 +592,7 @@ pcie3_ultrascale_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v index 5fa622bb2..0992dfffd 100644 --- a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v @@ -594,6 +594,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -601,7 +615,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/VCU118/fpga_10g/rtl/fpga.v b/fpga/mqnic/VCU118/fpga_10g/rtl/fpga.v index 7be3ba092..ce2eac5d3 100644 --- a/fpga/mqnic/VCU118/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/VCU118/fpga_10g/rtl/fpga.v @@ -591,6 +591,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -598,7 +612,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v index dfcebe8cd..25eec4db5 100644 --- a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v @@ -580,6 +580,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -587,7 +601,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/VCU1525/fpga_10g/rtl/fpga.v b/fpga/mqnic/VCU1525/fpga_10g/rtl/fpga.v index 2afd554ef..dbba7061a 100644 --- a/fpga/mqnic/VCU1525/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/VCU1525/fpga_10g/rtl/fpga.v @@ -577,6 +577,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -584,7 +598,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v index a7e157a8d..69a34fa59 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v +++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v @@ -357,6 +357,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -364,7 +378,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v index 4e99f29ef..2f90add79 100644 --- a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v +++ b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v @@ -587,6 +587,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -622,7 +636,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/fb2CG/fpga_10g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_10g/rtl/fpga.v index 2b8d85126..d539a2bbc 100644 --- a/fpga/mqnic/fb2CG/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic/fb2CG/fpga_10g/rtl/fpga.v @@ -584,6 +584,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -619,7 +633,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v index 3edfaa3a0..0b2c05c1d 100644 --- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v @@ -584,6 +584,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -619,7 +633,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v b/fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v index 191c07b78..7ae7d92a7 100644 --- a/fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/rtl/fpga.v @@ -461,6 +461,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + // ila_0 ila_rq ( // .clk(pcie_user_clk), // .trig_out(), @@ -496,7 +510,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga.v b/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga.v index 0465960b5..5a8ca0975 100644 --- a/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga.v +++ b/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga.v @@ -542,6 +542,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie3_ultrascale_0 pcie3_ultrascale_inst ( .pci_exp_txn(pcie_tx_n), @@ -549,7 +563,7 @@ pcie3_ultrascale_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga.v b/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga.v index 3d3082fce..7755a2695 100644 --- a/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga.v @@ -571,6 +571,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie3_ultrascale_0 pcie3_ultrascale_inst ( .pci_exp_txn(pcie_tx_n), @@ -578,7 +592,7 @@ pcie3_ultrascale_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata), diff --git a/fpga/mqnic_tdma/VCU118/fpga_10g/rtl/fpga.v b/fpga/mqnic_tdma/VCU118/fpga_10g/rtl/fpga.v index 7be3ba092..ce2eac5d3 100644 --- a/fpga/mqnic_tdma/VCU118/fpga_10g/rtl/fpga.v +++ b/fpga/mqnic_tdma/VCU118/fpga_10g/rtl/fpga.v @@ -591,6 +591,20 @@ wire [3:0] cfg_interrupt_msi_function_number; wire status_error_cor; wire status_error_uncor; +// extra register for pcie_user_reset signal +wire pcie_user_reset_int; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_1 = 1'b1; +(* shreg_extract = "no" *) +reg pcie_user_reset_reg_2 = 1'b1; + +always @(posedge pcie_user_clk) begin + pcie_user_reset_reg_1 <= pcie_user_reset_int; + pcie_user_reset_reg_2 <= pcie_user_reset_reg_1; +end + +assign pcie_user_reset = pcie_user_reset_reg_2; + pcie4_uscale_plus_0 pcie4_uscale_plus_inst ( .pci_exp_txn(pcie_tx_n), @@ -598,7 +612,7 @@ pcie4_uscale_plus_inst ( .pci_exp_rxn(pcie_rx_n), .pci_exp_rxp(pcie_rx_p), .user_clk(pcie_user_clk), - .user_reset(pcie_user_reset), + .user_reset(pcie_user_reset_int), .user_lnk_up(), .s_axis_rq_tdata(axis_rq_tdata),