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fpga/mqnic/DE10_Agilex: Fix MAC timing constraints for DE10-Agilex
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
parent
545fb3ca22
commit
184b7242e9
@ -66,20 +66,3 @@ constrain_sync_reset_inst "ptp_rst_reset_sync_inst"
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# PCIe clock
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set_clock_groups -asynchronous -group [ get_clocks "pcie_hip_inst|intel_pcie_ptile_ast_0|inst|inst|maib_and_tile|xcvr_hip_native|rx_ch15" ]
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# E-Tile MACs
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proc constrain_etile_mac_dual { inst } {
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puts "Inserting timing constraints for MAC dual $inst"
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foreach mac {mac_02_inst mac_13_inst} {
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|E100GX4_FEC_PTP_PR.nphy_ptp0|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|E100GX4_FEC_PTP_PR.nphy_ptp1|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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}
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for {set i 0} {$i < 2} {incr i} {
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constrain_sync_reset_inst "$inst|mac_ch[$i].mac_reset_sync_inst"
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}
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}
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constrain_etile_mac_dual "qsfpdda_mac_inst"
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constrain_etile_mac_dual "qsfpddb_mac_inst"
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@ -126,7 +126,8 @@ IP_TCL_FILES += ip/mac_13.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_100g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -126,7 +126,8 @@ IP_TCL_FILES += ip/mac_13.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_100g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -128,7 +128,8 @@ IP_TCL_FILES += ip/mac_13.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_100g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -128,7 +128,8 @@ IP_TCL_FILES += ip/mac_13.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_100g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -127,7 +127,8 @@ IP_TCL_FILES += ip/iopll_etile_ptp.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_25g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -127,7 +127,8 @@ IP_TCL_FILES += ip/iopll_etile_ptp.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_25g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -127,7 +127,8 @@ IP_TCL_FILES += ip/iopll_etile_ptp.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_25g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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@ -127,7 +127,8 @@ IP_TCL_FILES += ip/iopll_etile_ptp.tcl
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QSF_FILES = fpga.qsf
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# SDC files
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SDC_FILES = fpga.sdc
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SDC_FILES += fpga.sdc
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SDC_FILES += mac_25g.sdc
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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16
fpga/mqnic/DE10_Agilex/fpga_100g/mac_100g.sdc
Normal file
16
fpga/mqnic/DE10_Agilex/fpga_100g/mac_100g.sdc
Normal file
@ -0,0 +1,16 @@
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# E-Tile MACs
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proc constrain_etile_mac_dual { inst } {
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puts "Inserting timing constraints for MAC dual $inst"
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foreach mac {mac_02_inst mac_13_inst} {
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|E100GX4_FEC_PTP_PR.nphy_ptp0|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|E100GX4_FEC_PTP_PR.nphy_ptp1|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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}
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for {set i 0} {$i < 2} {incr i} {
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constrain_sync_reset_inst "$inst|mac_ch[$i].mac_reset_sync_inst"
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}
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}
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constrain_etile_mac_dual "qsfpdda_mac_inst"
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constrain_etile_mac_dual "qsfpddb_mac_inst"
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33
fpga/mqnic/DE10_Agilex/fpga_100g/mac_25g.sdc
Normal file
33
fpga/mqnic/DE10_Agilex/fpga_100g/mac_25g.sdc
Normal file
@ -0,0 +1,33 @@
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# E-Tile MACs
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set_clock_groups -asynchronous -group [ get_clocks "iopll_etile_ptp_inst|iopll_0_refclk" ]
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set_clock_groups -asynchronous -group [ get_clocks "iopll_etile_ptp_inst|iopll_0_outclk0" ]
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proc constrain_etile_mac_dual_quad { inst } {
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puts "Inserting timing constraints for MAC quad $inst"
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foreach mac {mac_02_inst mac_13_inst} {
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for {set i 0} {$i < 4} {incr i} {
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|rx_clkout2|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|rx_clkout|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|tx_clkout2|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|tx_clkout|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY_RSFEC.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|rx_clkout2|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY_RSFEC.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|rx_clkout|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY_RSFEC.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|tx_clkout2|ch${i}" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_NPHY_RSFEC.altera_xcvr_native_inst|alt_ehipc3_fm_nphy_elane|tx_clkout|ch${i}" ]
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}
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_PTP_NPHY_CHPLL.nphy_ptp0|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_PTP_NPHY_CHPLL.nphy_ptp1|alt_ehipc3_fm_nphy_elane_ptp|tx_clkout|ch0" ]
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set_clock_groups -asynchronous -group [ get_clocks "$inst|$mac|alt_ehipc3_fm_0|alt_ehipc3_fm_hard_inst|SL_PTP_NPHY_CHPLL.nphy_ptp1|alt_ehipc3_fm_nphy_elane_ptp_plloff|tx_transfer_clk|ch0" ]
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}
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for {set i 0} {$i < 8} {incr i} {
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constrain_sync_reset_inst "$inst|mac_ch[$i].mac_tx_reset_sync_inst"
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constrain_sync_reset_inst "$inst|mac_ch[$i].mac_tx_ptp_reset_sync_inst"
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constrain_sync_reset_inst "$inst|mac_ch[$i].mac_rx_ptp_reset_sync_inst"
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}
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}
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constrain_etile_mac_dual_quad "qsfpdda_mac_inst"
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constrain_etile_mac_dual_quad "qsfpddb_mac_inst"
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