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Fix AXI stream DMA client bug causing dropped writes when widths are the same

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This commit is contained in:
Alex Forencich 2020-08-06 21:32:10 -07:00
parent 0d4e9989c8
commit 1e75c3cc70
1 changed files with 5 additions and 1 deletions
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6
rtl/dma_client_axis_sink.v
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@ -310,7 +310,11 @@ always @* begin
ram_mask_next = {SEG_COUNT{1'b1}};
end
ram_wr_cmd_be_int = (s_axis_write_data_tkeep & keep_mask_reg) << (addr_reg & ({PART_COUNT_WIDTH{1'b1}} << PART_OFFSET_WIDTH));
if (PART_COUNT > 1) begin
ram_wr_cmd_be_int = (s_axis_write_data_tkeep & keep_mask_reg) << (addr_reg & ({PART_COUNT_WIDTH{1'b1}} << PART_OFFSET_WIDTH));
end else begin
ram_wr_cmd_be_int = s_axis_write_data_tkeep & keep_mask_reg;
end
ram_wr_cmd_addr_int = {SEG_COUNT{addr_reg[RAM_ADDR_WIDTH-1:RAM_ADDR_WIDTH-SEG_ADDR_WIDTH]}};
ram_wr_cmd_data_int = {PART_COUNT{s_axis_write_data_tdata}};
for (i = 0; i < SEG_COUNT; i = i + 1) begin