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Fix typo

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This commit is contained in:
Alex Forencich 2018-08-09 11:23:27 -07:00
parent ffc63e4b0d
commit 202fbcbb6f
2 changed files with 5 additions and 5 deletions
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2
rtl/axis_switch.py
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@ -189,7 +189,7 @@ assign input_{{p}}_axis_tready = input_{{p}}_axis_tready_reg;
// mux for incoming packet
{% for p in range(n) %}
reg [DATA_WIDTH-1:0] current_input_{{p}}_axis_tdata;
reg [DATA_WIDTH-1:0] current_input_{{p}}_axis_tkeep;
reg [KEEP_WIDTH-1:0] current_input_{{p}}_axis_tkeep;
reg current_input_{{p}}_axis_tvalid;
reg current_input_{{p}}_axis_tready;
reg current_input_{{p}}_axis_tlast;

8
rtl/axis_switch_4x4.v
View File

@ -253,7 +253,7 @@ assign input_3_axis_tready = input_3_axis_tready_reg;
// mux for incoming packet
reg [DATA_WIDTH-1:0] current_input_0_axis_tdata;
reg [DATA_WIDTH-1:0] current_input_0_axis_tkeep;
reg [KEEP_WIDTH-1:0] current_input_0_axis_tkeep;
reg current_input_0_axis_tvalid;
reg current_input_0_axis_tready;
reg current_input_0_axis_tlast;
@ -317,7 +317,7 @@ always @* begin
end
reg [DATA_WIDTH-1:0] current_input_1_axis_tdata;
reg [DATA_WIDTH-1:0] current_input_1_axis_tkeep;
reg [KEEP_WIDTH-1:0] current_input_1_axis_tkeep;
reg current_input_1_axis_tvalid;
reg current_input_1_axis_tready;
reg current_input_1_axis_tlast;
@ -381,7 +381,7 @@ always @* begin
end
reg [DATA_WIDTH-1:0] current_input_2_axis_tdata;
reg [DATA_WIDTH-1:0] current_input_2_axis_tkeep;
reg [KEEP_WIDTH-1:0] current_input_2_axis_tkeep;
reg current_input_2_axis_tvalid;
reg current_input_2_axis_tready;
reg current_input_2_axis_tlast;
@ -445,7 +445,7 @@ always @* begin
end
reg [DATA_WIDTH-1:0] current_input_3_axis_tdata;
reg [DATA_WIDTH-1:0] current_input_3_axis_tkeep;
reg [KEEP_WIDTH-1:0] current_input_3_axis_tkeep;
reg current_input_3_axis_tvalid;
reg current_input_3_axis_tready;
reg current_input_3_axis_tlast;