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Add assert for error_bad_fcs signal

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This commit is contained in:
Alex Forencich 2015-02-26 19:05:56 -08:00
parent bfe6c37ca9
commit 218d3f1b0f
1 changed files with 12 additions and 1 deletions
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13
tb/test_axis_eth_fcs_check.py
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@ -160,6 +160,13 @@ def bench():
def clkgen(): def clkgen():
clk.next = not clk clk.next = not clk
error_bad_fcs_asserted = Signal(bool(0))
@always(clk.posedge)
def monitor():
if (error_bad_fcs):
error_bad_fcs_asserted.next = 1
def wait_normal(): def wait_normal():
while input_axis_tvalid or output_axis_tvalid: while input_axis_tvalid or output_axis_tvalid:
yield clk.posedge yield clk.posedge
@ -371,6 +378,8 @@ def bench():
axis_frame1.data[-1] ^= 0xff axis_frame1.data[-1] ^= 0xff
for wait in wait_normal, wait_pause_source, wait_pause_sink: for wait in wait_normal, wait_pause_source, wait_pause_sink:
error_bad_fcs_asserted.next = 0
source_queue.put(axis_frame1) source_queue.put(axis_frame1)
source_queue.put(axis_frame2) source_queue.put(axis_frame2)
yield clk.posedge yield clk.posedge
@ -382,6 +391,8 @@ def bench():
yield clk.posedge yield clk.posedge
yield clk.posedge yield clk.posedge
assert error_bad_fcs_asserted
rx_frame = None rx_frame = None
if not sink_queue.empty(): if not sink_queue.empty():
rx_frame = sink_queue.get() rx_frame = sink_queue.get()
@ -405,7 +416,7 @@ def bench():
raise StopSimulation raise StopSimulation
return dut, source, sink, clkgen, check return dut, monitor, source, sink, clkgen, check
def test_bench(): def test_bench():
sim = Simulation(bench()) sim = Simulation(bench())