From 26a9d484e828b255593174f2a0dc57577ba30104 Mon Sep 17 00:00:00 2001
From: Alex Forencich <alex@alexforencich.com>
Date: Tue, 15 Dec 2020 17:17:18 -0800
Subject: [PATCH] Add test durations

---
 .test_durations | 154 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 154 insertions(+)
 create mode 100644 .test_durations

diff --git a/.test_durations b/.test_durations
new file mode 100644
index 000000000..73c10cb72
--- /dev/null
+++ b/.test_durations
@@ -0,0 +1,154 @@
+[
+  [
+    "fpga/common/tb/cpl_queue_manager/test_cpl_queue_manager.py::test_cpl_queue_manager",
+    1.5497107620467432
+  ],
+  [
+    "fpga/common/tb/queue_manager/test_queue_manager.py::test_queue_manager",
+    1.2131336400052533
+  ],
+  [
+    "fpga/common/tb/rx_checksum/test_rx_checksum.py::test_rx_checksum[256]",
+    6.3348515490069985
+  ],
+  [
+    "fpga/common/tb/rx_checksum/test_rx_checksum.py::test_rx_checksum[64]",
+    15.116107738984283
+  ],
+  [
+    "fpga/common/tb/rx_hash/test_rx_hash.py::test_rx_hash[256]",
+    5.503598106006393
+  ],
+  [
+    "fpga/common/tb/rx_hash/test_rx_hash.py::test_rx_hash[64]",
+    14.867759570974158
+  ],
+  [
+    "fpga/common/tb/tdma_ber/test_tdma_ber.py::test_tdma_ber",
+    1.2361847430292983
+  ],
+  [
+    "fpga/common/tb/tdma_ber_ch/test_tdma_ber_ch.py::test_tdma_ber_ch",
+    9.084022668015677
+  ],
+  [
+    "fpga/common/tb/tdma_scheduler/test_tdma_scheduler.py::test_tdma_scheduler",
+    0.5456129149824847
+  ],
+  [
+    "fpga/common/tb/tx_checksum/test_tx_checksum.py::test_tx_checksum[256]",
+    110.53834169200854
+  ],
+  [
+    "fpga/common/tb/tx_checksum/test_tx_checksum.py::test_tx_checksum[64]",
+    167.59570022200933
+  ],
+  [
+    "fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    280.83479886097484
+  ],
+  [
+    "fpga/mqnic/ADM_PCIE_9V3/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    295.8817664909875
+  ],
+  [
+    "fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    322.7432182719931
+  ],
+  [
+    "fpga/mqnic/AU200/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    276.65627795201726
+  ],
+  [
+    "fpga/mqnic/AU200/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    293.3329758379841
+  ],
+  [
+    "fpga/mqnic/AU250/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    287.15266085701296
+  ],
+  [
+    "fpga/mqnic/AU250/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    299.0170920470264
+  ],
+  [
+    "fpga/mqnic/AU280/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    289.9071576219867
+  ],
+  [
+    "fpga/mqnic/AU280/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    300.7472127840156
+  ],
+  [
+    "fpga/mqnic/AU50/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    160.6412515359989
+  ],
+  [
+    "fpga/mqnic/AU50/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    157.11716123999213
+  ],
+  [
+    "fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    188.28485049199662
+  ],
+  [
+    "fpga/mqnic/ExaNIC_X25/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    193.68468108098023
+  ],
+  [
+    "fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    209.39057065499946
+  ],
+  [
+    "fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    133.96714917899226
+  ],
+  [
+    "fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    284.5001361469913
+  ],
+  [
+    "fpga/mqnic/VCU118/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    300.5773922530061
+  ],
+  [
+    "fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    286.3138442809868
+  ],
+  [
+    "fpga/mqnic/VCU1525/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    298.77880619998905
+  ],
+  [
+    "fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    160.98224732797826
+  ],
+  [
+    "fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    285.4739719390054
+  ],
+  [
+    "fpga/mqnic/fb2CG/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    295.8207186020154
+  ],
+  [
+    "fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    322.73902356904
+  ],
+  [
+    "fpga/mqnic_tdma/ADM_PCIE_9V3/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    380.5077093199943
+  ],
+  [
+    "fpga/mqnic_tdma/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    246.34476842198637
+  ],
+  [
+    "fpga/mqnic_tdma/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    178.82179500503116
+  ],
+  [
+    "fpga/mqnic_tdma/VCU118/fpga_10g/tb/fpga_core/test_fpga_core.py::test_fpga_core",
+    380.0175635769847
+  ]
+]
\ No newline at end of file