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Fix synthesizer complaints

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This commit is contained in:
Alex Forencich 2019-06-08 17:36:09 -07:00
parent 82fe5a6bdd
commit 2794c315e8
4 changed files with 8 additions and 8 deletions
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4
rtl/axis_baser_rx_64.v
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@ -545,10 +545,10 @@ always @(posedge clk) begin
end end
end else if (encoded_rx_hdr == SYNC_CTRL && (encoded_rx_data[7:0] == BLOCK_TYPE_START_4 || encoded_rx_data[7:0] == BLOCK_TYPE_OS_START)) begin end else if (encoded_rx_hdr == SYNC_CTRL && (encoded_rx_data[7:0] == BLOCK_TYPE_START_4 || encoded_rx_data[7:0] == BLOCK_TYPE_OS_START)) begin
if (PTP_TS_WIDTH == 96) begin if (PTP_TS_WIDTH == 96) begin
ptp_ts_reg[45:0] <= ptp_ts[45:0] + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; ptp_ts_reg[45:0] <= ptp_ts[45:0] + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
ptp_ts_reg[95:48] <= ptp_ts[95:48]; ptp_ts_reg[95:48] <= ptp_ts[95:48];
end else begin end else begin
ptp_ts_reg <= ptp_ts + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; ptp_ts_reg <= ptp_ts + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
end end
end end

4
rtl/axis_baser_tx_64.v
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@ -532,10 +532,10 @@ always @* begin
// need to send more idles - swap lanes // need to send more idles - swap lanes
swap_lanes = 1'b1; swap_lanes = 1'b1;
if (PTP_TS_WIDTH == 96) begin if (PTP_TS_WIDTH == 96) begin
m_axis_ptp_ts_next[45:0] <= ptp_ts[45:0] + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; m_axis_ptp_ts_next[45:0] <= ptp_ts[45:0] + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
m_axis_ptp_ts_next[95:48] <= ptp_ts[95:48]; m_axis_ptp_ts_next[95:48] <= ptp_ts[95:48];
end else begin end else begin
m_axis_ptp_ts_next = ptp_ts + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; m_axis_ptp_ts_next = ptp_ts + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
end end
m_axis_ptp_ts_tag_next = s_axis_tuser >> 1; m_axis_ptp_ts_tag_next = s_axis_tuser >> 1;
m_axis_ptp_ts_valid_int_next = 1'b1; m_axis_ptp_ts_valid_int_next = 1'b1;

4
rtl/axis_xgmii_rx_64.v
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@ -516,10 +516,10 @@ always @(posedge clk) begin
end end
end else if (xgmii_rxc[4] && xgmii_rxd[39:32] == XGMII_START) begin end else if (xgmii_rxc[4] && xgmii_rxd[39:32] == XGMII_START) begin
if (PTP_TS_WIDTH == 96) begin if (PTP_TS_WIDTH == 96) begin
ptp_ts_reg[45:0] <= ptp_ts[45:0] + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; ptp_ts_reg[45:0] <= ptp_ts[45:0] + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
ptp_ts_reg[95:48] <= ptp_ts[95:48]; ptp_ts_reg[95:48] <= ptp_ts[95:48];
end else begin end else begin
ptp_ts_reg <= ptp_ts + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; ptp_ts_reg <= ptp_ts + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
end end
end end

4
rtl/axis_xgmii_tx_64.v
View File

@ -479,10 +479,10 @@ always @* begin
// need to send more idles - swap lanes // need to send more idles - swap lanes
swap_lanes = 1'b1; swap_lanes = 1'b1;
if (PTP_TS_WIDTH == 96) begin if (PTP_TS_WIDTH == 96) begin
m_axis_ptp_ts_next[45:0] <= ptp_ts[45:0] + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; m_axis_ptp_ts_next[45:0] <= ptp_ts[45:0] + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
m_axis_ptp_ts_next[95:48] <= ptp_ts[95:48]; m_axis_ptp_ts_next[95:48] <= ptp_ts[95:48];
end else begin end else begin
m_axis_ptp_ts_next = ptp_ts + (PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 1.5; m_axis_ptp_ts_next = ptp_ts + (((PTP_PERIOD_NS * 2**16 + PTP_PERIOD_FNS) * 3) >> 1);
end end
m_axis_ptp_ts_tag_next = s_axis_tuser >> 1; m_axis_ptp_ts_tag_next = s_axis_tuser >> 1;
m_axis_ptp_ts_valid_int_next = 1'b1; m_axis_ptp_ts_valid_int_next = 1'b1;