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Testbench parameter cleanup

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This commit is contained in:
Alex Forencich 2021-11-29 01:01:45 -08:00
parent e4b4762474
commit 2a89fb9332
8 changed files with 27 additions and 27 deletions
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8
tb/axis_arb_mux/Makefile
View File

@ -26,10 +26,10 @@ WAVES ?= 0
COCOTB_HDL_TIMEUNIT = 1ns COCOTB_HDL_TIMEUNIT = 1ns
COCOTB_HDL_TIMEPRECISION = 1ps COCOTB_HDL_TIMEPRECISION = 1ps
export PARAM_PORTS ?= 4 export PORTS ?= 4
DUT = axis_arb_mux DUT = axis_arb_mux
WRAPPER = $(DUT)_wrap_$(PARAM_PORTS) WRAPPER = $(DUT)_wrap_$(PORTS)
TOPLEVEL = $(WRAPPER) TOPLEVEL = $(WRAPPER)
MODULE = test_$(DUT) MODULE = test_$(DUT)
VERILOG_SOURCES += $(WRAPPER).v VERILOG_SOURCES += $(WRAPPER).v
@ -43,7 +43,7 @@ export PARAM_KEEP_ENABLE ?= $(shell expr $(PARAM_DATA_WIDTH) \> 8 )
export PARAM_KEEP_WIDTH ?= $(shell expr $(PARAM_DATA_WIDTH) / 8 ) export PARAM_KEEP_WIDTH ?= $(shell expr $(PARAM_DATA_WIDTH) / 8 )
export PARAM_ID_ENABLE ?= 1 export PARAM_ID_ENABLE ?= 1
export PARAM_S_ID_WIDTH ?= 8 export PARAM_S_ID_WIDTH ?= 8
export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(PARAM_PORTS)-1).bit_length())") export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(PORTS)-1).bit_length())")
export PARAM_DEST_ENABLE ?= 1 export PARAM_DEST_ENABLE ?= 1
export PARAM_DEST_WIDTH ?= 8 export PARAM_DEST_WIDTH ?= 8
export PARAM_USER_ENABLE ?= 1 export PARAM_USER_ENABLE ?= 1
@ -101,7 +101,7 @@ endif
include $(shell cocotb-config --makefiles)/Makefile.sim include $(shell cocotb-config --makefiles)/Makefile.sim
$(WRAPPER).v: ../../rtl/$(DUT)_wrap.py $(WRAPPER).v: ../../rtl/$(DUT)_wrap.py
$< -p $(PARAM_PORTS) $< -p $(PORTS)
iverilog_dump.v: iverilog_dump.v:
echo 'module iverilog_dump();' > $@ echo 'module iverilog_dump();' > $@

4
tb/axis_arb_mux/test_axis_arb_mux.py
View File

@ -342,8 +342,6 @@ def test_axis_arb_mux(request, ports, data_width, round_robin):
parameters = {} parameters = {}
parameters['PORTS'] = ports
parameters['DATA_WIDTH'] = data_width parameters['DATA_WIDTH'] = data_width
parameters['KEEP_ENABLE'] = int(parameters['DATA_WIDTH'] > 8) parameters['KEEP_ENABLE'] = int(parameters['DATA_WIDTH'] > 8)
parameters['KEEP_WIDTH'] = parameters['DATA_WIDTH'] // 8 parameters['KEEP_WIDTH'] = parameters['DATA_WIDTH'] // 8
@ -361,6 +359,8 @@ def test_axis_arb_mux(request, ports, data_width, round_robin):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['PORTS'] = str(ports)
sim_build = os.path.join(tests_dir, "sim_build", sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', '')) request.node.name.replace('[', '-').replace(']', ''))

2
tb/axis_demux/Makefile
View File

@ -43,7 +43,7 @@ export PARAM_ID_ENABLE ?= 1
export PARAM_ID_WIDTH ?= 8 export PARAM_ID_WIDTH ?= 8
export PARAM_DEST_ENABLE ?= 1 export PARAM_DEST_ENABLE ?= 1
export PARAM_M_DEST_WIDTH ?= 8 export PARAM_M_DEST_WIDTH ?= 8
export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(PARAM_PORTS)-1).bit_length())") export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(PORTS)-1).bit_length())")
export PARAM_USER_ENABLE ?= 1 export PARAM_USER_ENABLE ?= 1
export PARAM_USER_WIDTH ?= 1 export PARAM_USER_WIDTH ?= 1
export PARAM_TDEST_ROUTE ?= 1 export PARAM_TDEST_ROUTE ?= 1

4
tb/axis_demux/test_axis_demux.py
View File

@ -43,7 +43,7 @@ class TB(object):
def __init__(self, dut): def __init__(self, dut):
self.dut = dut self.dut = dut
ports = int(os.getenv("PORTS")) ports = len(dut.axis_demux_inst.m_axis_tvalid)
self.log = logging.getLogger("cocotb.tb") self.log = logging.getLogger("cocotb.tb")
self.log.setLevel(logging.DEBUG) self.log.setLevel(logging.DEBUG)
@ -143,7 +143,7 @@ def incrementing_payload(length):
if cocotb.SIM_NAME: if cocotb.SIM_NAME:
ports = int(os.getenv("PORTS")) ports = len(cocotb.top.axis_demux_inst.m_axis_tvalid)
factory = TestFactory(run_test) factory = TestFactory(run_test)
factory.add_option("payload_lengths", [size_list]) factory.add_option("payload_lengths", [size_list])

12
tb/axis_ram_switch/Makefile
View File

@ -26,11 +26,11 @@ WAVES ?= 0
COCOTB_HDL_TIMEUNIT = 1ns COCOTB_HDL_TIMEUNIT = 1ns
COCOTB_HDL_TIMEPRECISION = 1ps COCOTB_HDL_TIMEPRECISION = 1ps
export PARAM_S_COUNT ?= 4 export S_COUNT ?= 4
export PARAM_M_COUNT ?= 4 export M_COUNT ?= 4
DUT = axis_ram_switch DUT = axis_ram_switch
WRAPPER = $(DUT)_wrap_$(PARAM_S_COUNT)x$(PARAM_M_COUNT) WRAPPER = $(DUT)_wrap_$(S_COUNT)x$(M_COUNT)
TOPLEVEL = $(WRAPPER) TOPLEVEL = $(WRAPPER)
MODULE = test_$(DUT) MODULE = test_$(DUT)
VERILOG_SOURCES += $(WRAPPER).v VERILOG_SOURCES += $(WRAPPER).v
@ -51,9 +51,9 @@ export PARAM_M_KEEP_ENABLE ?= $(shell expr $(PARAM_M_DATA_WIDTH) \> 8 )
export PARAM_M_KEEP_WIDTH ?= $(shell expr $(PARAM_M_DATA_WIDTH) / 8 ) export PARAM_M_KEEP_WIDTH ?= $(shell expr $(PARAM_M_DATA_WIDTH) / 8 )
export PARAM_ID_ENABLE ?= 1 export PARAM_ID_ENABLE ?= 1
export PARAM_S_ID_WIDTH ?= 16 export PARAM_S_ID_WIDTH ?= 16
export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(PARAM_S_COUNT)-1).bit_length())") export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(S_COUNT)-1).bit_length())")
export PARAM_M_DEST_WIDTH ?= 8 export PARAM_M_DEST_WIDTH ?= 8
export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(PARAM_M_COUNT)-1).bit_length())") export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(M_COUNT)-1).bit_length())")
export PARAM_USER_ENABLE ?= 1 export PARAM_USER_ENABLE ?= 1
export PARAM_USER_WIDTH ?= 1 export PARAM_USER_WIDTH ?= 1
export PARAM_USER_BAD_FRAME_VALUE ?= 1 export PARAM_USER_BAD_FRAME_VALUE ?= 1
@ -133,7 +133,7 @@ endif
include $(shell cocotb-config --makefiles)/Makefile.sim include $(shell cocotb-config --makefiles)/Makefile.sim
$(WRAPPER).v: ../../rtl/$(DUT)_wrap.py $(WRAPPER).v: ../../rtl/$(DUT)_wrap.py
$< -p $(PARAM_S_COUNT) $(PARAM_M_COUNT) $< -p $(S_COUNT) $(M_COUNT)
iverilog_dump.v: iverilog_dump.v:
echo 'module iverilog_dump();' > $@ echo 'module iverilog_dump();' > $@

6
tb/axis_ram_switch/test_axis_ram_switch.py
View File

@ -351,9 +351,6 @@ def test_axis_ram_switch(request, s_count, m_count, s_data_width, m_data_width):
parameters = {} parameters = {}
parameters['S_COUNT'] = s_count
parameters['M_COUNT'] = m_count
parameters['FIFO_DEPTH'] = 4096 parameters['FIFO_DEPTH'] = 4096
parameters['CMD_FIFO_DEPTH'] = 32 parameters['CMD_FIFO_DEPTH'] = 32
parameters['SPEEDUP'] = 0 parameters['SPEEDUP'] = 0
@ -381,6 +378,9 @@ def test_axis_ram_switch(request, s_count, m_count, s_data_width, m_data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['S_COUNT'] = str(s_count)
extra_env['M_COUNT'] = str(m_count)
sim_build = os.path.join(tests_dir, "sim_build", sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', '')) request.node.name.replace('[', '-').replace(']', ''))

12
tb/axis_switch/Makefile
View File

@ -26,11 +26,11 @@ WAVES ?= 0
COCOTB_HDL_TIMEUNIT = 1ns COCOTB_HDL_TIMEUNIT = 1ns
COCOTB_HDL_TIMEPRECISION = 1ps COCOTB_HDL_TIMEPRECISION = 1ps
export PARAM_S_COUNT ?= 4 export S_COUNT ?= 4
export PARAM_M_COUNT ?= 4 export M_COUNT ?= 4
DUT = axis_switch DUT = axis_switch
WRAPPER = $(DUT)_wrap_$(PARAM_S_COUNT)x$(PARAM_M_COUNT) WRAPPER = $(DUT)_wrap_$(S_COUNT)x$(M_COUNT)
TOPLEVEL = $(WRAPPER) TOPLEVEL = $(WRAPPER)
MODULE = test_$(DUT) MODULE = test_$(DUT)
VERILOG_SOURCES += $(WRAPPER).v VERILOG_SOURCES += $(WRAPPER).v
@ -45,9 +45,9 @@ export PARAM_KEEP_ENABLE ?= $(shell expr $(PARAM_DATA_WIDTH) \> 8 )
export PARAM_KEEP_WIDTH ?= $(shell expr $(PARAM_DATA_WIDTH) / 8 ) export PARAM_KEEP_WIDTH ?= $(shell expr $(PARAM_DATA_WIDTH) / 8 )
export PARAM_ID_ENABLE ?= 1 export PARAM_ID_ENABLE ?= 1
export PARAM_S_ID_WIDTH ?= 16 export PARAM_S_ID_WIDTH ?= 16
export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(PARAM_S_COUNT)-1).bit_length())") export PARAM_M_ID_WIDTH ?= $(shell python -c "print($(PARAM_S_ID_WIDTH) + ($(S_COUNT)-1).bit_length())")
export PARAM_M_DEST_WIDTH ?= 8 export PARAM_M_DEST_WIDTH ?= 8
export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(PARAM_M_COUNT)-1).bit_length())") export PARAM_S_DEST_WIDTH ?= $(shell python -c "print($(PARAM_M_DEST_WIDTH) + ($(M_COUNT)-1).bit_length())")
export PARAM_USER_ENABLE ?= 1 export PARAM_USER_ENABLE ?= 1
export PARAM_USER_WIDTH ?= 1 export PARAM_USER_WIDTH ?= 1
export PARAM_UPDATE_TID ?= 1 export PARAM_UPDATE_TID ?= 1
@ -106,7 +106,7 @@ endif
include $(shell cocotb-config --makefiles)/Makefile.sim include $(shell cocotb-config --makefiles)/Makefile.sim
$(WRAPPER).v: ../../rtl/$(DUT)_wrap.py $(WRAPPER).v: ../../rtl/$(DUT)_wrap.py
$< -p $(PARAM_S_COUNT) $(PARAM_M_COUNT) $< -p $(S_COUNT) $(M_COUNT)
iverilog_dump.v: iverilog_dump.v:
echo 'module iverilog_dump();' > $@ echo 'module iverilog_dump();' > $@

6
tb/axis_switch/test_axis_switch.py
View File

@ -349,9 +349,6 @@ def test_axis_switch(request, s_count, m_count, data_width):
parameters = {} parameters = {}
parameters['S_COUNT'] = s_count
parameters['M_COUNT'] = m_count
parameters['DATA_WIDTH'] = data_width parameters['DATA_WIDTH'] = data_width
parameters['KEEP_ENABLE'] = int(parameters['DATA_WIDTH'] > 8) parameters['KEEP_ENABLE'] = int(parameters['DATA_WIDTH'] > 8)
parameters['KEEP_WIDTH'] = parameters['DATA_WIDTH'] // 8 parameters['KEEP_WIDTH'] = parameters['DATA_WIDTH'] // 8
@ -370,6 +367,9 @@ def test_axis_switch(request, s_count, m_count, data_width):
extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()}
extra_env['S_COUNT'] = str(s_count)
extra_env['M_COUNT'] = str(m_count)
sim_build = os.path.join(tests_dir, "sim_build", sim_build = os.path.join(tests_dir, "sim_build",
request.node.name.replace('[', '-').replace(']', '')) request.node.name.replace('[', '-').replace(']', ''))