From 2abb41385468e91f52f5ea5916390660ce03c009 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 2 May 2019 20:30:37 -0700 Subject: [PATCH] Fix signal name --- example/KC705/fpga_gmii/rtl/fpga.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/example/KC705/fpga_gmii/rtl/fpga.v b/example/KC705/fpga_gmii/rtl/fpga.v index bf0dc4a0e..8db1ad5c5 100644 --- a/example/KC705/fpga_gmii/rtl/fpga.v +++ b/example/KC705/fpga_gmii/rtl/fpga.v @@ -80,7 +80,7 @@ wire clk_200mhz_bufg; wire clk_200mhz_mmcm_out; // Internal 125 MHz clock -wire clk_200mhz_int; +wire clk_int; wire rst_int; wire mmcm_rst = reset;