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Add invalid header and tuser assert checks and tests

This commit is contained in:
Alex Forencich 2014-09-15 19:31:10 -07:00
parent 85d11645eb
commit 33c044e035
8 changed files with 122 additions and 76 deletions

View File

@ -70,7 +70,8 @@ module arp_eth_rx
* Status signals
*/
output wire busy,
output wire error_header_early_termination
output wire error_header_early_termination,
output wire error_invalid_header
);
/*
@ -156,6 +157,7 @@ reg [31:0] output_arp_tpa_reg = 0;
reg busy_reg = 0;
reg error_header_early_termination_reg = 0, error_header_early_termination_next;
reg error_invalid_header_reg = 0, error_invalid_header_next;
assign input_eth_hdr_ready = input_eth_hdr_ready_reg;
assign input_eth_payload_tready = input_eth_payload_tready_reg;
@ -176,6 +178,7 @@ assign output_arp_tpa = output_arp_tpa_reg;
assign busy = busy_reg;
assign error_header_early_termination = error_header_early_termination_reg;
assign error_invalid_header = error_invalid_header_reg;
always @* begin
state_next = 2'bz;
@ -215,6 +218,7 @@ always @* begin
output_frame_valid_next = output_frame_valid_reg & ~output_frame_ready;
error_header_early_termination_next = 0;
error_invalid_header_next = 0;
case (state_reg)
STATE_IDLE: begin
@ -265,7 +269,6 @@ always @* begin
8'h1A: store_arp_tpa_1 = 1;
8'h1B: begin
store_arp_tpa_0 = 1;
output_frame_valid_next = 1;
state_next = STATE_WAIT_LAST;
end
endcase
@ -273,6 +276,10 @@ always @* begin
state_next = STATE_IDLE;
if (frame_ptr_reg != 8'h1B) begin
error_header_early_termination_next = 1;
end else if (output_arp_hlen != 6 || output_arp_plen != 4) begin
error_invalid_header_next = 1;
end else begin
output_frame_valid_next = ~input_eth_payload_tuser;
end
end
end else begin
@ -284,6 +291,11 @@ always @* begin
if (input_eth_payload_tvalid) begin
// word transfer out - done
if (input_eth_payload_tlast) begin
if (output_arp_hlen != 6 || output_arp_plen != 4) begin
error_invalid_header_next = 1;
end else begin
output_frame_valid_next = ~input_eth_payload_tuser;
end
state_next = STATE_IDLE;
end else begin
state_next = STATE_WAIT_LAST;
@ -307,6 +319,7 @@ always @(posedge clk or posedge rst) begin
output_eth_type_reg <= 0;
busy_reg <= 0;
error_header_early_termination_reg <= 0;
error_invalid_header_reg <= 0;
end else begin
state_reg <= state_next;
@ -315,6 +328,7 @@ always @(posedge clk or posedge rst) begin
output_frame_valid_reg <= output_frame_valid_next;
error_header_early_termination_reg <= error_header_early_termination_next;
error_invalid_header_reg <= error_invalid_header_next;
busy_reg <= state_next != STATE_IDLE;

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@ -71,7 +71,8 @@ module arp_eth_rx_64
* Status signals
*/
output wire busy,
output wire error_header_early_termination
output wire error_header_early_termination,
output wire error_invalid_header
);
/*
@ -133,6 +134,7 @@ reg [31:0] output_arp_tpa_reg = 0;
reg busy_reg = 0;
reg error_header_early_termination_reg = 0, error_header_early_termination_next;
reg error_invalid_header_reg = 0, error_invalid_header_next;
assign input_eth_hdr_ready = input_eth_hdr_ready_reg;
assign input_eth_payload_tready = input_eth_payload_tready_reg;
@ -153,6 +155,7 @@ assign output_arp_tpa = output_arp_tpa_reg;
assign busy = busy_reg;
assign error_header_early_termination = error_header_early_termination_reg;
assign error_invalid_header = error_invalid_header_reg;
always @* begin
state_next = 2'bz;
@ -168,6 +171,7 @@ always @* begin
output_frame_valid_next = output_frame_valid_reg & ~output_frame_ready;
error_header_early_termination_next = 0;
error_invalid_header_next = 0;
case (state_reg)
STATE_IDLE: begin
@ -194,7 +198,6 @@ always @* begin
8'h02: store_arp_hdr_word_2 = 1;
8'h03: begin
store_arp_hdr_word_3 = 1;
output_frame_valid_next = 1;
state_next = STATE_WAIT_LAST;
end
endcase
@ -202,6 +205,10 @@ always @* begin
state_next = STATE_IDLE;
if (frame_ptr_reg != 8'h03 | (input_eth_payload_tkeep & 8'h0F) != 8'h0F) begin
error_header_early_termination_next = 1;
end else if (output_arp_hlen != 6 || output_arp_plen != 4) begin
error_invalid_header_next = 1;
end else begin
output_frame_valid_next = ~input_eth_payload_tuser;
end
end
end else begin
@ -213,6 +220,11 @@ always @* begin
if (input_eth_payload_tvalid) begin
// word transfer out - done
if (input_eth_payload_tlast) begin
if (output_arp_hlen != 6 || output_arp_plen != 4) begin
error_invalid_header_next = 1;
end else begin
output_frame_valid_next = ~input_eth_payload_tuser;
end
state_next = STATE_IDLE;
end else begin
state_next = STATE_WAIT_LAST;
@ -236,6 +248,7 @@ always @(posedge clk or posedge rst) begin
output_eth_type_reg <= 0;
busy_reg <= 0;
error_header_early_termination_reg <= 0;
error_invalid_header_reg <= 0;
end else begin
state_reg <= state_next;
@ -244,6 +257,7 @@ always @(posedge clk or posedge rst) begin
output_frame_valid_reg <= output_frame_valid_next;
error_header_early_termination_reg <= error_header_early_termination_next;
error_invalid_header_reg <= error_invalid_header_next;
busy_reg <= state_next != STATE_IDLE;

View File

@ -72,7 +72,8 @@ def dut_arp_eth_rx(clk,
output_arp_tpa,
busy,
error_header_early_termination):
error_header_early_termination,
error_invalid_header):
if os.system(build_cmd):
raise Exception("Error running build command")
@ -108,7 +109,8 @@ def dut_arp_eth_rx(clk,
output_arp_tpa=output_arp_tpa,
busy=busy,
error_header_early_termination=error_header_early_termination)
error_header_early_termination=error_header_early_termination,
error_invalid_header=error_invalid_header)
def bench():
@ -145,6 +147,7 @@ def bench():
output_arp_tpa = Signal(intbv(0)[32:])
busy = Signal(bool(0))
error_header_early_termination = Signal(bool(0))
error_invalid_header = Signal(bool(0))
# sources and sinks
source_queue = Queue()
@ -220,7 +223,8 @@ def bench():
output_arp_tpa,
busy,
error_header_early_termination)
error_header_early_termination,
error_invalid_header)
@always(delay(4))
def clkgen():
@ -555,8 +559,35 @@ def bench():
yield delay(100)
yield clk.posedge
print("test 7: bad header")
current_test.next = 7
print("test 8: bad header")
current_test.next = 8
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
test_frame.eth_src_mac = 0x5A5152535455
test_frame.eth_type = 0x0806
test_frame.arp_htype = 0x0001
test_frame.arp_ptype = 0x0800
test_frame.arp_hlen = 0
test_frame.arp_plen = 0
test_frame.arp_oper = 1
test_frame.arp_sha = 0x5A5152535455
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame.build_eth())
yield clk.posedge
yield input_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
assert error_invalid_header
yield delay(100)
yield clk.posedge
print("test 9: assert tuser")
current_test.next = 9
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
@ -571,13 +602,15 @@ def bench():
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame.build_eth())
eth_frame = test_frame.build_eth()
eth_frame.payload.user = 1
source_queue.put(eth_frame)
yield clk.posedge
yield input_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
#assert error_header_early_termination
assert sink_queue.empty()
yield delay(100)

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@ -61,6 +61,7 @@ wire [47:0] output_arp_tha;
wire [31:0] output_arp_tpa;
wire busy;
wire error_header_early_termination;
wire error_invalid_header;
initial begin
// myhdl integration
@ -92,7 +93,8 @@ initial begin
output_arp_tha,
output_arp_tpa,
busy,
error_header_early_termination);
error_header_early_termination,
error_invalid_header);
// dump file
$dumpfile("test_arp_eth_rx.lxt");
@ -131,7 +133,8 @@ UUT (
.output_arp_tpa(output_arp_tpa),
// Status signals
.busy(busy),
.error_header_early_termination(error_header_early_termination)
.error_header_early_termination(error_header_early_termination),
.error_invalid_header(error_invalid_header)
);
endmodule

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@ -73,7 +73,8 @@ def dut_arp_eth_rx_64(clk,
output_arp_tpa,
busy,
error_header_early_termination):
error_header_early_termination,
error_invalid_header):
if os.system(build_cmd):
raise Exception("Error running build command")
@ -110,7 +111,8 @@ def dut_arp_eth_rx_64(clk,
output_arp_tpa=output_arp_tpa,
busy=busy,
error_header_early_termination=error_header_early_termination)
error_header_early_termination=error_header_early_termination,
error_invalid_header=error_invalid_header)
def bench():
@ -148,6 +150,7 @@ def bench():
output_arp_tpa = Signal(intbv(0)[32:])
busy = Signal(bool(0))
error_header_early_termination = Signal(bool(0))
error_invalid_header = Signal(bool(0))
# sources and sinks
source_queue = Queue()
@ -225,7 +228,8 @@ def bench():
output_arp_tpa,
busy,
error_header_early_termination)
error_header_early_termination,
error_invalid_header)
@always(delay(4))
def clkgen():
@ -560,8 +564,35 @@ def bench():
yield delay(100)
yield clk.posedge
print("test 7: bad header")
current_test.next = 7
print("test 8: bad header")
current_test.next = 8
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
test_frame.eth_src_mac = 0x5A5152535455
test_frame.eth_type = 0x0806
test_frame.arp_htype = 0x0001
test_frame.arp_ptype = 0x0800
test_frame.arp_hlen = 0
test_frame.arp_plen = 0
test_frame.arp_oper = 1
test_frame.arp_sha = 0x5A5152535455
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame.build_eth())
yield clk.posedge
yield input_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
assert error_invalid_header
yield delay(100)
yield clk.posedge
print("test 9: assert tuser")
current_test.next = 9
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
@ -576,13 +607,15 @@ def bench():
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame.build_eth())
eth_frame = test_frame.build_eth()
eth_frame.payload.user = 1
source_queue.put(eth_frame)
yield clk.posedge
yield input_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
#assert error_header_early_termination
assert sink_queue.empty()
yield delay(100)

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@ -62,6 +62,7 @@ wire [47:0] output_arp_tha;
wire [31:0] output_arp_tpa;
wire busy;
wire error_header_early_termination;
wire error_invalid_header;
initial begin
// myhdl integration
@ -94,7 +95,8 @@ initial begin
output_arp_tha,
output_arp_tpa,
busy,
error_header_early_termination);
error_header_early_termination,
error_invalid_header);
// dump file
$dumpfile("test_arp_eth_rx_64.lxt");
@ -134,7 +136,8 @@ UUT (
.output_arp_tpa(output_arp_tpa),
// Status signals
.busy(busy),
.error_header_early_termination(error_header_early_termination)
.error_header_early_termination(error_header_early_termination),
.error_invalid_header(error_invalid_header)
);
endmodule

View File

@ -431,33 +431,6 @@ def bench():
yield delay(100)
yield clk.posedge
print("test 7: bad header")
current_test.next = 7
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
test_frame.eth_src_mac = 0x5A5152535455
test_frame.eth_type = 0x0806
test_frame.arp_htype = 0x0001
test_frame.arp_ptype = 0x0800
test_frame.arp_hlen = 6
test_frame.arp_plen = 4
test_frame.arp_oper = 1
test_frame.arp_sha = 0x5A5152535455
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame)
yield clk.posedge
yield output_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
#assert frame_error
yield delay(100)
raise StopSimulation
return dut, source, sink, clkgen, check

View File

@ -436,33 +436,6 @@ def bench():
yield delay(100)
yield clk.posedge
print("test 7: bad header")
current_test.next = 7
test_frame = arp_ep.ARPFrame()
test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
test_frame.eth_src_mac = 0x5A5152535455
test_frame.eth_type = 0x0806
test_frame.arp_htype = 0x0001
test_frame.arp_ptype = 0x0800
test_frame.arp_hlen = 6
test_frame.arp_plen = 4
test_frame.arp_oper = 1
test_frame.arp_sha = 0x5A5152535455
test_frame.arp_spa = 0xc0a80164
test_frame.arp_tha = 0xDAD1D2D3D4D5
test_frame.arp_tpa = 0xc0a80165
source_queue.put(test_frame)
yield clk.posedge
yield output_eth_payload_tlast.posedge
yield clk.posedge
yield clk.posedge
#assert frame_error
yield delay(100)
raise StopSimulation
return dut, source, sink, clkgen, check