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Add invalid header and tuser assert checks and tests
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85d11645eb
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33c044e035
@ -70,7 +70,8 @@ module arp_eth_rx
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* Status signals
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*/
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output wire busy,
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output wire error_header_early_termination
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output wire error_header_early_termination,
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output wire error_invalid_header
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);
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/*
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@ -156,6 +157,7 @@ reg [31:0] output_arp_tpa_reg = 0;
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reg busy_reg = 0;
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reg error_header_early_termination_reg = 0, error_header_early_termination_next;
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reg error_invalid_header_reg = 0, error_invalid_header_next;
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assign input_eth_hdr_ready = input_eth_hdr_ready_reg;
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assign input_eth_payload_tready = input_eth_payload_tready_reg;
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@ -176,6 +178,7 @@ assign output_arp_tpa = output_arp_tpa_reg;
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assign busy = busy_reg;
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assign error_header_early_termination = error_header_early_termination_reg;
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assign error_invalid_header = error_invalid_header_reg;
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always @* begin
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state_next = 2'bz;
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@ -215,6 +218,7 @@ always @* begin
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output_frame_valid_next = output_frame_valid_reg & ~output_frame_ready;
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error_header_early_termination_next = 0;
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error_invalid_header_next = 0;
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case (state_reg)
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STATE_IDLE: begin
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@ -265,7 +269,6 @@ always @* begin
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8'h1A: store_arp_tpa_1 = 1;
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8'h1B: begin
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store_arp_tpa_0 = 1;
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output_frame_valid_next = 1;
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state_next = STATE_WAIT_LAST;
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end
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endcase
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@ -273,6 +276,10 @@ always @* begin
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state_next = STATE_IDLE;
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if (frame_ptr_reg != 8'h1B) begin
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error_header_early_termination_next = 1;
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end else if (output_arp_hlen != 6 || output_arp_plen != 4) begin
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error_invalid_header_next = 1;
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end else begin
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output_frame_valid_next = ~input_eth_payload_tuser;
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end
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end
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end else begin
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@ -284,6 +291,11 @@ always @* begin
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if (input_eth_payload_tvalid) begin
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// word transfer out - done
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if (input_eth_payload_tlast) begin
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if (output_arp_hlen != 6 || output_arp_plen != 4) begin
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error_invalid_header_next = 1;
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end else begin
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output_frame_valid_next = ~input_eth_payload_tuser;
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end
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state_next = STATE_IDLE;
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end else begin
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state_next = STATE_WAIT_LAST;
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@ -307,6 +319,7 @@ always @(posedge clk or posedge rst) begin
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output_eth_type_reg <= 0;
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busy_reg <= 0;
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error_header_early_termination_reg <= 0;
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error_invalid_header_reg <= 0;
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end else begin
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state_reg <= state_next;
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@ -315,6 +328,7 @@ always @(posedge clk or posedge rst) begin
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output_frame_valid_reg <= output_frame_valid_next;
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error_header_early_termination_reg <= error_header_early_termination_next;
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error_invalid_header_reg <= error_invalid_header_next;
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busy_reg <= state_next != STATE_IDLE;
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@ -71,7 +71,8 @@ module arp_eth_rx_64
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* Status signals
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*/
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output wire busy,
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output wire error_header_early_termination
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output wire error_header_early_termination,
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output wire error_invalid_header
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);
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/*
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@ -133,6 +134,7 @@ reg [31:0] output_arp_tpa_reg = 0;
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reg busy_reg = 0;
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reg error_header_early_termination_reg = 0, error_header_early_termination_next;
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reg error_invalid_header_reg = 0, error_invalid_header_next;
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assign input_eth_hdr_ready = input_eth_hdr_ready_reg;
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assign input_eth_payload_tready = input_eth_payload_tready_reg;
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@ -153,6 +155,7 @@ assign output_arp_tpa = output_arp_tpa_reg;
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assign busy = busy_reg;
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assign error_header_early_termination = error_header_early_termination_reg;
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assign error_invalid_header = error_invalid_header_reg;
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always @* begin
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state_next = 2'bz;
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@ -168,6 +171,7 @@ always @* begin
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output_frame_valid_next = output_frame_valid_reg & ~output_frame_ready;
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error_header_early_termination_next = 0;
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error_invalid_header_next = 0;
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case (state_reg)
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STATE_IDLE: begin
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@ -194,7 +198,6 @@ always @* begin
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8'h02: store_arp_hdr_word_2 = 1;
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8'h03: begin
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store_arp_hdr_word_3 = 1;
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output_frame_valid_next = 1;
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state_next = STATE_WAIT_LAST;
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end
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endcase
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@ -202,6 +205,10 @@ always @* begin
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state_next = STATE_IDLE;
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if (frame_ptr_reg != 8'h03 | (input_eth_payload_tkeep & 8'h0F) != 8'h0F) begin
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error_header_early_termination_next = 1;
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end else if (output_arp_hlen != 6 || output_arp_plen != 4) begin
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error_invalid_header_next = 1;
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end else begin
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output_frame_valid_next = ~input_eth_payload_tuser;
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end
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end
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end else begin
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@ -213,6 +220,11 @@ always @* begin
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if (input_eth_payload_tvalid) begin
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// word transfer out - done
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if (input_eth_payload_tlast) begin
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if (output_arp_hlen != 6 || output_arp_plen != 4) begin
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error_invalid_header_next = 1;
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end else begin
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output_frame_valid_next = ~input_eth_payload_tuser;
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end
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state_next = STATE_IDLE;
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end else begin
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state_next = STATE_WAIT_LAST;
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@ -236,6 +248,7 @@ always @(posedge clk or posedge rst) begin
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output_eth_type_reg <= 0;
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busy_reg <= 0;
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error_header_early_termination_reg <= 0;
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error_invalid_header_reg <= 0;
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end else begin
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state_reg <= state_next;
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@ -244,6 +257,7 @@ always @(posedge clk or posedge rst) begin
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output_frame_valid_reg <= output_frame_valid_next;
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error_header_early_termination_reg <= error_header_early_termination_next;
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error_invalid_header_reg <= error_invalid_header_next;
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busy_reg <= state_next != STATE_IDLE;
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@ -72,7 +72,8 @@ def dut_arp_eth_rx(clk,
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output_arp_tpa,
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busy,
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error_header_early_termination):
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error_header_early_termination,
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error_invalid_header):
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if os.system(build_cmd):
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raise Exception("Error running build command")
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@ -108,7 +109,8 @@ def dut_arp_eth_rx(clk,
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output_arp_tpa=output_arp_tpa,
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busy=busy,
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error_header_early_termination=error_header_early_termination)
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error_header_early_termination=error_header_early_termination,
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error_invalid_header=error_invalid_header)
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def bench():
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@ -145,6 +147,7 @@ def bench():
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output_arp_tpa = Signal(intbv(0)[32:])
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busy = Signal(bool(0))
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error_header_early_termination = Signal(bool(0))
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error_invalid_header = Signal(bool(0))
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# sources and sinks
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source_queue = Queue()
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@ -220,7 +223,8 @@ def bench():
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output_arp_tpa,
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busy,
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error_header_early_termination)
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error_header_early_termination,
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error_invalid_header)
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@always(delay(4))
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def clkgen():
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@ -555,8 +559,35 @@ def bench():
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yield delay(100)
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yield clk.posedge
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print("test 7: bad header")
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current_test.next = 7
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print("test 8: bad header")
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current_test.next = 8
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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test_frame.eth_src_mac = 0x5A5152535455
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test_frame.eth_type = 0x0806
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test_frame.arp_htype = 0x0001
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test_frame.arp_ptype = 0x0800
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test_frame.arp_hlen = 0
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test_frame.arp_plen = 0
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test_frame.arp_oper = 1
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test_frame.arp_sha = 0x5A5152535455
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame.build_eth())
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yield clk.posedge
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yield input_eth_payload_tlast.posedge
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yield clk.posedge
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yield clk.posedge
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assert error_invalid_header
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yield delay(100)
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yield clk.posedge
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print("test 9: assert tuser")
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current_test.next = 9
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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@ -571,13 +602,15 @@ def bench():
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame.build_eth())
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eth_frame = test_frame.build_eth()
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eth_frame.payload.user = 1
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source_queue.put(eth_frame)
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yield clk.posedge
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yield input_eth_payload_tlast.posedge
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yield clk.posedge
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yield clk.posedge
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#assert error_header_early_termination
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assert sink_queue.empty()
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yield delay(100)
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@ -61,6 +61,7 @@ wire [47:0] output_arp_tha;
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wire [31:0] output_arp_tpa;
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wire busy;
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wire error_header_early_termination;
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wire error_invalid_header;
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initial begin
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// myhdl integration
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@ -92,7 +93,8 @@ initial begin
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output_arp_tha,
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output_arp_tpa,
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busy,
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error_header_early_termination);
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error_header_early_termination,
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error_invalid_header);
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// dump file
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$dumpfile("test_arp_eth_rx.lxt");
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@ -131,7 +133,8 @@ UUT (
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.output_arp_tpa(output_arp_tpa),
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// Status signals
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.busy(busy),
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.error_header_early_termination(error_header_early_termination)
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.error_header_early_termination(error_header_early_termination),
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.error_invalid_header(error_invalid_header)
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);
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endmodule
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@ -73,7 +73,8 @@ def dut_arp_eth_rx_64(clk,
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output_arp_tpa,
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busy,
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error_header_early_termination):
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error_header_early_termination,
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error_invalid_header):
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if os.system(build_cmd):
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raise Exception("Error running build command")
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@ -110,7 +111,8 @@ def dut_arp_eth_rx_64(clk,
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output_arp_tpa=output_arp_tpa,
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busy=busy,
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error_header_early_termination=error_header_early_termination)
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error_header_early_termination=error_header_early_termination,
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error_invalid_header=error_invalid_header)
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def bench():
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@ -148,6 +150,7 @@ def bench():
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output_arp_tpa = Signal(intbv(0)[32:])
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busy = Signal(bool(0))
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error_header_early_termination = Signal(bool(0))
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error_invalid_header = Signal(bool(0))
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# sources and sinks
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source_queue = Queue()
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@ -225,7 +228,8 @@ def bench():
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output_arp_tpa,
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busy,
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error_header_early_termination)
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error_header_early_termination,
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error_invalid_header)
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@always(delay(4))
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def clkgen():
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@ -560,8 +564,35 @@ def bench():
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yield delay(100)
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yield clk.posedge
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print("test 7: bad header")
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current_test.next = 7
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print("test 8: bad header")
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current_test.next = 8
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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test_frame.eth_src_mac = 0x5A5152535455
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test_frame.eth_type = 0x0806
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test_frame.arp_htype = 0x0001
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test_frame.arp_ptype = 0x0800
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test_frame.arp_hlen = 0
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test_frame.arp_plen = 0
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test_frame.arp_oper = 1
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test_frame.arp_sha = 0x5A5152535455
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame.build_eth())
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yield clk.posedge
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yield input_eth_payload_tlast.posedge
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yield clk.posedge
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yield clk.posedge
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assert error_invalid_header
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yield delay(100)
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yield clk.posedge
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print("test 9: assert tuser")
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current_test.next = 9
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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@ -576,13 +607,15 @@ def bench():
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame.build_eth())
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eth_frame = test_frame.build_eth()
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eth_frame.payload.user = 1
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source_queue.put(eth_frame)
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yield clk.posedge
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yield input_eth_payload_tlast.posedge
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yield clk.posedge
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yield clk.posedge
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#assert error_header_early_termination
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assert sink_queue.empty()
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yield delay(100)
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@ -62,6 +62,7 @@ wire [47:0] output_arp_tha;
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wire [31:0] output_arp_tpa;
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wire busy;
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wire error_header_early_termination;
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wire error_invalid_header;
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initial begin
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// myhdl integration
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@ -94,7 +95,8 @@ initial begin
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output_arp_tha,
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output_arp_tpa,
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busy,
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error_header_early_termination);
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error_header_early_termination,
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error_invalid_header);
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// dump file
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$dumpfile("test_arp_eth_rx_64.lxt");
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@ -134,7 +136,8 @@ UUT (
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.output_arp_tpa(output_arp_tpa),
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// Status signals
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.busy(busy),
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.error_header_early_termination(error_header_early_termination)
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.error_header_early_termination(error_header_early_termination),
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.error_invalid_header(error_invalid_header)
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);
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endmodule
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@ -431,33 +431,6 @@ def bench():
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yield delay(100)
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yield clk.posedge
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print("test 7: bad header")
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current_test.next = 7
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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test_frame.eth_src_mac = 0x5A5152535455
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test_frame.eth_type = 0x0806
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test_frame.arp_htype = 0x0001
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test_frame.arp_ptype = 0x0800
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test_frame.arp_hlen = 6
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test_frame.arp_plen = 4
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test_frame.arp_oper = 1
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test_frame.arp_sha = 0x5A5152535455
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame)
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yield clk.posedge
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yield output_eth_payload_tlast.posedge
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yield clk.posedge
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yield clk.posedge
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#assert frame_error
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yield delay(100)
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raise StopSimulation
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return dut, source, sink, clkgen, check
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@ -436,33 +436,6 @@ def bench():
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yield delay(100)
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yield clk.posedge
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print("test 7: bad header")
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current_test.next = 7
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test_frame = arp_ep.ARPFrame()
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test_frame.eth_dest_mac = 0xFFFFFFFFFFFF
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test_frame.eth_src_mac = 0x5A5152535455
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test_frame.eth_type = 0x0806
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test_frame.arp_htype = 0x0001
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test_frame.arp_ptype = 0x0800
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test_frame.arp_hlen = 6
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test_frame.arp_plen = 4
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test_frame.arp_oper = 1
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test_frame.arp_sha = 0x5A5152535455
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test_frame.arp_spa = 0xc0a80164
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test_frame.arp_tha = 0xDAD1D2D3D4D5
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test_frame.arp_tpa = 0xc0a80165
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source_queue.put(test_frame)
|
||||
yield clk.posedge
|
||||
|
||||
yield output_eth_payload_tlast.posedge
|
||||
yield clk.posedge
|
||||
yield clk.posedge
|
||||
#assert frame_error
|
||||
|
||||
yield delay(100)
|
||||
|
||||
raise StopSimulation
|
||||
|
||||
return dut, source, sink, clkgen, check
|
||||
|
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Reference in New Issue
Block a user