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Compute DEST_WIDTH

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This commit is contained in:
Alex Forencich 2018-10-24 22:21:31 -07:00
parent 9d813226d0
commit 3bbf8524d6
4 changed files with 11 additions and 16 deletions
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3
tb/test_axis_switch_4x4.py
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@ -27,6 +27,7 @@ from myhdl import *
import os
import axis_ep
import math
module = 'axis_switch'
testbench = 'test_%s_4x4' % module
@ -53,7 +54,7 @@ def bench():
KEEP_WIDTH = (DATA_WIDTH/8)
ID_ENABLE = 1
ID_WIDTH = 8
DEST_WIDTH = 3
DEST_WIDTH = math.ceil(math.log(M_COUNT+1, 2))
USER_ENABLE = 1
USER_WIDTH = 1
M_BASE = [0, 1, 2, 3]

2
tb/test_axis_switch_4x4.v
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@ -39,7 +39,7 @@ parameter KEEP_ENABLE = (DATA_WIDTH>8);
parameter KEEP_WIDTH = (DATA_WIDTH/8);
parameter ID_ENABLE = 1;
parameter ID_WIDTH = 8;
parameter DEST_WIDTH = 3;
parameter DEST_WIDTH = $clog2(M_COUNT+1);
parameter USER_ENABLE = 1;
parameter USER_WIDTH = 1;
parameter M_BASE = {32'd3, 32'd2, 32'd1, 32'd0};

20
tb/test_axis_switch_4x4_64.py
View File

@ -27,6 +27,7 @@ from myhdl import *
import os
import axis_ep
import math
module = 'axis_switch'
testbench = 'test_%s_4x4_64' % module
@ -53,21 +54,14 @@ def bench():
KEEP_WIDTH = (DATA_WIDTH/8)
ID_ENABLE = 1
ID_WIDTH = 8
DEST_WIDTH = 3
DEST_WIDTH = math.ceil(math.log(M_COUNT+1, 2))
USER_ENABLE = 1
USER_WIDTH = 1
OUT_0_BASE = 0
OUT_0_TOP = 0
OUT_0_CONNECT = 0xf
OUT_1_BASE = 1
OUT_1_TOP = 1
OUT_1_CONNECT = 0xf
OUT_2_BASE = 2
OUT_2_TOP = 2
OUT_2_CONNECT = 0xf
OUT_3_BASE = 3
OUT_3_TOP = 3
OUT_3_CONNECT = 0xf
M_BASE = [0, 1, 2, 3]
M_TOP = [0, 1, 2, 3]
M_CONNECT = [0b1111]*M_COUNT
S_REG_TYPE = 0
M_REG_TYPE = 2
ARB_TYPE = "ROUND_ROBIN"
LSB_PRIORITY = "HIGH"

2
tb/test_axis_switch_4x4_64.v
View File

@ -39,7 +39,7 @@ parameter KEEP_ENABLE = (DATA_WIDTH>8);
parameter KEEP_WIDTH = (DATA_WIDTH/8);
parameter ID_ENABLE = 1;
parameter ID_WIDTH = 8;
parameter DEST_WIDTH = 3;
parameter DEST_WIDTH = $clog2(M_COUNT+1);
parameter USER_ENABLE = 1;
parameter USER_WIDTH = 1;
parameter M_BASE = {32'd3, 32'd2, 32'd1, 32'd0};