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README.md
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Corundum currently supports Xilinx Virtex 7, UltraScale, and UltraScale+ series devices. Designs are included for the following FPGA boards:
* Alpha Data ADM-PCIE-9V3 (Xilinx Virtex UltraScale+ XCVU3P)
* Exablaze ExaNIC X10 (Xilinx Kintex UltraScale XCKU035)
* Exablaze ExaNIC X25 (Xilinx Kintex UltraScale+ XCKU3P)
* Exablaze ExaNIC X10/Cisco Nexus K35-S (Xilinx Kintex UltraScale XCKU035)
* Exablaze ExaNIC X25/Cisco Nexus K3P-S (Xilinx Kintex UltraScale+ XCKU3P)
* Silicom fb2CG@KU15P (Xilinx Kintex UltraScale+ XCKU15P)
* NetFPGA SUME (Xilinx Virtex 7 XC7V690T)
* Xilinx Alveo U50 (Xilinx Virtex UltraScale+ XCU50)

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fpga/mqnic/ExaNIC_X10/fpga/README.md
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# Corundum mqnic for ExaNIC X10
# Corundum mqnic for ExaNIC X10/Cisco Nexus K35-S
## Introduction
This design targets the Exablaze ExaNIC X10 FPGA board.
This design targets the Exablaze ExaNIC X10/Cisco Nexus K35-S FPGA board.
FPGA: xcku035-fbva676-2-e
PHY: 10G BASE-R PHY IP core and internal GTH transceiver

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fpga/mqnic/ExaNIC_X25/fpga_10g/README.md
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# Corundum mqnic for ExaNIC X25
# Corundum mqnic for ExaNIC X25/Cisco Nexus K3P-S
## Introduction
This design targets the Exablaze ExaNIC X25 FPGA board.
This design targets the Exablaze ExaNIC X25/Cisco Nexus K3P-S FPGA board.
FPGA: xcku3p-ffvb676-2-e
PHY: 10G BASE-R PHY IP core and internal GTY transceiver