From 45b7e3566c805922e4db78859c56f8f3a9d9c15b Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 26 Sep 2021 01:16:34 -0700 Subject: [PATCH] Update readme --- README.md | 4 ++-- fpga/mqnic/ExaNIC_X10/fpga/README.md | 4 ++-- fpga/mqnic/ExaNIC_X25/fpga_10g/README.md | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/README.md b/README.md index 6e9138314..449ebccfc 100644 --- a/README.md +++ b/README.md @@ -21,8 +21,8 @@ Corundum also provides an application section for implementing custom logic. Th Corundum currently supports Xilinx Virtex 7, UltraScale, and UltraScale+ series devices. Designs are included for the following FPGA boards: * Alpha Data ADM-PCIE-9V3 (Xilinx Virtex UltraScale+ XCVU3P) -* Exablaze ExaNIC X10 (Xilinx Kintex UltraScale XCKU035) -* Exablaze ExaNIC X25 (Xilinx Kintex UltraScale+ XCKU3P) +* Exablaze ExaNIC X10/Cisco Nexus K35-S (Xilinx Kintex UltraScale XCKU035) +* Exablaze ExaNIC X25/Cisco Nexus K3P-S (Xilinx Kintex UltraScale+ XCKU3P) * Silicom fb2CG@KU15P (Xilinx Kintex UltraScale+ XCKU15P) * NetFPGA SUME (Xilinx Virtex 7 XC7V690T) * Xilinx Alveo U50 (Xilinx Virtex UltraScale+ XCU50) diff --git a/fpga/mqnic/ExaNIC_X10/fpga/README.md b/fpga/mqnic/ExaNIC_X10/fpga/README.md index 6e9db9ea3..476f8c8f8 100644 --- a/fpga/mqnic/ExaNIC_X10/fpga/README.md +++ b/fpga/mqnic/ExaNIC_X10/fpga/README.md @@ -1,8 +1,8 @@ -# Corundum mqnic for ExaNIC X10 +# Corundum mqnic for ExaNIC X10/Cisco Nexus K35-S ## Introduction -This design targets the Exablaze ExaNIC X10 FPGA board. +This design targets the Exablaze ExaNIC X10/Cisco Nexus K35-S FPGA board. FPGA: xcku035-fbva676-2-e PHY: 10G BASE-R PHY IP core and internal GTH transceiver diff --git a/fpga/mqnic/ExaNIC_X25/fpga_10g/README.md b/fpga/mqnic/ExaNIC_X25/fpga_10g/README.md index 4aee74956..752ae9ecc 100644 --- a/fpga/mqnic/ExaNIC_X25/fpga_10g/README.md +++ b/fpga/mqnic/ExaNIC_X25/fpga_10g/README.md @@ -1,8 +1,8 @@ -# Corundum mqnic for ExaNIC X25 +# Corundum mqnic for ExaNIC X25/Cisco Nexus K3P-S ## Introduction -This design targets the Exablaze ExaNIC X25 FPGA board. +This design targets the Exablaze ExaNIC X25/Cisco Nexus K3P-S FPGA board. FPGA: xcku3p-ffvb676-2-e PHY: 10G BASE-R PHY IP core and internal GTY transceiver