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Properly reset everything
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parent
4bee0542b7
commit
4d012b4f52
@ -279,12 +279,18 @@ always @(posedge clk or posedge rst) begin
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output_eth_src_mac_reg <= 0;
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output_eth_type_reg <= 0;
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output_eth_payload_tdata_reg <= 0;
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output_eth_payload_tkeep_reg <= 0;
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output_eth_payload_tvalid_reg <= 0;
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output_eth_payload_tlast_reg <= 0;
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output_eth_payload_tuser_reg <= 0;
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temp_eth_payload_tdata_reg <= 0;
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temp_eth_payload_tkeep_reg <= 0;
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temp_eth_payload_tlast_reg <= 0;
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temp_eth_payload_tuser_reg <= 0;
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save_axis_tdata_reg <= 0;
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save_axis_tkeep_reg <= 0;
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save_axis_tlast_reg <= 0;
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save_axis_tuser_reg <= 0;
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busy_reg <= 0;
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error_header_early_termination_reg <= 0;
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end else begin
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@ -331,12 +331,18 @@ always @(posedge clk or posedge rst) begin
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eth_src_mac_reg <= 0;
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eth_type_reg <= 0;
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output_axis_tdata_reg <= 0;
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output_axis_tkeep_reg <= 0;
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output_axis_tvalid_reg <= 0;
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output_axis_tlast_reg <= 0;
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output_axis_tuser_reg <= 0;
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temp_axis_tdata_reg <= 0;
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temp_axis_tkeep_reg <= 0;
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temp_axis_tlast_reg <= 0;
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temp_axis_tuser_reg <= 0;
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save_eth_payload_tdata_reg <= 0;
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save_eth_payload_tkeep_reg <= 0;
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save_eth_payload_tlast_reg <= 0;
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save_eth_payload_tuser_reg <= 0;
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busy_reg <= 0;
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end else begin
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state_reg <= state_next;
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