diff --git a/rtl/axil_dp_ram.v b/rtl/axil_dp_ram.v
index 9c4b636a1..fcf5a0f85 100644
--- a/rtl/axil_dp_ram.v
+++ b/rtl/axil_dp_ram.v
@@ -288,8 +288,8 @@ always @* begin
     end
 end
 
-always @(posedge a_clk) begin
-    if (a_rst) begin
+always @(posedge b_clk) begin
+    if (b_rst) begin
         last_read_b_reg <= 1'b0;
 
         s_axil_b_awready_reg <= 1'b0;