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fpga/mqnic: Cleanup

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-09-07 18:50:55 -07:00
parent 719231b878
commit 57ffccba15
11 changed files with 39 additions and 7 deletions
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2
fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v
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@ -1583,7 +1583,7 @@ core_inst (
.status_error_uncor(status_error_uncor),
/*
* Ethernet: QSFP18
* Ethernet: QSFP28
*/
.qsfp0_tx_clk_1(qsfp0_tx_clk_1_int),
.qsfp0_tx_rst_1(qsfp0_tx_rst_1_int),

6
fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v
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@ -1940,6 +1940,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_0(qsfp_0_cfg_rx_prbs31_enable_0_int),
.qsfp_0_rx_error_count_0(qsfp_0_rx_error_count_0_int),
.qsfp_0_rx_status_0(qsfp_0_rx_status_0),
.qsfp_0_tx_clk_1(qsfp_0_tx_clk_1_int),
.qsfp_0_tx_rst_1(qsfp_0_tx_rst_1_int),
.qsfp_0_txd_1(qsfp_0_txd_1_int),
@ -1952,6 +1953,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_1(qsfp_0_cfg_rx_prbs31_enable_1_int),
.qsfp_0_rx_error_count_1(qsfp_0_rx_error_count_1_int),
.qsfp_0_rx_status_1(qsfp_0_rx_status_1),
.qsfp_0_tx_clk_2(qsfp_0_tx_clk_2_int),
.qsfp_0_tx_rst_2(qsfp_0_tx_rst_2_int),
.qsfp_0_txd_2(qsfp_0_txd_2_int),
@ -1964,6 +1966,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_2(qsfp_0_cfg_rx_prbs31_enable_2_int),
.qsfp_0_rx_error_count_2(qsfp_0_rx_error_count_2_int),
.qsfp_0_rx_status_2(qsfp_0_rx_status_2),
.qsfp_0_tx_clk_3(qsfp_0_tx_clk_3_int),
.qsfp_0_tx_rst_3(qsfp_0_tx_rst_3_int),
.qsfp_0_txd_3(qsfp_0_txd_3_int),
@ -2001,6 +2004,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_0(qsfp_1_cfg_rx_prbs31_enable_0_int),
.qsfp_1_rx_error_count_0(qsfp_1_rx_error_count_0_int),
.qsfp_1_rx_status_0(qsfp_1_rx_status_0),
.qsfp_1_tx_clk_1(qsfp_1_tx_clk_1_int),
.qsfp_1_tx_rst_1(qsfp_1_tx_rst_1_int),
.qsfp_1_txd_1(qsfp_1_txd_1_int),
@ -2013,6 +2017,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_1(qsfp_1_cfg_rx_prbs31_enable_1_int),
.qsfp_1_rx_error_count_1(qsfp_1_rx_error_count_1_int),
.qsfp_1_rx_status_1(qsfp_1_rx_status_1),
.qsfp_1_tx_clk_2(qsfp_1_tx_clk_2_int),
.qsfp_1_tx_rst_2(qsfp_1_tx_rst_2_int),
.qsfp_1_txd_2(qsfp_1_txd_2_int),
@ -2025,6 +2030,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_2(qsfp_1_cfg_rx_prbs31_enable_2_int),
.qsfp_1_rx_error_count_2(qsfp_1_rx_error_count_2_int),
.qsfp_1_rx_status_2(qsfp_1_rx_status_2),
.qsfp_1_tx_clk_3(qsfp_1_tx_clk_3_int),
.qsfp_1_tx_rst_3(qsfp_1_tx_rst_3_int),
.qsfp_1_txd_3(qsfp_1_txd_3_int),

6
fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v
View File

@ -281,6 +281,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_0,
input wire [6:0] qsfp_0_rx_error_count_0,
input wire qsfp_0_rx_status_0,
input wire qsfp_0_tx_clk_1,
input wire qsfp_0_tx_rst_1,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_1,
@ -293,6 +294,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_1,
input wire [6:0] qsfp_0_rx_error_count_1,
input wire qsfp_0_rx_status_1,
input wire qsfp_0_tx_clk_2,
input wire qsfp_0_tx_rst_2,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_2,
@ -305,6 +307,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_2,
input wire [6:0] qsfp_0_rx_error_count_2,
input wire qsfp_0_rx_status_2,
input wire qsfp_0_tx_clk_3,
input wire qsfp_0_tx_rst_3,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_3,
@ -342,6 +345,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_0,
input wire [6:0] qsfp_1_rx_error_count_0,
input wire qsfp_1_rx_status_0,
input wire qsfp_1_tx_clk_1,
input wire qsfp_1_tx_rst_1,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_1,
@ -354,6 +358,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_1,
input wire [6:0] qsfp_1_rx_error_count_1,
input wire qsfp_1_rx_status_1,
input wire qsfp_1_tx_clk_2,
input wire qsfp_1_tx_rst_2,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_2,
@ -366,6 +371,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_2,
input wire [6:0] qsfp_1_rx_error_count_2,
input wire qsfp_1_rx_status_2,
input wire qsfp_1_tx_clk_3,
input wire qsfp_1_tx_rst_3,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_3,

2
fpga/mqnic/AU250/fpga_25g/rtl/fpga.v
View File

@ -2331,7 +2331,7 @@ core_inst (
.status_error_uncor(status_error_uncor),
/*
* Ethernet: QSFP18
* Ethernet: QSFP28
*/
.qsfp0_tx_clk_1(qsfp0_tx_clk_1_int),
.qsfp0_tx_rst_1(qsfp0_tx_rst_1_int),

2
fpga/mqnic/Nexus_K35_S/fpga/fpga/config.tcl
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@ -110,7 +110,7 @@ dict set params MAX_TX_SIZE "9214"
dict set params MAX_RX_SIZE "9214"
dict set params TX_RAM_SIZE "32768"
dict set params RX_RAM_SIZE "32768"
# Application block configuration
dict set params APP_ID "32'h00000000"
dict set params APP_ENABLE "0"

2
fpga/mqnic/Nexus_K35_S/fpga/fpga_app_dma_bench/config.tcl
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@ -110,7 +110,7 @@ dict set params MAX_TX_SIZE "9214"
dict set params MAX_RX_SIZE "9214"
dict set params TX_RAM_SIZE "32768"
dict set params RX_RAM_SIZE "32768"
# Application block configuration
dict set params APP_ID "32'h12348001"
dict set params APP_ENABLE "1"

2
fpga/mqnic/Nexus_K3P_S/fpga_25g/fpga_10g/config.tcl
View File

@ -122,7 +122,7 @@ dict set params MAX_TX_SIZE "9214"
dict set params MAX_RX_SIZE "9214"
dict set params TX_RAM_SIZE "32768"
dict set params RX_RAM_SIZE "32768"
# Application block configuration
dict set params APP_ID "32'h00000000"
dict set params APP_ENABLE "0"

2
fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v
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@ -2176,7 +2176,7 @@ core_inst (
.status_error_uncor(status_error_uncor),
/*
* Ethernet: QSFP18
* Ethernet: QSFP28
*/
.qsfp0_tx_clk_1(qsfp0_tx_clk_1_int),
.qsfp0_tx_rst_1(qsfp0_tx_rst_1_int),

1
fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v
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@ -199,7 +199,6 @@ module fpga #
inout wire qsfp_0_i2c_scl,
inout wire qsfp_0_i2c_sda,
output wire [3:0] qsfp_1_tx_p,
output wire [3:0] qsfp_1_tx_n,
input wire [3:0] qsfp_1_rx_p,

13
fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v
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@ -2283,6 +2283,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_0(qsfp_0_cfg_rx_prbs31_enable_0_int),
.qsfp_0_rx_error_count_0(qsfp_0_rx_error_count_0_int),
.qsfp_0_rx_status_0(qsfp_0_rx_status_0),
.qsfp_0_tx_clk_1(qsfp_0_tx_clk_1_int),
.qsfp_0_tx_rst_1(qsfp_0_tx_rst_1_int),
.qsfp_0_txd_1(qsfp_0_txd_1_int),
@ -2295,6 +2296,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_1(qsfp_0_cfg_rx_prbs31_enable_1_int),
.qsfp_0_rx_error_count_1(qsfp_0_rx_error_count_1_int),
.qsfp_0_rx_status_1(qsfp_0_rx_status_1),
.qsfp_0_tx_clk_2(qsfp_0_tx_clk_2_int),
.qsfp_0_tx_rst_2(qsfp_0_tx_rst_2_int),
.qsfp_0_txd_2(qsfp_0_txd_2_int),
@ -2307,6 +2309,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_2(qsfp_0_cfg_rx_prbs31_enable_2_int),
.qsfp_0_rx_error_count_2(qsfp_0_rx_error_count_2_int),
.qsfp_0_rx_status_2(qsfp_0_rx_status_2),
.qsfp_0_tx_clk_3(qsfp_0_tx_clk_3_int),
.qsfp_0_tx_rst_3(qsfp_0_tx_rst_3_int),
.qsfp_0_txd_3(qsfp_0_txd_3_int),
@ -2319,6 +2322,7 @@ core_inst (
.qsfp_0_cfg_rx_prbs31_enable_3(qsfp_0_cfg_rx_prbs31_enable_3_int),
.qsfp_0_rx_error_count_3(qsfp_0_rx_error_count_3_int),
.qsfp_0_rx_status_3(qsfp_0_rx_status_3),
.qsfp_0_drp_clk(qsfp_0_drp_clk),
.qsfp_0_drp_rst(qsfp_0_drp_rst),
.qsfp_0_drp_addr(qsfp_0_drp_addr),
@ -2327,16 +2331,19 @@ core_inst (
.qsfp_0_drp_we(qsfp_0_drp_we),
.qsfp_0_drp_do(qsfp_0_drp_do),
.qsfp_0_drp_rdy(qsfp_0_drp_rdy),
.qsfp_0_mod_prsnt_n(qsfp_0_mod_prsnt_n_int),
.qsfp_0_reset_n(qsfp_0_reset_n),
.qsfp_0_lp_mode(qsfp_0_lp_mode),
.qsfp_0_intr_n(qsfp_0_intr_n_int),
.qsfp_0_i2c_scl_i(qsfp_0_i2c_scl_i),
.qsfp_0_i2c_scl_o(qsfp_0_i2c_scl_o),
.qsfp_0_i2c_scl_t(qsfp_0_i2c_scl_t),
.qsfp_0_i2c_sda_i(qsfp_0_i2c_sda_i),
.qsfp_0_i2c_sda_o(qsfp_0_i2c_sda_o),
.qsfp_0_i2c_sda_t(qsfp_0_i2c_sda_t),
.qsfp_1_tx_clk_0(qsfp_1_tx_clk_0_int),
.qsfp_1_tx_rst_0(qsfp_1_tx_rst_0_int),
.qsfp_1_txd_0(qsfp_1_txd_0_int),
@ -2349,6 +2356,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_0(qsfp_1_cfg_rx_prbs31_enable_0_int),
.qsfp_1_rx_error_count_0(qsfp_1_rx_error_count_0_int),
.qsfp_1_rx_status_0(qsfp_1_rx_status_0),
.qsfp_1_tx_clk_1(qsfp_1_tx_clk_1_int),
.qsfp_1_tx_rst_1(qsfp_1_tx_rst_1_int),
.qsfp_1_txd_1(qsfp_1_txd_1_int),
@ -2361,6 +2369,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_1(qsfp_1_cfg_rx_prbs31_enable_1_int),
.qsfp_1_rx_error_count_1(qsfp_1_rx_error_count_1_int),
.qsfp_1_rx_status_1(qsfp_1_rx_status_1),
.qsfp_1_tx_clk_2(qsfp_1_tx_clk_2_int),
.qsfp_1_tx_rst_2(qsfp_1_tx_rst_2_int),
.qsfp_1_txd_2(qsfp_1_txd_2_int),
@ -2373,6 +2382,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_2(qsfp_1_cfg_rx_prbs31_enable_2_int),
.qsfp_1_rx_error_count_2(qsfp_1_rx_error_count_2_int),
.qsfp_1_rx_status_2(qsfp_1_rx_status_2),
.qsfp_1_tx_clk_3(qsfp_1_tx_clk_3_int),
.qsfp_1_tx_rst_3(qsfp_1_tx_rst_3_int),
.qsfp_1_txd_3(qsfp_1_txd_3_int),
@ -2385,6 +2395,7 @@ core_inst (
.qsfp_1_cfg_rx_prbs31_enable_3(qsfp_1_cfg_rx_prbs31_enable_3_int),
.qsfp_1_rx_error_count_3(qsfp_1_rx_error_count_3_int),
.qsfp_1_rx_status_3(qsfp_1_rx_status_3),
.qsfp_1_drp_clk(qsfp_1_drp_clk),
.qsfp_1_drp_rst(qsfp_1_drp_rst),
.qsfp_1_drp_addr(qsfp_1_drp_addr),
@ -2393,10 +2404,12 @@ core_inst (
.qsfp_1_drp_we(qsfp_1_drp_we),
.qsfp_1_drp_do(qsfp_1_drp_do),
.qsfp_1_drp_rdy(qsfp_1_drp_rdy),
.qsfp_1_mod_prsnt_n(qsfp_1_mod_prsnt_n_int),
.qsfp_1_reset_n(qsfp_1_reset_n),
.qsfp_1_lp_mode(qsfp_1_lp_mode),
.qsfp_1_intr_n(qsfp_1_intr_n_int),
.qsfp_1_i2c_scl_i(qsfp_1_i2c_scl_i),
.qsfp_1_i2c_scl_o(qsfp_1_i2c_scl_o),
.qsfp_1_i2c_scl_t(qsfp_1_i2c_scl_t),

8
fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v
View File

@ -294,6 +294,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_0,
input wire [6:0] qsfp_0_rx_error_count_0,
input wire qsfp_0_rx_status_0,
input wire qsfp_0_tx_clk_1,
input wire qsfp_0_tx_rst_1,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_1,
@ -306,6 +307,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_1,
input wire [6:0] qsfp_0_rx_error_count_1,
input wire qsfp_0_rx_status_1,
input wire qsfp_0_tx_clk_2,
input wire qsfp_0_tx_rst_2,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_2,
@ -318,6 +320,7 @@ module fpga_core #
output wire qsfp_0_cfg_rx_prbs31_enable_2,
input wire [6:0] qsfp_0_rx_error_count_2,
input wire qsfp_0_rx_status_2,
input wire qsfp_0_tx_clk_3,
input wire qsfp_0_tx_rst_3,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_0_txd_3,
@ -344,6 +347,7 @@ module fpga_core #
output wire qsfp_0_reset_n,
output wire qsfp_0_lp_mode,
input wire qsfp_0_intr_n,
input wire qsfp_0_i2c_scl_i,
output wire qsfp_0_i2c_scl_o,
output wire qsfp_0_i2c_scl_t,
@ -363,6 +367,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_0,
input wire [6:0] qsfp_1_rx_error_count_0,
input wire qsfp_1_rx_status_0,
input wire qsfp_1_tx_clk_1,
input wire qsfp_1_tx_rst_1,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_1,
@ -375,6 +380,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_1,
input wire [6:0] qsfp_1_rx_error_count_1,
input wire qsfp_1_rx_status_1,
input wire qsfp_1_tx_clk_2,
input wire qsfp_1_tx_rst_2,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_2,
@ -387,6 +393,7 @@ module fpga_core #
output wire qsfp_1_cfg_rx_prbs31_enable_2,
input wire [6:0] qsfp_1_rx_error_count_2,
input wire qsfp_1_rx_status_2,
input wire qsfp_1_tx_clk_3,
input wire qsfp_1_tx_rst_3,
output wire [XGMII_DATA_WIDTH-1:0] qsfp_1_txd_3,
@ -413,6 +420,7 @@ module fpga_core #
output wire qsfp_1_reset_n,
output wire qsfp_1_lp_mode,
input wire qsfp_1_intr_n,
input wire qsfp_1_i2c_scl_i,
output wire qsfp_1_i2c_scl_o,
output wire qsfp_1_i2c_scl_t,