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https://github.com/corundum/corundum.git
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Pull I2C driver code into separate module
This commit is contained in:
Alex Forencich
parent
3e0c23f24f
commit
59606f2cbf
@ -1,7 +1,7 @@
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# object files to build
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# object files to build
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obj-m += mqnic.o
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obj-m += mqnic.o
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mqnic-objs += mqnic_main.o mqnic_dev.o mqnic_netdev.o mqnic_ethtool.o mqnic_ptp.o mqnic_tx.o mqnic_rx.o mqnic_cq.o mqnic_eq.o
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mqnic-objs += mqnic_main.o mqnic_dev.o mqnic_netdev.o mqnic_ethtool.o mqnic_i2c.o mqnic_ptp.o mqnic_tx.o mqnic_rx.o mqnic_cq.o mqnic_eq.o
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all:
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all:
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make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
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make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
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@ -263,6 +263,10 @@ void mqnic_register_phc(struct mqnic_dev *mdev);
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void mqnic_unregister_phc(struct mqnic_dev *mdev);
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void mqnic_unregister_phc(struct mqnic_dev *mdev);
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ktime_t mqnic_read_cpl_ts(struct mqnic_dev *mdev, struct mqnic_ring *ring, const struct mqnic_cpl *cpl);
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ktime_t mqnic_read_cpl_ts(struct mqnic_dev *mdev, struct mqnic_ring *ring, const struct mqnic_cpl *cpl);
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// mqnic_i2c.c
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int mqnic_init_i2c(struct mqnic_dev *mqnic);
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void mqnic_remove_i2c(struct mqnic_dev *mqnic);
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// mqnic_eq.c
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// mqnic_eq.c
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int mqnic_create_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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int mqnic_create_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr, int size, int stride, int index, u8 __iomem *hw_addr);
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void mqnic_destroy_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr);
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void mqnic_destroy_eq_ring(struct mqnic_priv *priv, struct mqnic_eq_ring **ring_ptr);
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151
modules/mqnic/mqnic_i2c.c
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151
modules/mqnic/mqnic_i2c.c
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@ -0,0 +1,151 @@
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/*
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Copyright 2019, The Regents of the University of California.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE REGENTS OF THE UNIVERSITY OF CALIFORNIA ''AS
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IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE REGENTS OF THE UNIVERSITY OF CALIFORNIA OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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The views and conclusions contained in the software and documentation are those
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of the authors and should not be interpreted as representing official policies,
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either expressed or implied, of The Regents of the University of California.
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*/
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#include "mqnic.h"
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void mqnic_i2c_set_scl(void *data, int state)
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{
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struct mqnic_i2c_priv *priv = data;
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if (state)
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{
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iowrite32(ioread32(priv->scl_out_reg) | priv->scl_out_mask, priv->scl_out_reg);
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}
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else
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{
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iowrite32(ioread32(priv->scl_out_reg) & ~priv->scl_out_mask, priv->scl_out_reg);
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}
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}
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void mqnic_i2c_set_sda(void *data, int state)
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{
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struct mqnic_i2c_priv *priv = data;
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if (state)
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{
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iowrite32(ioread32(priv->sda_out_reg) | priv->sda_out_mask, priv->sda_out_reg);
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}
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else
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{
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iowrite32(ioread32(priv->sda_out_reg) & ~priv->sda_out_mask, priv->sda_out_reg);
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}
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}
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int mqnic_i2c_get_scl(void *data)
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{
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struct mqnic_i2c_priv *priv = data;
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return !!(ioread32(priv->scl_in_reg) & priv->scl_in_mask);
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}
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int mqnic_i2c_get_sda(void *data)
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{
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struct mqnic_i2c_priv *priv = data;
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return !!(ioread32(priv->sda_in_reg) & priv->sda_in_mask);
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}
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static const struct i2c_algo_bit_data mqnic_i2c_algo = {
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.setsda = mqnic_i2c_set_sda,
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.setscl = mqnic_i2c_set_scl,
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.getsda = mqnic_i2c_get_sda,
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.getscl = mqnic_i2c_get_scl,
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.udelay = 5,
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.timeout = 20
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};
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static struct i2c_board_info mqnic_eeprom_info = {
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I2C_BOARD_INFO("24c02", 0x50),
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};
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int mqnic_init_i2c(struct mqnic_dev *mqnic)
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{
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int ret = 0;
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// interface i2c interfaces
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// TODO
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// eeprom i2c interface
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switch (mqnic->board_id) {
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case MQNIC_BOARD_ID_EXANIC_X10:
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case MQNIC_BOARD_ID_ADM_PCIE_9V3:
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mqnic->eeprom_i2c_adap.owner = THIS_MODULE;
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mqnic->eeprom_i2c_priv.mqnic = mqnic;
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mqnic->eeprom_i2c_priv.scl_in_reg = mqnic->hw_addr+MQNIC_REG_GPIO_IN;
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mqnic->eeprom_i2c_priv.scl_out_reg = mqnic->hw_addr+MQNIC_REG_GPIO_OUT;
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mqnic->eeprom_i2c_priv.sda_in_reg = mqnic->hw_addr+MQNIC_REG_GPIO_IN;
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mqnic->eeprom_i2c_priv.sda_out_reg = mqnic->hw_addr+MQNIC_REG_GPIO_OUT;
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mqnic->eeprom_i2c_priv.scl_in_mask = 1 << 24;
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mqnic->eeprom_i2c_priv.scl_out_mask = 1 << 24;
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mqnic->eeprom_i2c_priv.sda_in_mask = 1 << 25;
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mqnic->eeprom_i2c_priv.sda_out_mask = 1 << 25;
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mqnic->eeprom_i2c_algo = mqnic_i2c_algo;
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mqnic->eeprom_i2c_algo.data = &mqnic->eeprom_i2c_priv;
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mqnic->eeprom_i2c_adap.algo_data = &mqnic->eeprom_i2c_algo;
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mqnic->eeprom_i2c_adap.dev.parent = &mqnic->pdev->dev;
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iowrite32(ioread32(mqnic->hw_addr+MQNIC_REG_GPIO_OUT) & ~(1 << 26), mqnic->hw_addr+MQNIC_REG_GPIO_OUT); // WP disable
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strlcpy(mqnic->eeprom_i2c_adap.name, "mqnic EEPROM", sizeof(mqnic->eeprom_i2c_adap.name));
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ret = i2c_bit_add_bus(&mqnic->eeprom_i2c_adap);
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if (ret)
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{
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return ret;
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}
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mqnic->eeprom_i2c_client = i2c_new_device(&mqnic->eeprom_i2c_adap, &mqnic_eeprom_info);
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if (mqnic->eeprom_i2c_client == NULL)
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{
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ret = -ENODEV;
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}
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break;
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}
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return ret;
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}
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void mqnic_remove_i2c(struct mqnic_dev *mqnic)
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{
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// eeprom i2c interface
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if (mqnic->eeprom_i2c_client)
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{
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i2c_unregister_device(mqnic->eeprom_i2c_client);
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mqnic->eeprom_i2c_client = NULL;
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}
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if (mqnic->eeprom_i2c_adap.owner)
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{
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i2c_del_adapter(&mqnic->eeprom_i2c_adap);
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}
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memset(&mqnic->eeprom_i2c_adap, 0, sizeof(mqnic->eeprom_i2c_adap));
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}
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@ -50,118 +50,6 @@ static const struct pci_device_id pci_ids[] = {
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MODULE_DEVICE_TABLE(pci, pci_ids);
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MODULE_DEVICE_TABLE(pci, pci_ids);
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void mqnic_i2c_set_scl(void *data, int state)
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{
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struct mqnic_i2c_priv *priv = data;
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if (state)
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{
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iowrite32(ioread32(priv->scl_out_reg) | priv->scl_out_mask, priv->scl_out_reg);
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}
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else
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{
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iowrite32(ioread32(priv->scl_out_reg) & ~priv->scl_out_mask, priv->scl_out_reg);
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}
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ioread32(priv->scl_out_reg);
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}
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void mqnic_i2c_set_sda(void *data, int state)
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{
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struct mqnic_i2c_priv *priv = data;
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if (state)
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{
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iowrite32(ioread32(priv->sda_out_reg) | priv->sda_out_mask, priv->sda_out_reg);
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}
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else
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{
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iowrite32(ioread32(priv->sda_out_reg) & ~priv->sda_out_mask, priv->sda_out_reg);
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}
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ioread32(priv->sda_out_reg);
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}
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int mqnic_i2c_get_scl(void *data)
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{
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struct mqnic_i2c_priv *priv = data;
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return !!(ioread32(priv->scl_in_reg) & priv->scl_in_mask);
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}
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int mqnic_i2c_get_sda(void *data)
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{
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struct mqnic_i2c_priv *priv = data;
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return !!(ioread32(priv->sda_in_reg) & priv->sda_in_mask);
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}
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static const struct i2c_algo_bit_data mqnic_i2c_algo = {
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.setsda = mqnic_i2c_set_sda,
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.setscl = mqnic_i2c_set_scl,
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.getsda = mqnic_i2c_get_sda,
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.getscl = mqnic_i2c_get_scl,
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.udelay = 5,
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.timeout = 20
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};
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static struct i2c_board_info mqnic_eeprom_info = {
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I2C_BOARD_INFO("24c02", 0x50),
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};
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static int mqnic_init_i2c(struct mqnic_dev *mqnic)
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{
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int ret = 0;
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// interface i2c interfaces
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// TODO
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// eeprom i2c interface
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mqnic->eeprom_i2c_adap.owner = THIS_MODULE;
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mqnic->eeprom_i2c_priv.mqnic = mqnic;
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mqnic->eeprom_i2c_priv.scl_in_reg = mqnic->hw_addr+MQNIC_REG_GPIO_IN;
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mqnic->eeprom_i2c_priv.scl_out_reg = mqnic->hw_addr+MQNIC_REG_GPIO_OUT;
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mqnic->eeprom_i2c_priv.sda_in_reg = mqnic->hw_addr+MQNIC_REG_GPIO_IN;
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mqnic->eeprom_i2c_priv.sda_out_reg = mqnic->hw_addr+MQNIC_REG_GPIO_OUT;
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mqnic->eeprom_i2c_priv.scl_in_mask = 1 << 24;
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mqnic->eeprom_i2c_priv.scl_out_mask = 1 << 24;
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mqnic->eeprom_i2c_priv.sda_in_mask = 1 << 25;
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mqnic->eeprom_i2c_priv.sda_out_mask = 1 << 25;
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mqnic->eeprom_i2c_algo = mqnic_i2c_algo;
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mqnic->eeprom_i2c_algo.data = &mqnic->eeprom_i2c_priv;
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mqnic->eeprom_i2c_adap.algo_data = &mqnic->eeprom_i2c_algo;
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mqnic->eeprom_i2c_adap.dev.parent = &mqnic->pdev->dev;
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iowrite32(ioread32(mqnic->hw_addr+MQNIC_REG_GPIO_OUT) & ~(1 << 26), mqnic->hw_addr+MQNIC_REG_GPIO_OUT); // WP disable
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strlcpy(mqnic->eeprom_i2c_adap.name, "mqnic EEPROM", sizeof(mqnic->eeprom_i2c_adap.name));
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ret = i2c_bit_add_bus(&mqnic->eeprom_i2c_adap);
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if (ret)
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{
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return ret;
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}
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mqnic->eeprom_i2c_client = i2c_new_device(&mqnic->eeprom_i2c_adap, &mqnic_eeprom_info);
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if (mqnic->eeprom_i2c_client == NULL)
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{
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ret = -ENODEV;
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}
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return ret;
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}
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static void mqnic_remove_i2c(struct mqnic_dev *mqnic)
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{
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// eeprom i2c interface
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if (mqnic->eeprom_i2c_client)
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{
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i2c_unregister_device(mqnic->eeprom_i2c_client);
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mqnic->eeprom_i2c_client = NULL;
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}
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if (mqnic->eeprom_i2c_adap.owner)
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{
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i2c_del_adapter(&mqnic->eeprom_i2c_adap);
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}
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memset(&mqnic->eeprom_i2c_adap, 0, sizeof(mqnic->eeprom_i2c_adap));
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}
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static LIST_HEAD(mqnic_devices);
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static LIST_HEAD(mqnic_devices);
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static DEFINE_SPINLOCK(mqnic_devices_lock);
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static DEFINE_SPINLOCK(mqnic_devices_lock);
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