From 5f9e33e8ab344ee3b9152d051d5246c77db9a979 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Tue, 6 Dec 2022 15:23:23 -0800 Subject: [PATCH] fpga/mqnic: Enable overtemp shutdown on all boards Signed-off-by: Alex Forencich --- fpga/mqnic/AU200/fpga_100g/fpga.xdc | 1 + fpga/mqnic/AU200/fpga_25g/fpga.xdc | 1 + fpga/mqnic/AU250/fpga_100g/fpga.xdc | 1 + fpga/mqnic/AU250/fpga_25g/fpga.xdc | 1 + fpga/mqnic/AU280/fpga_100g/fpga.xdc | 1 + fpga/mqnic/AU280/fpga_25g/fpga.xdc | 1 + fpga/mqnic/AU50/fpga_100g/fpga.xdc | 1 + fpga/mqnic/AU50/fpga_25g/fpga.xdc | 1 + fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc | 15 ++++++++------- fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc | 15 ++++++++------- fpga/mqnic/VCU108/fpga_25g/fpga.xdc | 1 + fpga/mqnic/VCU118/fpga_100g/fpga.xdc | 1 + fpga/mqnic/VCU118/fpga_25g/fpga.xdc | 1 + fpga/mqnic/VCU1525/fpga_100g/fpga.xdc | 1 + fpga/mqnic/VCU1525/fpga_25g/fpga.xdc | 1 + fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc | 1 + fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc | 1 + 17 files changed, 31 insertions(+), 14 deletions(-) diff --git a/fpga/mqnic/AU200/fpga_100g/fpga.xdc b/fpga/mqnic/AU200/fpga_100g/fpga.xdc index 3b7a4df83..ac8cb13aa 100644 --- a/fpga/mqnic/AU200/fpga_100g/fpga.xdc +++ b/fpga/mqnic/AU200/fpga_100g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU200/fpga_25g/fpga.xdc b/fpga/mqnic/AU200/fpga_25g/fpga.xdc index 3b7a4df83..ac8cb13aa 100644 --- a/fpga/mqnic/AU200/fpga_25g/fpga.xdc +++ b/fpga/mqnic/AU200/fpga_25g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU250/fpga_100g/fpga.xdc b/fpga/mqnic/AU250/fpga_100g/fpga.xdc index ac4d3ca3f..81f04fde6 100644 --- a/fpga/mqnic/AU250/fpga_100g/fpga.xdc +++ b/fpga/mqnic/AU250/fpga_100g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU250/fpga_25g/fpga.xdc b/fpga/mqnic/AU250/fpga_25g/fpga.xdc index ac4d3ca3f..81f04fde6 100644 --- a/fpga/mqnic/AU250/fpga_25g/fpga.xdc +++ b/fpga/mqnic/AU250/fpga_25g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU280/fpga_100g/fpga.xdc b/fpga/mqnic/AU280/fpga_100g/fpga.xdc index ae028af3a..1d3a93e2d 100644 --- a/fpga/mqnic/AU280/fpga_100g/fpga.xdc +++ b/fpga/mqnic/AU280/fpga_100g/fpga.xdc @@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU280/fpga_25g/fpga.xdc b/fpga/mqnic/AU280/fpga_25g/fpga.xdc index ae028af3a..1d3a93e2d 100644 --- a/fpga/mqnic/AU280/fpga_25g/fpga.xdc +++ b/fpga/mqnic/AU280/fpga_25g/fpga.xdc @@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 160 diff --git a/fpga/mqnic/AU50/fpga_100g/fpga.xdc b/fpga/mqnic/AU50/fpga_100g/fpga.xdc index 758a7360d..c5f420de3 100644 --- a/fpga/mqnic/AU50/fpga_100g/fpga.xdc +++ b/fpga/mqnic/AU50/fpga_100g/fpga.xdc @@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 63 diff --git a/fpga/mqnic/AU50/fpga_25g/fpga.xdc b/fpga/mqnic/AU50/fpga_25g/fpga.xdc index 758a7360d..c5f420de3 100644 --- a/fpga/mqnic/AU50/fpga_25g/fpga.xdc +++ b/fpga/mqnic/AU50/fpga_25g/fpga.xdc @@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] set_operating_conditions -design_power_budget 63 diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc index 8745736d9..314cfe702 100644 --- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc +++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc @@ -2,13 +2,14 @@ # part: xcku040-ffva1156-2-e # General configuration -set_property CFGBVS GND [current_design] -set_property CONFIG_VOLTAGE 1.8 [current_design] -set_property BITSTREAM.GENERAL.COMPRESS true [current_design] -set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design] -set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] -set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design] -set_property CONFIG_MODE BPI16 [current_design] +set_property CFGBVS GND [current_design] +set_property CONFIG_VOLTAGE 1.8 [current_design] +set_property BITSTREAM.GENERAL.COMPRESS true [current_design] +set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design] +set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] +set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design] +set_property CONFIG_MODE BPI16 [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # LEDs set_property -dict {LOC H22 IOSTANDARD LVCMOS12 SLEW SLOW DRIVE 8} [get_ports {user_led[0]}] diff --git a/fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc b/fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc index 75ce3104d..1eda3036b 100644 --- a/fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc +++ b/fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc @@ -2,13 +2,14 @@ # part: xcku035-fbva676-2-e # General configuration -set_property CFGBVS GND [current_design] -set_property CONFIG_VOLTAGE 1.8 [current_design] -set_property BITSTREAM.GENERAL.COMPRESS true [current_design] -set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design] -set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] -set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design] -set_property CONFIG_MODE BPI16 [current_design] +set_property CFGBVS GND [current_design] +set_property CONFIG_VOLTAGE 1.8 [current_design] +set_property BITSTREAM.GENERAL.COMPRESS true [current_design] +set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design] +set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] +set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design] +set_property CONFIG_MODE BPI16 [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # 100 MHz system clock set_property -dict {LOC D18 IOSTANDARD LVDS} [get_ports clk_100mhz_p] diff --git a/fpga/mqnic/VCU108/fpga_25g/fpga.xdc b/fpga/mqnic/VCU108/fpga_25g/fpga.xdc index cb03c292a..ed3768ece 100644 --- a/fpga/mqnic/VCU108/fpga_25g/fpga.xdc +++ b/fpga/mqnic/VCU108/fpga_25g/fpga.xdc @@ -8,6 +8,7 @@ set_property BITSTREAM.GENERAL.COMPRESS true [current_design] set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design] set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type1 [current_design] set_property CONFIG_MODE BPI16 [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 300 MHz diff --git a/fpga/mqnic/VCU118/fpga_100g/fpga.xdc b/fpga/mqnic/VCU118/fpga_100g/fpga.xdc index 1178e3b33..4dffb2768 100644 --- a/fpga/mqnic/VCU118/fpga_100g/fpga.xdc +++ b/fpga/mqnic/VCU118/fpga_100g/fpga.xdc @@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 300 MHz diff --git a/fpga/mqnic/VCU118/fpga_25g/fpga.xdc b/fpga/mqnic/VCU118/fpga_25g/fpga.xdc index 1178e3b33..4dffb2768 100644 --- a/fpga/mqnic/VCU118/fpga_25g/fpga.xdc +++ b/fpga/mqnic/VCU118/fpga_25g/fpga.xdc @@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 300 MHz diff --git a/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc b/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc index 9dec0b9c5..9fc5e3c12 100644 --- a/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc +++ b/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 300 MHz (DDR 0) diff --git a/fpga/mqnic/VCU1525/fpga_25g/fpga.xdc b/fpga/mqnic/VCU1525/fpga_25g/fpga.xdc index 9dec0b9c5..9fc5e3c12 100644 --- a/fpga/mqnic/VCU1525/fpga_25g/fpga.xdc +++ b/fpga/mqnic/VCU1525/fpga_25g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 300 MHz (DDR 0) diff --git a/fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc b/fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc index b03372f7f..d4a699a77 100644 --- a/fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc +++ b/fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 48 MHz system clock diff --git a/fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc b/fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc index b03372f7f..d4a699a77 100644 --- a/fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc +++ b/fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc @@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] +set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design] # System clocks # 48 MHz system clock