fpga/mqnic: Enable overtemp shutdown on all boards

Signed-off-by: Alex Forencich <alex@alexforencich.com>

fpga/mqnic/AU200/fpga_100g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU200/fpga_25g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU250/fpga_100g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU250/fpga_25g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU280/fpga_100g/fpga.xdc

@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU280/fpga_25g/fpga.xdc

@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 160
 

fpga/mqnic/AU50/fpga_100g/fpga.xdc

@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 63
 

fpga/mqnic/AU50/fpga_25g/fpga.xdc

@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 set_operating_conditions -design_power_budget 63
 

fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga.xdc

@@ -2,13 +2,14 @@
 # part: xcku040-ffva1156-2-e
 
 # General configuration
-set_property CFGBVS GND                           [current_design]
-set_property CONFIG_VOLTAGE 1.8                   [current_design]
-set_property BITSTREAM.GENERAL.COMPRESS true      [current_design]
-set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup    [current_design]
-set_property BITSTREAM.CONFIG.CONFIGRATE 50       [current_design]
-set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design]
-set_property CONFIG_MODE BPI16                    [current_design]
+set_property CFGBVS GND                                [current_design]
+set_property CONFIG_VOLTAGE 1.8                        [current_design]
+set_property BITSTREAM.GENERAL.COMPRESS true           [current_design]
+set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup         [current_design]
+set_property BITSTREAM.CONFIG.CONFIGRATE 50            [current_design]
+set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2      [current_design]
+set_property CONFIG_MODE BPI16                         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # LEDs
 set_property -dict {LOC H22  IOSTANDARD LVCMOS12 SLEW SLOW DRIVE 8} [get_ports {user_led[0]}]

fpga/mqnic/Nexus_K35_S/fpga/fpga.xdc

@@ -2,13 +2,14 @@
 # part: xcku035-fbva676-2-e
 
 # General configuration
-set_property CFGBVS GND                           [current_design]
-set_property CONFIG_VOLTAGE 1.8                   [current_design]
-set_property BITSTREAM.GENERAL.COMPRESS true      [current_design]
-set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup    [current_design]
-set_property BITSTREAM.CONFIG.CONFIGRATE 50       [current_design]
-set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design]
-set_property CONFIG_MODE BPI16                    [current_design]
+set_property CFGBVS GND                                [current_design]
+set_property CONFIG_VOLTAGE 1.8                        [current_design]
+set_property BITSTREAM.GENERAL.COMPRESS true           [current_design]
+set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup         [current_design]
+set_property BITSTREAM.CONFIG.CONFIGRATE 50            [current_design]
+set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2      [current_design]
+set_property CONFIG_MODE BPI16                         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # 100 MHz system clock
 set_property -dict {LOC D18  IOSTANDARD LVDS} [get_ports clk_100mhz_p]

fpga/mqnic/VCU108/fpga_25g/fpga.xdc

@@ -8,6 +8,7 @@ set_property BITSTREAM.GENERAL.COMPRESS true           [current_design]
 set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
 set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type1      [current_design]
 set_property CONFIG_MODE BPI16                         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 300 MHz

fpga/mqnic/VCU118/fpga_100g/fpga.xdc

@@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 300 MHz

fpga/mqnic/VCU118/fpga_25g/fpga.xdc

@@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
 set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 300 MHz

fpga/mqnic/VCU1525/fpga_100g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 300 MHz (DDR 0)

fpga/mqnic/VCU1525/fpga_25g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 300 MHz (DDR 0)

fpga/mqnic/XUPP3R/fpga_100g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 48 MHz system clock

fpga/mqnic/XUPP3R/fpga_25g/fpga.xdc

@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES       [current_design]
 set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4           [current_design]
 set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES        [current_design]
 set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP         [current_design]
+set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable  [current_design]
 
 # System clocks
 # 48 MHz system clock