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Fix pcie_us_axi_dma_wr testbench file list

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This commit is contained in:
Alex Forencich 2021-02-28 19:50:45 -08:00
parent 5715e12d41
commit 670dfa0d11
1 changed files with 0 additions and 2 deletions
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2
tb/pcie_us_axi_dma_wr/test_pcie_us_axi_dma_wr.py
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@ -216,8 +216,6 @@ def test_pcie_us_axi_dma_wr(request, axis_pcie_data_width, pcie_offset):
verilog_sources = [
os.path.join(rtl_dir, f"{dut}.v"),
os.path.join(rtl_dir, "pcie_tag_manager.v"),
os.path.join(rtl_dir, "priority_encoder.v"),
]
parameters = {}