From 6a354e7aa357dc9226087b37c0602421f6b04502 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 22 Aug 2019 19:03:19 -0700 Subject: [PATCH] Normalize descriptor table sizes --- fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v | 4 ++-- fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v | 4 ++-- fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v | 4 ++-- fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v index 4b6a38fed..e3869b831 100644 --- a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v @@ -236,9 +236,9 @@ parameter TX_CPL_QUEUE_INDEX_WIDTH = 6; parameter RX_CPL_QUEUE_INDEX_WIDTH = 6; // TX and RX engine parameters (port) -parameter TX_DESC_TABLE_SIZE = 16; +parameter TX_DESC_TABLE_SIZE = 32; parameter TX_PKT_TABLE_SIZE = 8; -parameter RX_DESC_TABLE_SIZE = 16; +parameter RX_DESC_TABLE_SIZE = 32; parameter RX_PKT_TABLE_SIZE = 8; // Scheduler parameters (port) diff --git a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v index 3abdf4f08..5af54a725 100644 --- a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v +++ b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v @@ -262,9 +262,9 @@ parameter TX_CPL_QUEUE_INDEX_WIDTH = 6; parameter RX_CPL_QUEUE_INDEX_WIDTH = 6; // TX and RX engine parameters (port) -parameter TX_DESC_TABLE_SIZE = 16; +parameter TX_DESC_TABLE_SIZE = 32; parameter TX_PKT_TABLE_SIZE = 8; -parameter RX_DESC_TABLE_SIZE = 16; +parameter RX_DESC_TABLE_SIZE = 32; parameter RX_PKT_TABLE_SIZE = 8; // Scheduler parameters (port) diff --git a/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v b/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v index e52f88ed3..cedfadc16 100644 --- a/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v +++ b/fpga/mqnic_tdma/ExaNIC_X10/fpga/rtl/fpga_core.v @@ -236,9 +236,9 @@ parameter TX_CPL_QUEUE_INDEX_WIDTH = 6; parameter RX_CPL_QUEUE_INDEX_WIDTH = 6; // TX and RX engine parameters (port) -parameter TX_DESC_TABLE_SIZE = 16; +parameter TX_DESC_TABLE_SIZE = 32; parameter TX_PKT_TABLE_SIZE = 8; -parameter RX_DESC_TABLE_SIZE = 16; +parameter RX_DESC_TABLE_SIZE = 32; parameter RX_PKT_TABLE_SIZE = 8; // Scheduler parameters (port) diff --git a/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v b/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v index 947c25c58..b32d042ca 100644 --- a/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v +++ b/fpga/mqnic_tdma/VCU108/fpga_10g/rtl/fpga_core.v @@ -262,9 +262,9 @@ parameter TX_CPL_QUEUE_INDEX_WIDTH = 6; parameter RX_CPL_QUEUE_INDEX_WIDTH = 6; // TX and RX engine parameters (port) -parameter TX_DESC_TABLE_SIZE = 16; +parameter TX_DESC_TABLE_SIZE = 32; parameter TX_PKT_TABLE_SIZE = 8; -parameter RX_DESC_TABLE_SIZE = 16; +parameter RX_DESC_TABLE_SIZE = 32; parameter RX_PKT_TABLE_SIZE = 8; // Scheduler parameters (port)