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Rework RX request generation

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-07-09 14:43:39 -07:00
parent 33b798540e
commit 6b0df7f33f
1 changed files with 5 additions and 2 deletions
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7
fpga/common/rtl/mqnic_interface_rx.v
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@ -308,15 +308,18 @@ always @(posedge clk) begin
rx_req_cnt_reg <= rx_req_cnt_reg - 1;
end
if (s_axis_rx_tready && s_axis_rx_tvalid) begin
if (s_axis_rx_tvalid) begin
if (!rx_frame_reg) begin
if (rx_req_valid && rx_req_ready) begin
rx_req_cnt_reg <= rx_req_cnt_reg;
end else begin
rx_req_cnt_reg <= rx_req_cnt_reg + 1;
end
rx_frame_reg <= 1'b1;
end
if (s_axis_rx_tready && s_axis_rx_tvalid && s_axis_rx_tlast) begin
rx_frame_reg <= 1'b0;
end
rx_frame_reg <= !s_axis_rx_tlast;
end
if (rst) begin