From 713b138ecefd28466fd16b96370f65640b4081e7 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 1 Jan 2023 21:44:15 -0800 Subject: [PATCH] Fix timing of IDDR2 on Spartan 6 Signed-off-by: Alex Forencich --- rtl/iddr.v | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/rtl/iddr.v b/rtl/iddr.v index d11f51601..bf4de3422 100644 --- a/rtl/iddr.v +++ b/rtl/iddr.v @@ -86,11 +86,14 @@ if (TARGET == "XILINX") begin .S(1'b0) ); end else if (IODDR_STYLE == "IODDR2") begin + wire q1_int; + reg q1_delay; + IDDR2 #( .DDR_ALIGNMENT("C0") ) iddr_inst ( - .Q0(q1[n]), + .Q0(q1_int), .Q1(q2[n]), .C0(clk), .C1(~clk), @@ -99,6 +102,12 @@ if (TARGET == "XILINX") begin .R(1'b0), .S(1'b0) ); + + always @(posedge clk) begin + q1_delay <= q1_int; + end + + assign q1[n] = q1_delay; end end end else if (TARGET == "ALTERA") begin