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Fix timing of IDDR2 on Spartan 6

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-01-01 21:44:15 -08:00
parent a77c671920
commit 713b138ece
1 changed files with 10 additions and 1 deletions
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11
rtl/iddr.v
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@ -86,11 +86,14 @@ if (TARGET == "XILINX") begin
.S(1'b0) .S(1'b0)
); );
end else if (IODDR_STYLE == "IODDR2") begin end else if (IODDR_STYLE == "IODDR2") begin
wire q1_int;
reg q1_delay;
IDDR2 #( IDDR2 #(
.DDR_ALIGNMENT("C0") .DDR_ALIGNMENT("C0")
) )
iddr_inst ( iddr_inst (
.Q0(q1[n]), .Q0(q1_int),
.Q1(q2[n]), .Q1(q2[n]),
.C0(clk), .C0(clk),
.C1(~clk), .C1(~clk),
@ -99,6 +102,12 @@ if (TARGET == "XILINX") begin
.R(1'b0), .R(1'b0),
.S(1'b0) .S(1'b0)
); );
always @(posedge clk) begin
q1_delay <= q1_int;
end
assign q1[n] = q1_delay;
end end
end end
end else if (TARGET == "ALTERA") begin end else if (TARGET == "ALTERA") begin