From 74f4c6fc2d5c736bfeee7705dadb7d7dcd6fca60 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 18 Nov 2021 23:56:51 -0800 Subject: [PATCH] Support using separate clock for PTP timestamps on RX path --- fpga/app/template/tb/mqnic_core_pcie_us/Makefile | 3 +++ .../tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py | 1 + fpga/common/rtl/mqnic_core.v | 7 +++++-- fpga/common/rtl/mqnic_core_axi.v | 6 ++++++ fpga/common/rtl/mqnic_core_pcie.v | 6 ++++++ fpga/common/rtl/mqnic_core_pcie_s10.v | 6 ++++++ fpga/common/rtl/mqnic_core_pcie_us.v | 6 ++++++ fpga/common/tb/mqnic_core_axi/Makefile | 3 +++ fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py | 1 + fpga/common/tb/mqnic_core_pcie_s10/Makefile | 3 +++ .../tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py | 1 + fpga/common/tb/mqnic_core_pcie_us/Makefile | 3 +++ .../tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py | 1 + fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile | 3 +++ .../tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py | 1 + 15 files changed, 49 insertions(+), 2 deletions(-) diff --git a/fpga/app/template/tb/mqnic_core_pcie_us/Makefile b/fpga/app/template/tb/mqnic_core_pcie_us/Makefile index 5ad370b7a..9e154e81a 100644 --- a/fpga/app/template/tb/mqnic_core_pcie_us/Makefile +++ b/fpga/app/template/tb/mqnic_core_pcie_us/Makefile @@ -123,6 +123,7 @@ export PARAM_PORTS_PER_IF ?= 1 # PTP configuration export PARAM_PTP_USE_SAMPLE_CLOCK ?= 0 +export PARAM_PTP_SEPARATE_RX_CLOCK ?= 0 export PARAM_PTP_PEROUT_ENABLE ?= 0 export PARAM_PTP_PEROUT_COUNT ?= 1 @@ -227,6 +228,7 @@ ifeq ($(SIM), icarus) COMPILE_ARGS += -P $(TOPLEVEL).IF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).PORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -P $(TOPLEVEL).PTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -P $(TOPLEVEL).PTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).EVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) @@ -311,6 +313,7 @@ else ifeq ($(SIM), verilator) COMPILE_ARGS += -GIF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -GPORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -GPTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -GPTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -GPTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -GPTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -GEVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) diff --git a/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py b/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py index 2eff51b57..f137145dc 100644 --- a/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py +++ b/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py @@ -610,6 +610,7 @@ def test_mqnic_core_pcie_us(request, axis_pcie_data_width, axis_eth_data_width, # PTP configuration parameters['PTP_USE_SAMPLE_CLOCK'] = 0 + parameters['PTP_SEPARATE_RX_CLOCK'] = 0 parameters['PTP_PEROUT_ENABLE'] = 0 parameters['PTP_PEROUT_COUNT'] = 1 diff --git a/fpga/common/rtl/mqnic_core.v b/fpga/common/rtl/mqnic_core.v index a76d90831..a853b0803 100644 --- a/fpga/common/rtl/mqnic_core.v +++ b/fpga/common/rtl/mqnic_core.v @@ -63,6 +63,7 @@ module mqnic_core # parameter PTP_PERIOD_NS = 4'd4, parameter PTP_PERIOD_FNS = 32'd0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, @@ -345,6 +346,8 @@ module mqnic_core # input wire [PORT_COUNT-1:0] rx_clk, input wire [PORT_COUNT-1:0] rx_rst, + input wire [PORT_COUNT-1:0] rx_ptp_clk, + input wire [PORT_COUNT-1:0] rx_ptp_rst, output wire [PORT_COUNT*PTP_TS_WIDTH-1:0] rx_ptp_ts_96, output wire [PORT_COUNT-1:0] rx_ptp_ts_step, @@ -2375,8 +2378,8 @@ generate rx_ptp_cdc_inst ( .input_clk(clk), .input_rst(rst), - .output_clk(rx_clk[n*PORTS_PER_IF+m]), - .output_rst(rx_rst[n*PORTS_PER_IF+m]), + .output_clk(PTP_SEPARATE_RX_CLOCK ? rx_ptp_clk[n*PORTS_PER_IF+m] : rx_clk[n*PORTS_PER_IF+m]), + .output_rst(PTP_SEPARATE_RX_CLOCK ? rx_ptp_rst[n*PORTS_PER_IF+m] : rx_rst[n*PORTS_PER_IF+m]), .sample_clk(ptp_sample_clk), .input_ts(ptp_ts_96), .input_ts_step(ptp_ts_step), diff --git a/fpga/common/rtl/mqnic_core_axi.v b/fpga/common/rtl/mqnic_core_axi.v index 8d880b912..aa0678197 100644 --- a/fpga/common/rtl/mqnic_core_axi.v +++ b/fpga/common/rtl/mqnic_core_axi.v @@ -63,6 +63,7 @@ module mqnic_core_axi # parameter PTP_PERIOD_NS = 4'd4, parameter PTP_PERIOD_FNS = 32'd0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, @@ -335,6 +336,8 @@ module mqnic_core_axi # input wire [PORT_COUNT-1:0] rx_clk, input wire [PORT_COUNT-1:0] rx_rst, + input wire [PORT_COUNT-1:0] rx_ptp_clk, + input wire [PORT_COUNT-1:0] rx_ptp_rst, output wire [PORT_COUNT*PTP_TS_WIDTH-1:0] rx_ptp_ts_96, output wire [PORT_COUNT-1:0] rx_ptp_ts_step, @@ -551,6 +554,7 @@ mqnic_core #( .PTP_PERIOD_NS(PTP_PERIOD_NS), .PTP_PERIOD_FNS(PTP_PERIOD_FNS), .PTP_USE_SAMPLE_CLOCK(PTP_USE_SAMPLE_CLOCK), + .PTP_SEPARATE_RX_CLOCK(PTP_SEPARATE_RX_CLOCK), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), @@ -833,6 +837,8 @@ core_inst ( .rx_clk(rx_clk), .rx_rst(rx_rst), + .rx_ptp_clk(rx_ptp_clk), + .rx_ptp_rst(rx_ptp_rst), .rx_ptp_ts_96(rx_ptp_ts_96), .rx_ptp_ts_step(rx_ptp_ts_step), diff --git a/fpga/common/rtl/mqnic_core_pcie.v b/fpga/common/rtl/mqnic_core_pcie.v index d0712a040..66b509636 100644 --- a/fpga/common/rtl/mqnic_core_pcie.v +++ b/fpga/common/rtl/mqnic_core_pcie.v @@ -63,6 +63,7 @@ module mqnic_core_pcie # parameter PTP_PERIOD_NS = 4'd4, parameter PTP_PERIOD_FNS = 32'd0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, @@ -347,6 +348,8 @@ module mqnic_core_pcie # input wire [PORT_COUNT-1:0] rx_clk, input wire [PORT_COUNT-1:0] rx_rst, + input wire [PORT_COUNT-1:0] rx_ptp_clk, + input wire [PORT_COUNT-1:0] rx_ptp_rst, output wire [PORT_COUNT*PTP_TS_WIDTH-1:0] rx_ptp_ts_96, output wire [PORT_COUNT-1:0] rx_ptp_ts_step, @@ -1306,6 +1309,7 @@ mqnic_core #( .PTP_PERIOD_NS(PTP_PERIOD_NS), .PTP_PERIOD_FNS(PTP_PERIOD_FNS), .PTP_USE_SAMPLE_CLOCK(PTP_USE_SAMPLE_CLOCK), + .PTP_SEPARATE_RX_CLOCK(PTP_SEPARATE_RX_CLOCK), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), @@ -1588,6 +1592,8 @@ core_inst ( .rx_clk(rx_clk), .rx_rst(rx_rst), + .rx_ptp_clk(rx_ptp_clk), + .rx_ptp_rst(rx_ptp_rst), .rx_ptp_ts_96(rx_ptp_ts_96), .rx_ptp_ts_step(rx_ptp_ts_step), diff --git a/fpga/common/rtl/mqnic_core_pcie_s10.v b/fpga/common/rtl/mqnic_core_pcie_s10.v index 01a03090c..dbc1be318 100644 --- a/fpga/common/rtl/mqnic_core_pcie_s10.v +++ b/fpga/common/rtl/mqnic_core_pcie_s10.v @@ -63,6 +63,7 @@ module mqnic_core_pcie_s10 # parameter PTP_PERIOD_NS = 4'd4, parameter PTP_PERIOD_FNS = 32'd0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, @@ -304,6 +305,8 @@ module mqnic_core_pcie_s10 # input wire [PORT_COUNT-1:0] eth_rx_clk, input wire [PORT_COUNT-1:0] eth_rx_rst, + input wire [PORT_COUNT-1:0] eth_rx_ptp_clk, + input wire [PORT_COUNT-1:0] eth_rx_ptp_rst, output wire [PORT_COUNT*PTP_TS_WIDTH-1:0] eth_rx_ptp_ts_96, output wire [PORT_COUNT-1:0] eth_rx_ptp_ts_step, @@ -576,6 +579,7 @@ mqnic_core_pcie #( .PTP_PERIOD_NS(PTP_PERIOD_NS), .PTP_PERIOD_FNS(PTP_PERIOD_FNS), .PTP_USE_SAMPLE_CLOCK(PTP_USE_SAMPLE_CLOCK), + .PTP_SEPARATE_RX_CLOCK(PTP_SEPARATE_RX_CLOCK), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), @@ -860,6 +864,8 @@ core_pcie_inst ( .rx_clk(eth_rx_clk), .rx_rst(eth_rx_rst), + .rx_ptp_clk(eth_rx_ptp_clk), + .rx_ptp_rst(eth_rx_ptp_rst), .rx_ptp_ts_96(eth_rx_ptp_ts_96), .rx_ptp_ts_step(eth_rx_ptp_ts_step), diff --git a/fpga/common/rtl/mqnic_core_pcie_us.v b/fpga/common/rtl/mqnic_core_pcie_us.v index bfc55b0c9..c9a4e3ad0 100644 --- a/fpga/common/rtl/mqnic_core_pcie_us.v +++ b/fpga/common/rtl/mqnic_core_pcie_us.v @@ -63,6 +63,7 @@ module mqnic_core_pcie_us # parameter PTP_PERIOD_NS = 4'd4, parameter PTP_PERIOD_FNS = 32'd0, parameter PTP_USE_SAMPLE_CLOCK = 0, + parameter PTP_SEPARATE_RX_CLOCK = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, @@ -355,6 +356,8 @@ module mqnic_core_pcie_us # input wire [PORT_COUNT-1:0] eth_rx_clk, input wire [PORT_COUNT-1:0] eth_rx_rst, + input wire [PORT_COUNT-1:0] eth_rx_ptp_clk, + input wire [PORT_COUNT-1:0] eth_rx_ptp_rst, output wire [PORT_COUNT*PTP_TS_WIDTH-1:0] eth_rx_ptp_ts_96, output wire [PORT_COUNT-1:0] eth_rx_ptp_ts_step, @@ -666,6 +669,7 @@ mqnic_core_pcie #( .PTP_PERIOD_NS(PTP_PERIOD_NS), .PTP_PERIOD_FNS(PTP_PERIOD_FNS), .PTP_USE_SAMPLE_CLOCK(PTP_USE_SAMPLE_CLOCK), + .PTP_SEPARATE_RX_CLOCK(PTP_SEPARATE_RX_CLOCK), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), @@ -950,6 +954,8 @@ core_pcie_inst ( .rx_clk(eth_rx_clk), .rx_rst(eth_rx_rst), + .rx_ptp_clk(eth_rx_ptp_clk), + .rx_ptp_rst(eth_rx_ptp_rst), .rx_ptp_ts_96(eth_rx_ptp_ts_96), .rx_ptp_ts_step(eth_rx_ptp_ts_step), diff --git a/fpga/common/tb/mqnic_core_axi/Makefile b/fpga/common/tb/mqnic_core_axi/Makefile index 870a40639..af1c0400d 100644 --- a/fpga/common/tb/mqnic_core_axi/Makefile +++ b/fpga/common/tb/mqnic_core_axi/Makefile @@ -109,6 +109,7 @@ export PARAM_PORTS_PER_IF ?= 1 # PTP configuration export PARAM_PTP_USE_SAMPLE_CLOCK ?= 0 +export PARAM_PTP_SEPARATE_RX_CLOCK ?= 0 export PARAM_PTP_PEROUT_ENABLE ?= 0 export PARAM_PTP_PEROUT_COUNT ?= 1 @@ -213,6 +214,7 @@ ifeq ($(SIM), icarus) COMPILE_ARGS += -P $(TOPLEVEL).IF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).PORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -P $(TOPLEVEL).PTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -P $(TOPLEVEL).PTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).EVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) @@ -295,6 +297,7 @@ else ifeq ($(SIM), verilator) COMPILE_ARGS += -GIF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -GPORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -GPTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -GPTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -GPTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -GPTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -GEVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) diff --git a/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py b/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py index 7b7040dcc..79c5d8b29 100644 --- a/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py +++ b/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py @@ -404,6 +404,7 @@ def test_mqnic_core_axi(request, axi_data_width, axis_data_width, axis_sync_data # PTP configuration parameters['PTP_USE_SAMPLE_CLOCK'] = 0 + parameters['PTP_SEPARATE_RX_CLOCK'] = 0 parameters['PTP_PEROUT_ENABLE'] = 0 parameters['PTP_PEROUT_COUNT'] = 1 diff --git a/fpga/common/tb/mqnic_core_pcie_s10/Makefile b/fpga/common/tb/mqnic_core_pcie_s10/Makefile index 62ad6bde4..ab7da0a3e 100644 --- a/fpga/common/tb/mqnic_core_pcie_s10/Makefile +++ b/fpga/common/tb/mqnic_core_pcie_s10/Makefile @@ -119,6 +119,7 @@ export PARAM_PORTS_PER_IF ?= 1 # PTP configuration export PARAM_PTP_USE_SAMPLE_CLOCK ?= 0 +export PARAM_PTP_SEPARATE_RX_CLOCK ?= 0 export PARAM_PTP_PEROUT_ENABLE ?= 0 export PARAM_PTP_PEROUT_COUNT ?= 1 @@ -228,6 +229,7 @@ ifeq ($(SIM), icarus) COMPILE_ARGS += -P $(TOPLEVEL).IF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).PORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -P $(TOPLEVEL).PTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -P $(TOPLEVEL).PTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).EVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) @@ -317,6 +319,7 @@ else ifeq ($(SIM), verilator) COMPILE_ARGS += -GIF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -GPORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -GPTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -GPTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -GPTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -GPTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -GEVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) diff --git a/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py b/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py index 1cec2cd32..5bed67674 100644 --- a/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py +++ b/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py @@ -525,6 +525,7 @@ def test_mqnic_core_pcie_s10(request, pcie_data_width, axis_eth_data_width, axis # PTP configuration parameters['PTP_USE_SAMPLE_CLOCK'] = 0 + parameters['PTP_SEPARATE_RX_CLOCK'] = 0 parameters['PTP_PEROUT_ENABLE'] = 0 parameters['PTP_PEROUT_COUNT'] = 1 diff --git a/fpga/common/tb/mqnic_core_pcie_us/Makefile b/fpga/common/tb/mqnic_core_pcie_us/Makefile index d0d52ad15..f5088b6e9 100644 --- a/fpga/common/tb/mqnic_core_pcie_us/Makefile +++ b/fpga/common/tb/mqnic_core_pcie_us/Makefile @@ -121,6 +121,7 @@ export PARAM_PORTS_PER_IF ?= 1 # PTP configuration export PARAM_PTP_USE_SAMPLE_CLOCK ?= 0 +export PARAM_PTP_SEPARATE_RX_CLOCK ?= 0 export PARAM_PTP_PEROUT_ENABLE ?= 0 export PARAM_PTP_PEROUT_COUNT ?= 1 @@ -225,6 +226,7 @@ ifeq ($(SIM), icarus) COMPILE_ARGS += -P $(TOPLEVEL).IF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).PORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -P $(TOPLEVEL).PTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -P $(TOPLEVEL).PTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).EVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) @@ -309,6 +311,7 @@ else ifeq ($(SIM), verilator) COMPILE_ARGS += -GIF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -GPORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -GPTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -GPTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -GPTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -GPTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -GEVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) diff --git a/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py b/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py index 87f41350d..94c31549e 100644 --- a/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py +++ b/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py @@ -602,6 +602,7 @@ def test_mqnic_core_pcie_us(request, axis_pcie_data_width, axis_eth_data_width, # PTP configuration parameters['PTP_USE_SAMPLE_CLOCK'] = 0 + parameters['PTP_SEPARATE_RX_CLOCK'] = 0 parameters['PTP_PEROUT_ENABLE'] = 0 parameters['PTP_PEROUT_COUNT'] = 1 diff --git a/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile b/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile index 05a769036..dcd9bb948 100644 --- a/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile +++ b/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile @@ -123,6 +123,7 @@ export PARAM_PORTS_PER_IF ?= 1 # PTP configuration export PARAM_PTP_USE_SAMPLE_CLOCK ?= 0 +export PARAM_PTP_SEPARATE_RX_CLOCK ?= 0 export PARAM_PTP_PEROUT_ENABLE ?= 0 export PARAM_PTP_PEROUT_COUNT ?= 1 @@ -227,6 +228,7 @@ ifeq ($(SIM), icarus) COMPILE_ARGS += -P $(TOPLEVEL).IF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).PORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -P $(TOPLEVEL).PTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -P $(TOPLEVEL).PTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -P $(TOPLEVEL).PTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -P $(TOPLEVEL).EVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) @@ -311,6 +313,7 @@ else ifeq ($(SIM), verilator) COMPILE_ARGS += -GIF_COUNT=$(PARAM_IF_COUNT) COMPILE_ARGS += -GPORTS_PER_IF=$(PARAM_PORTS_PER_IF) COMPILE_ARGS += -GPTP_USE_SAMPLE_CLOCK=$(PARAM_PTP_USE_SAMPLE_CLOCK) + COMPILE_ARGS += -GPTP_SEPARATE_RX_CLOCK=$(PARAM_PTP_SEPARATE_RX_CLOCK) COMPILE_ARGS += -GPTP_PEROUT_ENABLE=$(PARAM_PTP_PEROUT_ENABLE) COMPILE_ARGS += -GPTP_PEROUT_COUNT=$(PARAM_PTP_PEROUT_COUNT) COMPILE_ARGS += -GEVENT_QUEUE_OP_TABLE_SIZE=$(PARAM_EVENT_QUEUE_OP_TABLE_SIZE) diff --git a/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py b/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py index 82a0e147e..cf097515f 100644 --- a/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py +++ b/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py @@ -656,6 +656,7 @@ def test_mqnic_core_pcie_us(request, axis_pcie_data_width, axis_eth_data_width, # PTP configuration parameters['PTP_USE_SAMPLE_CLOCK'] = 0 + parameters['PTP_SEPARATE_RX_CLOCK'] = 0 parameters['PTP_PEROUT_ENABLE'] = 0 parameters['PTP_PEROUT_COUNT'] = 1