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Configure RC model to split on all RCB boundaries during RX completion buffer tests

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2023-06-23 22:38:06 -07:00
parent fe7d8e229d
commit 75126f1333
3 changed files with 12 additions and 0 deletions
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4
example/common/tb/example_core_pcie_ptile/test_example_core_pcie_ptile.py
View File

@ -580,6 +580,8 @@ async def run_test(dut):
tb.log.info("Test RX completion buffer (CPLH, 8)")
tb.rc.split_on_all_rcb = True
size = 8
stride = size
for count in range(32, 256+1, 8):
@ -599,6 +601,8 @@ async def run_test(dut):
for count in range(8, 256+1, 8):
await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000)
tb.rc.split_on_all_rcb = False
tb.log.info("Test RX completion buffer (CPLD)")
size = 512

4
example/common/tb/example_core_pcie_s10/test_example_core_pcie_s10.py
View File

@ -528,6 +528,8 @@ async def run_test(dut):
tb.log.info("Test RX completion buffer (CPLH, 8)")
tb.rc.split_on_all_rcb = True
size = 8
stride = size
for count in range(32, 256+1, 8):
@ -547,6 +549,8 @@ async def run_test(dut):
for count in range(8, 256+1, 8):
await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000)
tb.rc.split_on_all_rcb = False
tb.log.info("Test RX completion buffer (CPLD)")
size = 512

4
example/common/tb/example_core_pcie_us/test_example_core_pcie_us.py
View File

@ -621,6 +621,8 @@ async def run_test(dut):
tb.log.info("Test RX completion buffer (CPLH, 8)")
tb.rc.split_on_all_rcb = True
size = 8
stride = size
for count in range(32, 256+1, 8):
@ -640,6 +642,8 @@ async def run_test(dut):
for count in range(8, 256+1, 8):
await dma_cpl_buf_test(tb, dev, mem_base+128-8, region_len-1, size, stride, count, 2000)
tb.rc.split_on_all_rcb = False
tb.log.info("Test RX completion buffer (CPLD)")
size = 512