From 75c2cc0acc05b0a98ccf25efdeafbe7c0dd85423 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 25 Aug 2023 01:24:26 -0700 Subject: [PATCH] Use quad wrappers in HTG9200 example designs Signed-off-by: Alex Forencich --- example/HTG9200/fpga_25g/fpga/Makefile | 1 + example/HTG9200/fpga_25g/fpga_10g/Makefile | 1 + .../fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v | 395 ++ .../fpga_25g/rtl/eth_xcvr_phy_wrapper.v | 18 +- example/HTG9200/fpga_25g/rtl/fpga.v | 2385 ++++------ .../fpga_fmc_htg_6qsfp_25g/fpga/Makefile | 1 + .../fpga_fmc_htg_6qsfp_25g/fpga_10g/Makefile | 1 + .../rtl/eth_xcvr_phy_quad_wrapper.v | 395 ++ .../rtl/eth_xcvr_phy_wrapper.v | 18 +- .../HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/fpga.v | 3915 ++++++----------- 10 files changed, 2824 insertions(+), 4306 deletions(-) create mode 100644 example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v create mode 100644 example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_quad_wrapper.v diff --git a/example/HTG9200/fpga_25g/fpga/Makefile b/example/HTG9200/fpga_25g/fpga/Makefile index 578e97b42..1ec3cbda9 100644 --- a/example/HTG9200/fpga_25g/fpga/Makefile +++ b/example/HTG9200/fpga_25g/fpga/Makefile @@ -8,6 +8,7 @@ FPGA_ARCH = virtexuplus SYN_FILES = rtl/fpga.v SYN_FILES += rtl/fpga_core.v SYN_FILES += rtl/eth_xcvr_phy_wrapper.v +SYN_FILES += rtl/eth_xcvr_phy_quad_wrapper.v SYN_FILES += rtl/debounce_switch.v SYN_FILES += rtl/sync_signal.v SYN_FILES += rtl/i2c_master.v diff --git a/example/HTG9200/fpga_25g/fpga_10g/Makefile b/example/HTG9200/fpga_25g/fpga_10g/Makefile index 578e97b42..1ec3cbda9 100644 --- a/example/HTG9200/fpga_25g/fpga_10g/Makefile +++ b/example/HTG9200/fpga_25g/fpga_10g/Makefile @@ -8,6 +8,7 @@ FPGA_ARCH = virtexuplus SYN_FILES = rtl/fpga.v SYN_FILES += rtl/fpga_core.v SYN_FILES += rtl/eth_xcvr_phy_wrapper.v +SYN_FILES += rtl/eth_xcvr_phy_quad_wrapper.v SYN_FILES += rtl/debounce_switch.v SYN_FILES += rtl/sync_signal.v SYN_FILES += rtl/i2c_master.v diff --git a/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v b/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v new file mode 100644 index 000000000..c910d7906 --- /dev/null +++ b/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v @@ -0,0 +1,395 @@ +/* + +Copyright (c) 2023 Alex Forencich + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +*/ + +// Language: Verilog 2001 + +`resetall +`timescale 1ns / 1ps +`default_nettype none + +/* + * Transceiver and PHY quad wrapper + */ +module eth_xcvr_phy_quad_wrapper # +( + parameter COUNT = 4, + parameter DATA_WIDTH = 64, + parameter CTRL_WIDTH = (DATA_WIDTH/8), + parameter HDR_WIDTH = 2, + parameter PRBS31_ENABLE = 0, + parameter TX_SERDES_PIPELINE = 0, + parameter RX_SERDES_PIPELINE = 0, + parameter BITSLIP_HIGH_CYCLES = 1, + parameter BITSLIP_LOW_CYCLES = 8, + parameter COUNT_125US = 125000/6.4 +) +( + input wire xcvr_ctrl_clk, + input wire xcvr_ctrl_rst, + + /* + * Common + */ + output wire xcvr_gtpowergood_out, + + /* + * PLL + */ + input wire xcvr_gtrefclk00_in, + + /* + * Serial data + */ + output wire [COUNT-1:0] xcvr_txp, + output wire [COUNT-1:0] xcvr_txn, + input wire [COUNT-1:0] xcvr_rxp, + input wire [COUNT-1:0] xcvr_rxn, + + /* + * PHY connections + */ + output wire phy_1_tx_clk, + output wire phy_1_tx_rst, + input wire [DATA_WIDTH-1:0] phy_1_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_1_xgmii_txc, + output wire phy_1_rx_clk, + output wire phy_1_rx_rst, + output wire [DATA_WIDTH-1:0] phy_1_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_1_xgmii_rxc, + output wire phy_1_tx_bad_block, + output wire [6:0] phy_1_rx_error_count, + output wire phy_1_rx_bad_block, + output wire phy_1_rx_sequence_error, + output wire phy_1_rx_block_lock, + output wire phy_1_rx_high_ber, + output wire phy_1_rx_status, + input wire phy_1_cfg_tx_prbs31_enable, + input wire phy_1_cfg_rx_prbs31_enable, + + output wire phy_2_tx_clk, + output wire phy_2_tx_rst, + input wire [DATA_WIDTH-1:0] phy_2_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_2_xgmii_txc, + output wire phy_2_rx_clk, + output wire phy_2_rx_rst, + output wire [DATA_WIDTH-1:0] phy_2_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_2_xgmii_rxc, + output wire phy_2_tx_bad_block, + output wire [6:0] phy_2_rx_error_count, + output wire phy_2_rx_bad_block, + output wire phy_2_rx_sequence_error, + output wire phy_2_rx_block_lock, + output wire phy_2_rx_high_ber, + output wire phy_2_rx_status, + input wire phy_2_cfg_tx_prbs31_enable, + input wire phy_2_cfg_rx_prbs31_enable, + + output wire phy_3_tx_clk, + output wire phy_3_tx_rst, + input wire [DATA_WIDTH-1:0] phy_3_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_3_xgmii_txc, + output wire phy_3_rx_clk, + output wire phy_3_rx_rst, + output wire [DATA_WIDTH-1:0] phy_3_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_3_xgmii_rxc, + output wire phy_3_tx_bad_block, + output wire [6:0] phy_3_rx_error_count, + output wire phy_3_rx_bad_block, + output wire phy_3_rx_sequence_error, + output wire phy_3_rx_block_lock, + output wire phy_3_rx_high_ber, + output wire phy_3_rx_status, + input wire phy_3_cfg_tx_prbs31_enable, + input wire phy_3_cfg_rx_prbs31_enable, + + output wire phy_4_tx_clk, + output wire phy_4_tx_rst, + input wire [DATA_WIDTH-1:0] phy_4_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_4_xgmii_txc, + output wire phy_4_rx_clk, + output wire phy_4_rx_rst, + output wire [DATA_WIDTH-1:0] phy_4_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_4_xgmii_rxc, + output wire phy_4_tx_bad_block, + output wire [6:0] phy_4_rx_error_count, + output wire phy_4_rx_bad_block, + output wire phy_4_rx_sequence_error, + output wire phy_4_rx_block_lock, + output wire phy_4_rx_high_ber, + output wire phy_4_rx_status, + input wire phy_4_cfg_tx_prbs31_enable, + input wire phy_4_cfg_rx_prbs31_enable +); + +generate + +wire xcvr_qpll0lock; +wire xcvr_qpll0clk; +wire xcvr_qpll0refclk; + +if (COUNT > 0) begin : phy1 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(1), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_1 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(xcvr_gtpowergood_out), + + // PLL out + .xcvr_gtrefclk00_in(xcvr_gtrefclk00_in), + .xcvr_qpll0lock_out(xcvr_qpll0lock), + .xcvr_qpll0clk_out(xcvr_qpll0clk), + .xcvr_qpll0refclk_out(xcvr_qpll0refclk), + + // PLL in + .xcvr_qpll0lock_in(1'b0), + .xcvr_qpll0clk_in(1'b0), + .xcvr_qpll0refclk_in(1'b0), + + // Serial data + .xcvr_txp(xcvr_txp[0]), + .xcvr_txn(xcvr_txn[0]), + .xcvr_rxp(xcvr_rxp[0]), + .xcvr_rxn(xcvr_rxn[0]), + + // PHY connections + .phy_tx_clk(phy_1_tx_clk), + .phy_tx_rst(phy_1_tx_rst), + .phy_xgmii_txd(phy_1_xgmii_txd), + .phy_xgmii_txc(phy_1_xgmii_txc), + .phy_rx_clk(phy_1_rx_clk), + .phy_rx_rst(phy_1_rx_rst), + .phy_xgmii_rxd(phy_1_xgmii_rxd), + .phy_xgmii_rxc(phy_1_xgmii_rxc), + .phy_tx_bad_block(phy_1_tx_bad_block), + .phy_rx_error_count(phy_1_rx_error_count), + .phy_rx_bad_block(phy_1_rx_bad_block), + .phy_rx_sequence_error(phy_1_rx_sequence_error), + .phy_rx_block_lock(phy_1_rx_block_lock), + .phy_rx_high_ber(phy_1_rx_high_ber), + .phy_rx_status(phy_1_rx_status), + .phy_cfg_tx_prbs31_enable(phy_1_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_1_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 1) begin : phy2 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_2 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[1]), + .xcvr_txn(xcvr_txn[1]), + .xcvr_rxp(xcvr_rxp[1]), + .xcvr_rxn(xcvr_rxn[1]), + + // PHY connections + .phy_tx_clk(phy_2_tx_clk), + .phy_tx_rst(phy_2_tx_rst), + .phy_xgmii_txd(phy_2_xgmii_txd), + .phy_xgmii_txc(phy_2_xgmii_txc), + .phy_rx_clk(phy_2_rx_clk), + .phy_rx_rst(phy_2_rx_rst), + .phy_xgmii_rxd(phy_2_xgmii_rxd), + .phy_xgmii_rxc(phy_2_xgmii_rxc), + .phy_tx_bad_block(phy_2_tx_bad_block), + .phy_rx_error_count(phy_2_rx_error_count), + .phy_rx_bad_block(phy_2_rx_bad_block), + .phy_rx_sequence_error(phy_2_rx_sequence_error), + .phy_rx_block_lock(phy_2_rx_block_lock), + .phy_rx_high_ber(phy_2_rx_high_ber), + .phy_rx_status(phy_2_rx_status), + .phy_cfg_tx_prbs31_enable(phy_2_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_2_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 2) begin : phy3 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_3 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[2]), + .xcvr_txn(xcvr_txn[2]), + .xcvr_rxp(xcvr_rxp[2]), + .xcvr_rxn(xcvr_rxn[2]), + + // PHY connections + .phy_tx_clk(phy_3_tx_clk), + .phy_tx_rst(phy_3_tx_rst), + .phy_xgmii_txd(phy_3_xgmii_txd), + .phy_xgmii_txc(phy_3_xgmii_txc), + .phy_rx_clk(phy_3_rx_clk), + .phy_rx_rst(phy_3_rx_rst), + .phy_xgmii_rxd(phy_3_xgmii_rxd), + .phy_xgmii_rxc(phy_3_xgmii_rxc), + .phy_tx_bad_block(phy_3_tx_bad_block), + .phy_rx_error_count(phy_3_rx_error_count), + .phy_rx_bad_block(phy_3_rx_bad_block), + .phy_rx_sequence_error(phy_3_rx_sequence_error), + .phy_rx_block_lock(phy_3_rx_block_lock), + .phy_rx_high_ber(phy_3_rx_high_ber), + .phy_rx_status(phy_3_rx_status), + .phy_cfg_tx_prbs31_enable(phy_3_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_3_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 3) begin : phy4 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_4 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[3]), + .xcvr_txn(xcvr_txn[3]), + .xcvr_rxp(xcvr_rxp[3]), + .xcvr_rxn(xcvr_rxn[3]), + + // PHY connections + .phy_tx_clk(phy_4_tx_clk), + .phy_tx_rst(phy_4_tx_rst), + .phy_xgmii_txd(phy_4_xgmii_txd), + .phy_xgmii_txc(phy_4_xgmii_txc), + .phy_rx_clk(phy_4_rx_clk), + .phy_rx_rst(phy_4_rx_rst), + .phy_xgmii_rxd(phy_4_xgmii_rxd), + .phy_xgmii_rxc(phy_4_xgmii_rxc), + .phy_tx_bad_block(phy_4_tx_bad_block), + .phy_rx_error_count(phy_4_rx_error_count), + .phy_rx_bad_block(phy_4_rx_bad_block), + .phy_rx_sequence_error(phy_4_rx_sequence_error), + .phy_rx_block_lock(phy_4_rx_block_lock), + .phy_rx_high_ber(phy_4_rx_high_ber), + .phy_rx_status(phy_4_rx_status), + .phy_cfg_tx_prbs31_enable(phy_4_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_4_cfg_rx_prbs31_enable) + ); + +end + +endgenerate + +endmodule + +`resetall diff --git a/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_wrapper.v b/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_wrapper.v index c898dcabe..0d1142eb6 100644 --- a/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_wrapper.v +++ b/example/HTG9200/fpga_25g/rtl/eth_xcvr_phy_wrapper.v @@ -1,6 +1,6 @@ /* -Copyright (c) 2021 Alex Forencich +Copyright (c) 2021-2023 Alex Forencich Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal @@ -58,8 +58,8 @@ module eth_xcvr_phy_wrapper # */ input wire xcvr_gtrefclk00_in, output wire xcvr_qpll0lock_out, - output wire xcvr_qpll0outclk_out, - output wire xcvr_qpll0outrefclk_out, + output wire xcvr_qpll0clk_out, + output wire xcvr_qpll0refclk_out, /* * PLL in @@ -94,6 +94,7 @@ module eth_xcvr_phy_wrapper # output wire phy_rx_sequence_error, output wire phy_rx_block_lock, output wire phy_rx_high_ber, + output wire phy_rx_status, input wire phy_cfg_tx_prbs31_enable, input wire phy_cfg_rx_prbs31_enable ); @@ -128,8 +129,8 @@ if (HAS_COMMON) begin : xcvr // PLL .gtrefclk00_in(xcvr_gtrefclk00_in), .qpll0lock_out(xcvr_qpll0lock_out), - .qpll0outclk_out(xcvr_qpll0outclk_out), - .qpll0outrefclk_out(xcvr_qpll0outrefclk_out), + .qpll0outclk_out(xcvr_qpll0clk_out), + .qpll0outrefclk_out(xcvr_qpll0refclk_out), // Serial data .gtytxp_out(xcvr_txp), @@ -174,6 +175,8 @@ if (HAS_COMMON) begin : xcvr .rxstartofseq_out() ); + assign xcvr_qpll0reset_out = 1'b0; + end else begin : xcvr eth_xcvr_gt_channel @@ -234,6 +237,10 @@ end else begin : xcvr .rxstartofseq_out() ); + assign xcvr_qpll0lock_out = 1'b0; + assign xcvr_qpll0clk_out = 1'b0; + assign xcvr_qpll0refclk_out = 1'b0; + end endgenerate @@ -290,6 +297,7 @@ phy_inst ( .rx_sequence_error(phy_rx_sequence_error), .rx_block_lock(phy_rx_block_lock), .rx_high_ber(phy_rx_high_ber), + .rx_status(phy_rx_status), .cfg_tx_prbs31_enable(phy_cfg_tx_prbs31_enable), .cfg_rx_prbs31_enable(phy_cfg_rx_prbs31_enable) ); diff --git a/example/HTG9200/fpga_25g/rtl/fpga.v b/example/HTG9200/fpga_25g/rtl/fpga.v index 35d3872ba..7fb1723b7 100644 --- a/example/HTG9200/fpga_25g/rtl/fpga.v +++ b/example/HTG9200/fpga_25g/rtl/fpga.v @@ -442,196 +442,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_1_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_1_qpll0lock; -wire qsfp_1_qpll0outclk; -wire qsfp_1_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_1_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_1_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_1_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_1_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_1_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_1_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_1_tx_p), + .xcvr_txn(qsfp_1_tx_n), + .xcvr_rxp(qsfp_1_rx_p), + .xcvr_rxn(qsfp_1_rx_n), - // Serial data - .xcvr_txp(qsfp_1_tx_p[0]), - .xcvr_txn(qsfp_1_tx_n[0]), - .xcvr_rxp(qsfp_1_rx_p[0]), - .xcvr_rxn(qsfp_1_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_1_tx_clk_1_int), + .phy_1_tx_rst(qsfp_1_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_1_txd_1_int), + .phy_1_xgmii_txc(qsfp_1_txc_1_int), + .phy_1_rx_clk(qsfp_1_rx_clk_1_int), + .phy_1_rx_rst(qsfp_1_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_1_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_1_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_1_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_1_int), - .phy_tx_rst(qsfp_1_tx_rst_1_int), - .phy_xgmii_txd(qsfp_1_txd_1_int), - .phy_xgmii_txc(qsfp_1_txc_1_int), - .phy_rx_clk(qsfp_1_rx_clk_1_int), - .phy_rx_rst(qsfp_1_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_1_rxd_1_int), - .phy_xgmii_rxc(qsfp_1_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_1_tx_clk_2_int), + .phy_2_tx_rst(qsfp_1_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_1_txd_2_int), + .phy_2_xgmii_txc(qsfp_1_txc_2_int), + .phy_2_rx_clk(qsfp_1_rx_clk_2_int), + .phy_2_rx_rst(qsfp_1_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_1_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_1_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_1_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_1_tx_clk_3_int), + .phy_3_tx_rst(qsfp_1_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_1_txd_3_int), + .phy_3_xgmii_txc(qsfp_1_txc_3_int), + .phy_3_rx_clk(qsfp_1_rx_clk_3_int), + .phy_3_rx_rst(qsfp_1_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_1_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_1_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_1_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[1]), - .xcvr_txn(qsfp_1_tx_n[1]), - .xcvr_rxp(qsfp_1_rx_p[1]), - .xcvr_rxn(qsfp_1_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_2_int), - .phy_tx_rst(qsfp_1_tx_rst_2_int), - .phy_xgmii_txd(qsfp_1_txd_2_int), - .phy_xgmii_txc(qsfp_1_txc_2_int), - .phy_rx_clk(qsfp_1_rx_clk_2_int), - .phy_rx_rst(qsfp_1_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_1_rxd_2_int), - .phy_xgmii_rxc(qsfp_1_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[2]), - .xcvr_txn(qsfp_1_tx_n[2]), - .xcvr_rxp(qsfp_1_rx_p[2]), - .xcvr_rxn(qsfp_1_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_3_int), - .phy_tx_rst(qsfp_1_tx_rst_3_int), - .phy_xgmii_txd(qsfp_1_txd_3_int), - .phy_xgmii_txc(qsfp_1_txc_3_int), - .phy_rx_clk(qsfp_1_rx_clk_3_int), - .phy_rx_rst(qsfp_1_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_1_rxd_3_int), - .phy_xgmii_rxc(qsfp_1_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[3]), - .xcvr_txn(qsfp_1_tx_n[3]), - .xcvr_rxp(qsfp_1_rx_p[3]), - .xcvr_rxn(qsfp_1_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_4_int), - .phy_tx_rst(qsfp_1_tx_rst_4_int), - .phy_xgmii_txd(qsfp_1_txd_4_int), - .phy_xgmii_txc(qsfp_1_txc_4_int), - .phy_rx_clk(qsfp_1_rx_clk_4_int), - .phy_rx_rst(qsfp_1_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_1_rxd_4_int), - .phy_xgmii_rxc(qsfp_1_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_1_tx_clk_4_int), + .phy_4_tx_rst(qsfp_1_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_1_txd_4_int), + .phy_4_xgmii_txc(qsfp_1_txc_4_int), + .phy_4_rx_clk(qsfp_1_rx_clk_4_int), + .phy_4_rx_rst(qsfp_1_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_1_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_1_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_1_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 2 @@ -685,196 +592,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_2_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_2_qpll0lock; -wire qsfp_2_qpll0outclk; -wire qsfp_2_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_2_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_2_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_2_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_2_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_2_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_2_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_2_tx_p), + .xcvr_txn(qsfp_2_tx_n), + .xcvr_rxp(qsfp_2_rx_p), + .xcvr_rxn(qsfp_2_rx_n), - // Serial data - .xcvr_txp(qsfp_2_tx_p[0]), - .xcvr_txn(qsfp_2_tx_n[0]), - .xcvr_rxp(qsfp_2_rx_p[0]), - .xcvr_rxn(qsfp_2_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_2_tx_clk_1_int), + .phy_1_tx_rst(qsfp_2_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_2_txd_1_int), + .phy_1_xgmii_txc(qsfp_2_txc_1_int), + .phy_1_rx_clk(qsfp_2_rx_clk_1_int), + .phy_1_rx_rst(qsfp_2_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_2_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_2_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_2_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_1_int), - .phy_tx_rst(qsfp_2_tx_rst_1_int), - .phy_xgmii_txd(qsfp_2_txd_1_int), - .phy_xgmii_txc(qsfp_2_txc_1_int), - .phy_rx_clk(qsfp_2_rx_clk_1_int), - .phy_rx_rst(qsfp_2_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_2_rxd_1_int), - .phy_xgmii_rxc(qsfp_2_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_2_tx_clk_2_int), + .phy_2_tx_rst(qsfp_2_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_2_txd_2_int), + .phy_2_xgmii_txc(qsfp_2_txc_2_int), + .phy_2_rx_clk(qsfp_2_rx_clk_2_int), + .phy_2_rx_rst(qsfp_2_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_2_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_2_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_2_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_2_tx_clk_3_int), + .phy_3_tx_rst(qsfp_2_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_2_txd_3_int), + .phy_3_xgmii_txc(qsfp_2_txc_3_int), + .phy_3_rx_clk(qsfp_2_rx_clk_3_int), + .phy_3_rx_rst(qsfp_2_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_2_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_2_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_2_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[1]), - .xcvr_txn(qsfp_2_tx_n[1]), - .xcvr_rxp(qsfp_2_rx_p[1]), - .xcvr_rxn(qsfp_2_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_2_int), - .phy_tx_rst(qsfp_2_tx_rst_2_int), - .phy_xgmii_txd(qsfp_2_txd_2_int), - .phy_xgmii_txc(qsfp_2_txc_2_int), - .phy_rx_clk(qsfp_2_rx_clk_2_int), - .phy_rx_rst(qsfp_2_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_2_rxd_2_int), - .phy_xgmii_rxc(qsfp_2_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[2]), - .xcvr_txn(qsfp_2_tx_n[2]), - .xcvr_rxp(qsfp_2_rx_p[2]), - .xcvr_rxn(qsfp_2_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_3_int), - .phy_tx_rst(qsfp_2_tx_rst_3_int), - .phy_xgmii_txd(qsfp_2_txd_3_int), - .phy_xgmii_txc(qsfp_2_txc_3_int), - .phy_rx_clk(qsfp_2_rx_clk_3_int), - .phy_rx_rst(qsfp_2_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_2_rxd_3_int), - .phy_xgmii_rxc(qsfp_2_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[3]), - .xcvr_txn(qsfp_2_tx_n[3]), - .xcvr_rxp(qsfp_2_rx_p[3]), - .xcvr_rxn(qsfp_2_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_4_int), - .phy_tx_rst(qsfp_2_tx_rst_4_int), - .phy_xgmii_txd(qsfp_2_txd_4_int), - .phy_xgmii_txc(qsfp_2_txc_4_int), - .phy_rx_clk(qsfp_2_rx_clk_4_int), - .phy_rx_rst(qsfp_2_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_2_rxd_4_int), - .phy_xgmii_rxc(qsfp_2_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_2_tx_clk_4_int), + .phy_4_tx_rst(qsfp_2_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_2_txd_4_int), + .phy_4_xgmii_txc(qsfp_2_txc_4_int), + .phy_4_rx_clk(qsfp_2_rx_clk_4_int), + .phy_4_rx_rst(qsfp_2_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_2_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_2_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_2_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 3 @@ -928,196 +742,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_3_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_3_qpll0lock; -wire qsfp_3_qpll0outclk; -wire qsfp_3_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_3_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_3_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_3_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_3_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_3_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_3_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_3_tx_p), + .xcvr_txn(qsfp_3_tx_n), + .xcvr_rxp(qsfp_3_rx_p), + .xcvr_rxn(qsfp_3_rx_n), - // Serial data - .xcvr_txp(qsfp_3_tx_p[0]), - .xcvr_txn(qsfp_3_tx_n[0]), - .xcvr_rxp(qsfp_3_rx_p[0]), - .xcvr_rxn(qsfp_3_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_3_tx_clk_1_int), + .phy_1_tx_rst(qsfp_3_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_3_txd_1_int), + .phy_1_xgmii_txc(qsfp_3_txc_1_int), + .phy_1_rx_clk(qsfp_3_rx_clk_1_int), + .phy_1_rx_rst(qsfp_3_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_3_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_3_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_3_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_1_int), - .phy_tx_rst(qsfp_3_tx_rst_1_int), - .phy_xgmii_txd(qsfp_3_txd_1_int), - .phy_xgmii_txc(qsfp_3_txc_1_int), - .phy_rx_clk(qsfp_3_rx_clk_1_int), - .phy_rx_rst(qsfp_3_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_3_rxd_1_int), - .phy_xgmii_rxc(qsfp_3_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_3_tx_clk_2_int), + .phy_2_tx_rst(qsfp_3_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_3_txd_2_int), + .phy_2_xgmii_txc(qsfp_3_txc_2_int), + .phy_2_rx_clk(qsfp_3_rx_clk_2_int), + .phy_2_rx_rst(qsfp_3_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_3_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_3_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_3_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_3_tx_clk_3_int), + .phy_3_tx_rst(qsfp_3_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_3_txd_3_int), + .phy_3_xgmii_txc(qsfp_3_txc_3_int), + .phy_3_rx_clk(qsfp_3_rx_clk_3_int), + .phy_3_rx_rst(qsfp_3_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_3_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_3_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_3_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[1]), - .xcvr_txn(qsfp_3_tx_n[1]), - .xcvr_rxp(qsfp_3_rx_p[1]), - .xcvr_rxn(qsfp_3_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_2_int), - .phy_tx_rst(qsfp_3_tx_rst_2_int), - .phy_xgmii_txd(qsfp_3_txd_2_int), - .phy_xgmii_txc(qsfp_3_txc_2_int), - .phy_rx_clk(qsfp_3_rx_clk_2_int), - .phy_rx_rst(qsfp_3_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_3_rxd_2_int), - .phy_xgmii_rxc(qsfp_3_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[2]), - .xcvr_txn(qsfp_3_tx_n[2]), - .xcvr_rxp(qsfp_3_rx_p[2]), - .xcvr_rxn(qsfp_3_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_3_int), - .phy_tx_rst(qsfp_3_tx_rst_3_int), - .phy_xgmii_txd(qsfp_3_txd_3_int), - .phy_xgmii_txc(qsfp_3_txc_3_int), - .phy_rx_clk(qsfp_3_rx_clk_3_int), - .phy_rx_rst(qsfp_3_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_3_rxd_3_int), - .phy_xgmii_rxc(qsfp_3_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[3]), - .xcvr_txn(qsfp_3_tx_n[3]), - .xcvr_rxp(qsfp_3_rx_p[3]), - .xcvr_rxn(qsfp_3_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_4_int), - .phy_tx_rst(qsfp_3_tx_rst_4_int), - .phy_xgmii_txd(qsfp_3_txd_4_int), - .phy_xgmii_txc(qsfp_3_txc_4_int), - .phy_rx_clk(qsfp_3_rx_clk_4_int), - .phy_rx_rst(qsfp_3_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_3_rxd_4_int), - .phy_xgmii_rxc(qsfp_3_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_3_tx_clk_4_int), + .phy_4_tx_rst(qsfp_3_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_3_txd_4_int), + .phy_4_xgmii_txc(qsfp_3_txc_4_int), + .phy_4_rx_clk(qsfp_3_rx_clk_4_int), + .phy_4_rx_rst(qsfp_3_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_3_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_3_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_3_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 4 @@ -1171,196 +892,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_4_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_4_qpll0lock; -wire qsfp_4_qpll0outclk; -wire qsfp_4_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_4_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_4_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_4_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_4_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_4_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_4_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_4_tx_p), + .xcvr_txn(qsfp_4_tx_n), + .xcvr_rxp(qsfp_4_rx_p), + .xcvr_rxn(qsfp_4_rx_n), - // Serial data - .xcvr_txp(qsfp_4_tx_p[0]), - .xcvr_txn(qsfp_4_tx_n[0]), - .xcvr_rxp(qsfp_4_rx_p[0]), - .xcvr_rxn(qsfp_4_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_4_tx_clk_1_int), + .phy_1_tx_rst(qsfp_4_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_4_txd_1_int), + .phy_1_xgmii_txc(qsfp_4_txc_1_int), + .phy_1_rx_clk(qsfp_4_rx_clk_1_int), + .phy_1_rx_rst(qsfp_4_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_4_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_4_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_4_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_1_int), - .phy_tx_rst(qsfp_4_tx_rst_1_int), - .phy_xgmii_txd(qsfp_4_txd_1_int), - .phy_xgmii_txc(qsfp_4_txc_1_int), - .phy_rx_clk(qsfp_4_rx_clk_1_int), - .phy_rx_rst(qsfp_4_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_4_rxd_1_int), - .phy_xgmii_rxc(qsfp_4_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_4_tx_clk_2_int), + .phy_2_tx_rst(qsfp_4_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_4_txd_2_int), + .phy_2_xgmii_txc(qsfp_4_txc_2_int), + .phy_2_rx_clk(qsfp_4_rx_clk_2_int), + .phy_2_rx_rst(qsfp_4_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_4_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_4_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_4_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_4_tx_clk_3_int), + .phy_3_tx_rst(qsfp_4_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_4_txd_3_int), + .phy_3_xgmii_txc(qsfp_4_txc_3_int), + .phy_3_rx_clk(qsfp_4_rx_clk_3_int), + .phy_3_rx_rst(qsfp_4_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_4_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_4_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_4_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[1]), - .xcvr_txn(qsfp_4_tx_n[1]), - .xcvr_rxp(qsfp_4_rx_p[1]), - .xcvr_rxn(qsfp_4_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_2_int), - .phy_tx_rst(qsfp_4_tx_rst_2_int), - .phy_xgmii_txd(qsfp_4_txd_2_int), - .phy_xgmii_txc(qsfp_4_txc_2_int), - .phy_rx_clk(qsfp_4_rx_clk_2_int), - .phy_rx_rst(qsfp_4_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_4_rxd_2_int), - .phy_xgmii_rxc(qsfp_4_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[2]), - .xcvr_txn(qsfp_4_tx_n[2]), - .xcvr_rxp(qsfp_4_rx_p[2]), - .xcvr_rxn(qsfp_4_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_3_int), - .phy_tx_rst(qsfp_4_tx_rst_3_int), - .phy_xgmii_txd(qsfp_4_txd_3_int), - .phy_xgmii_txc(qsfp_4_txc_3_int), - .phy_rx_clk(qsfp_4_rx_clk_3_int), - .phy_rx_rst(qsfp_4_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_4_rxd_3_int), - .phy_xgmii_rxc(qsfp_4_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[3]), - .xcvr_txn(qsfp_4_tx_n[3]), - .xcvr_rxp(qsfp_4_rx_p[3]), - .xcvr_rxn(qsfp_4_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_4_int), - .phy_tx_rst(qsfp_4_tx_rst_4_int), - .phy_xgmii_txd(qsfp_4_txd_4_int), - .phy_xgmii_txc(qsfp_4_txc_4_int), - .phy_rx_clk(qsfp_4_rx_clk_4_int), - .phy_rx_rst(qsfp_4_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_4_rxd_4_int), - .phy_xgmii_rxc(qsfp_4_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_4_tx_clk_4_int), + .phy_4_tx_rst(qsfp_4_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_4_txd_4_int), + .phy_4_xgmii_txc(qsfp_4_txc_4_int), + .phy_4_rx_clk(qsfp_4_rx_clk_4_int), + .phy_4_rx_rst(qsfp_4_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_4_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_4_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_4_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 5 @@ -1414,196 +1042,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_5_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_5_qpll0lock; -wire qsfp_5_qpll0outclk; -wire qsfp_5_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_5_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_5_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_5_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_5_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_5_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_5_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_5_tx_p), + .xcvr_txn(qsfp_5_tx_n), + .xcvr_rxp(qsfp_5_rx_p), + .xcvr_rxn(qsfp_5_rx_n), - // Serial data - .xcvr_txp(qsfp_5_tx_p[0]), - .xcvr_txn(qsfp_5_tx_n[0]), - .xcvr_rxp(qsfp_5_rx_p[0]), - .xcvr_rxn(qsfp_5_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_5_tx_clk_1_int), + .phy_1_tx_rst(qsfp_5_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_5_txd_1_int), + .phy_1_xgmii_txc(qsfp_5_txc_1_int), + .phy_1_rx_clk(qsfp_5_rx_clk_1_int), + .phy_1_rx_rst(qsfp_5_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_5_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_5_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_5_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_1_int), - .phy_tx_rst(qsfp_5_tx_rst_1_int), - .phy_xgmii_txd(qsfp_5_txd_1_int), - .phy_xgmii_txc(qsfp_5_txc_1_int), - .phy_rx_clk(qsfp_5_rx_clk_1_int), - .phy_rx_rst(qsfp_5_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_5_rxd_1_int), - .phy_xgmii_rxc(qsfp_5_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_5_tx_clk_2_int), + .phy_2_tx_rst(qsfp_5_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_5_txd_2_int), + .phy_2_xgmii_txc(qsfp_5_txc_2_int), + .phy_2_rx_clk(qsfp_5_rx_clk_2_int), + .phy_2_rx_rst(qsfp_5_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_5_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_5_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_5_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_5_tx_clk_3_int), + .phy_3_tx_rst(qsfp_5_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_5_txd_3_int), + .phy_3_xgmii_txc(qsfp_5_txc_3_int), + .phy_3_rx_clk(qsfp_5_rx_clk_3_int), + .phy_3_rx_rst(qsfp_5_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_5_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_5_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_5_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[1]), - .xcvr_txn(qsfp_5_tx_n[1]), - .xcvr_rxp(qsfp_5_rx_p[1]), - .xcvr_rxn(qsfp_5_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_2_int), - .phy_tx_rst(qsfp_5_tx_rst_2_int), - .phy_xgmii_txd(qsfp_5_txd_2_int), - .phy_xgmii_txc(qsfp_5_txc_2_int), - .phy_rx_clk(qsfp_5_rx_clk_2_int), - .phy_rx_rst(qsfp_5_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_5_rxd_2_int), - .phy_xgmii_rxc(qsfp_5_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[2]), - .xcvr_txn(qsfp_5_tx_n[2]), - .xcvr_rxp(qsfp_5_rx_p[2]), - .xcvr_rxn(qsfp_5_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_3_int), - .phy_tx_rst(qsfp_5_tx_rst_3_int), - .phy_xgmii_txd(qsfp_5_txd_3_int), - .phy_xgmii_txc(qsfp_5_txc_3_int), - .phy_rx_clk(qsfp_5_rx_clk_3_int), - .phy_rx_rst(qsfp_5_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_5_rxd_3_int), - .phy_xgmii_rxc(qsfp_5_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[3]), - .xcvr_txn(qsfp_5_tx_n[3]), - .xcvr_rxp(qsfp_5_rx_p[3]), - .xcvr_rxn(qsfp_5_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_4_int), - .phy_tx_rst(qsfp_5_tx_rst_4_int), - .phy_xgmii_txd(qsfp_5_txd_4_int), - .phy_xgmii_txc(qsfp_5_txc_4_int), - .phy_rx_clk(qsfp_5_rx_clk_4_int), - .phy_rx_rst(qsfp_5_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_5_rxd_4_int), - .phy_xgmii_rxc(qsfp_5_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_5_tx_clk_4_int), + .phy_4_tx_rst(qsfp_5_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_5_txd_4_int), + .phy_4_xgmii_txc(qsfp_5_txc_4_int), + .phy_4_rx_clk(qsfp_5_rx_clk_4_int), + .phy_4_rx_rst(qsfp_5_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_5_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_5_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_5_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 6 @@ -1657,196 +1192,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_6_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_6_qpll0lock; -wire qsfp_6_qpll0outclk; -wire qsfp_6_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_6_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_6_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_6_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_6_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_6_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_6_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_6_tx_p), + .xcvr_txn(qsfp_6_tx_n), + .xcvr_rxp(qsfp_6_rx_p), + .xcvr_rxn(qsfp_6_rx_n), - // Serial data - .xcvr_txp(qsfp_6_tx_p[0]), - .xcvr_txn(qsfp_6_tx_n[0]), - .xcvr_rxp(qsfp_6_rx_p[0]), - .xcvr_rxn(qsfp_6_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_6_tx_clk_1_int), + .phy_1_tx_rst(qsfp_6_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_6_txd_1_int), + .phy_1_xgmii_txc(qsfp_6_txc_1_int), + .phy_1_rx_clk(qsfp_6_rx_clk_1_int), + .phy_1_rx_rst(qsfp_6_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_6_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_6_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_6_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_1_int), - .phy_tx_rst(qsfp_6_tx_rst_1_int), - .phy_xgmii_txd(qsfp_6_txd_1_int), - .phy_xgmii_txc(qsfp_6_txc_1_int), - .phy_rx_clk(qsfp_6_rx_clk_1_int), - .phy_rx_rst(qsfp_6_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_6_rxd_1_int), - .phy_xgmii_rxc(qsfp_6_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_6_tx_clk_2_int), + .phy_2_tx_rst(qsfp_6_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_6_txd_2_int), + .phy_2_xgmii_txc(qsfp_6_txc_2_int), + .phy_2_rx_clk(qsfp_6_rx_clk_2_int), + .phy_2_rx_rst(qsfp_6_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_6_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_6_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_6_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_6_tx_clk_3_int), + .phy_3_tx_rst(qsfp_6_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_6_txd_3_int), + .phy_3_xgmii_txc(qsfp_6_txc_3_int), + .phy_3_rx_clk(qsfp_6_rx_clk_3_int), + .phy_3_rx_rst(qsfp_6_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_6_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_6_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_6_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[1]), - .xcvr_txn(qsfp_6_tx_n[1]), - .xcvr_rxp(qsfp_6_rx_p[1]), - .xcvr_rxn(qsfp_6_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_2_int), - .phy_tx_rst(qsfp_6_tx_rst_2_int), - .phy_xgmii_txd(qsfp_6_txd_2_int), - .phy_xgmii_txc(qsfp_6_txc_2_int), - .phy_rx_clk(qsfp_6_rx_clk_2_int), - .phy_rx_rst(qsfp_6_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_6_rxd_2_int), - .phy_xgmii_rxc(qsfp_6_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[2]), - .xcvr_txn(qsfp_6_tx_n[2]), - .xcvr_rxp(qsfp_6_rx_p[2]), - .xcvr_rxn(qsfp_6_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_3_int), - .phy_tx_rst(qsfp_6_tx_rst_3_int), - .phy_xgmii_txd(qsfp_6_txd_3_int), - .phy_xgmii_txc(qsfp_6_txc_3_int), - .phy_rx_clk(qsfp_6_rx_clk_3_int), - .phy_rx_rst(qsfp_6_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_6_rxd_3_int), - .phy_xgmii_rxc(qsfp_6_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[3]), - .xcvr_txn(qsfp_6_tx_n[3]), - .xcvr_rxp(qsfp_6_rx_p[3]), - .xcvr_rxn(qsfp_6_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_4_int), - .phy_tx_rst(qsfp_6_tx_rst_4_int), - .phy_xgmii_txd(qsfp_6_txd_4_int), - .phy_xgmii_txc(qsfp_6_txc_4_int), - .phy_rx_clk(qsfp_6_rx_clk_4_int), - .phy_rx_rst(qsfp_6_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_6_rxd_4_int), - .phy_xgmii_rxc(qsfp_6_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_6_tx_clk_4_int), + .phy_4_tx_rst(qsfp_6_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_6_txd_4_int), + .phy_4_xgmii_txc(qsfp_6_txc_4_int), + .phy_4_rx_clk(qsfp_6_rx_clk_4_int), + .phy_4_rx_rst(qsfp_6_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_6_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_6_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_6_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 7 @@ -1900,196 +1342,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_7_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_7_qpll0lock; -wire qsfp_7_qpll0outclk; -wire qsfp_7_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_7_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_7_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_7_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_7_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_7_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_7_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_7_tx_p), + .xcvr_txn(qsfp_7_tx_n), + .xcvr_rxp(qsfp_7_rx_p), + .xcvr_rxn(qsfp_7_rx_n), - // Serial data - .xcvr_txp(qsfp_7_tx_p[0]), - .xcvr_txn(qsfp_7_tx_n[0]), - .xcvr_rxp(qsfp_7_rx_p[0]), - .xcvr_rxn(qsfp_7_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_7_tx_clk_1_int), + .phy_1_tx_rst(qsfp_7_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_7_txd_1_int), + .phy_1_xgmii_txc(qsfp_7_txc_1_int), + .phy_1_rx_clk(qsfp_7_rx_clk_1_int), + .phy_1_rx_rst(qsfp_7_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_7_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_7_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_7_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_1_int), - .phy_tx_rst(qsfp_7_tx_rst_1_int), - .phy_xgmii_txd(qsfp_7_txd_1_int), - .phy_xgmii_txc(qsfp_7_txc_1_int), - .phy_rx_clk(qsfp_7_rx_clk_1_int), - .phy_rx_rst(qsfp_7_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_7_rxd_1_int), - .phy_xgmii_rxc(qsfp_7_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_7_tx_clk_2_int), + .phy_2_tx_rst(qsfp_7_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_7_txd_2_int), + .phy_2_xgmii_txc(qsfp_7_txc_2_int), + .phy_2_rx_clk(qsfp_7_rx_clk_2_int), + .phy_2_rx_rst(qsfp_7_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_7_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_7_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_7_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_7_tx_clk_3_int), + .phy_3_tx_rst(qsfp_7_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_7_txd_3_int), + .phy_3_xgmii_txc(qsfp_7_txc_3_int), + .phy_3_rx_clk(qsfp_7_rx_clk_3_int), + .phy_3_rx_rst(qsfp_7_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_7_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_7_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_7_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[1]), - .xcvr_txn(qsfp_7_tx_n[1]), - .xcvr_rxp(qsfp_7_rx_p[1]), - .xcvr_rxn(qsfp_7_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_2_int), - .phy_tx_rst(qsfp_7_tx_rst_2_int), - .phy_xgmii_txd(qsfp_7_txd_2_int), - .phy_xgmii_txc(qsfp_7_txc_2_int), - .phy_rx_clk(qsfp_7_rx_clk_2_int), - .phy_rx_rst(qsfp_7_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_7_rxd_2_int), - .phy_xgmii_rxc(qsfp_7_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[2]), - .xcvr_txn(qsfp_7_tx_n[2]), - .xcvr_rxp(qsfp_7_rx_p[2]), - .xcvr_rxn(qsfp_7_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_3_int), - .phy_tx_rst(qsfp_7_tx_rst_3_int), - .phy_xgmii_txd(qsfp_7_txd_3_int), - .phy_xgmii_txc(qsfp_7_txc_3_int), - .phy_rx_clk(qsfp_7_rx_clk_3_int), - .phy_rx_rst(qsfp_7_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_7_rxd_3_int), - .phy_xgmii_rxc(qsfp_7_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[3]), - .xcvr_txn(qsfp_7_tx_n[3]), - .xcvr_rxp(qsfp_7_rx_p[3]), - .xcvr_rxn(qsfp_7_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_4_int), - .phy_tx_rst(qsfp_7_tx_rst_4_int), - .phy_xgmii_txd(qsfp_7_txd_4_int), - .phy_xgmii_txc(qsfp_7_txc_4_int), - .phy_rx_clk(qsfp_7_rx_clk_4_int), - .phy_rx_rst(qsfp_7_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_7_rxd_4_int), - .phy_xgmii_rxc(qsfp_7_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_7_tx_clk_4_int), + .phy_4_tx_rst(qsfp_7_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_7_txd_4_int), + .phy_4_xgmii_txc(qsfp_7_txc_4_int), + .phy_4_rx_clk(qsfp_7_rx_clk_4_int), + .phy_4_rx_rst(qsfp_7_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_7_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_7_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_7_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 8 @@ -2143,196 +1492,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_8_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_8_qpll0lock; -wire qsfp_8_qpll0outclk; -wire qsfp_8_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_8_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_8_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_8_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_8_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_8_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_8_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_8_tx_p), + .xcvr_txn(qsfp_8_tx_n), + .xcvr_rxp(qsfp_8_rx_p), + .xcvr_rxn(qsfp_8_rx_n), - // Serial data - .xcvr_txp(qsfp_8_tx_p[0]), - .xcvr_txn(qsfp_8_tx_n[0]), - .xcvr_rxp(qsfp_8_rx_p[0]), - .xcvr_rxn(qsfp_8_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_8_tx_clk_1_int), + .phy_1_tx_rst(qsfp_8_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_8_txd_1_int), + .phy_1_xgmii_txc(qsfp_8_txc_1_int), + .phy_1_rx_clk(qsfp_8_rx_clk_1_int), + .phy_1_rx_rst(qsfp_8_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_8_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_8_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_8_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_1_int), - .phy_tx_rst(qsfp_8_tx_rst_1_int), - .phy_xgmii_txd(qsfp_8_txd_1_int), - .phy_xgmii_txc(qsfp_8_txc_1_int), - .phy_rx_clk(qsfp_8_rx_clk_1_int), - .phy_rx_rst(qsfp_8_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_8_rxd_1_int), - .phy_xgmii_rxc(qsfp_8_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_8_tx_clk_2_int), + .phy_2_tx_rst(qsfp_8_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_8_txd_2_int), + .phy_2_xgmii_txc(qsfp_8_txc_2_int), + .phy_2_rx_clk(qsfp_8_rx_clk_2_int), + .phy_2_rx_rst(qsfp_8_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_8_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_8_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_8_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_8_tx_clk_3_int), + .phy_3_tx_rst(qsfp_8_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_8_txd_3_int), + .phy_3_xgmii_txc(qsfp_8_txc_3_int), + .phy_3_rx_clk(qsfp_8_rx_clk_3_int), + .phy_3_rx_rst(qsfp_8_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_8_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_8_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_8_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[1]), - .xcvr_txn(qsfp_8_tx_n[1]), - .xcvr_rxp(qsfp_8_rx_p[1]), - .xcvr_rxn(qsfp_8_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_2_int), - .phy_tx_rst(qsfp_8_tx_rst_2_int), - .phy_xgmii_txd(qsfp_8_txd_2_int), - .phy_xgmii_txc(qsfp_8_txc_2_int), - .phy_rx_clk(qsfp_8_rx_clk_2_int), - .phy_rx_rst(qsfp_8_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_8_rxd_2_int), - .phy_xgmii_rxc(qsfp_8_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[2]), - .xcvr_txn(qsfp_8_tx_n[2]), - .xcvr_rxp(qsfp_8_rx_p[2]), - .xcvr_rxn(qsfp_8_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_3_int), - .phy_tx_rst(qsfp_8_tx_rst_3_int), - .phy_xgmii_txd(qsfp_8_txd_3_int), - .phy_xgmii_txc(qsfp_8_txc_3_int), - .phy_rx_clk(qsfp_8_rx_clk_3_int), - .phy_rx_rst(qsfp_8_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_8_rxd_3_int), - .phy_xgmii_rxc(qsfp_8_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[3]), - .xcvr_txn(qsfp_8_tx_n[3]), - .xcvr_rxp(qsfp_8_rx_p[3]), - .xcvr_rxn(qsfp_8_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_4_int), - .phy_tx_rst(qsfp_8_tx_rst_4_int), - .phy_xgmii_txd(qsfp_8_txd_4_int), - .phy_xgmii_txc(qsfp_8_txc_4_int), - .phy_rx_clk(qsfp_8_rx_clk_4_int), - .phy_rx_rst(qsfp_8_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_8_rxd_4_int), - .phy_xgmii_rxc(qsfp_8_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_8_tx_clk_4_int), + .phy_4_tx_rst(qsfp_8_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_8_txd_4_int), + .phy_4_xgmii_txc(qsfp_8_txc_4_int), + .phy_4_rx_clk(qsfp_8_rx_clk_4_int), + .phy_4_rx_rst(qsfp_8_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_8_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_8_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_8_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 9 @@ -2386,196 +1642,103 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_9_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_9_qpll0lock; -wire qsfp_9_qpll0outclk; -wire qsfp_9_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_9_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_9_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_9_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_9_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_9_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_9_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_9_tx_p), + .xcvr_txn(qsfp_9_tx_n), + .xcvr_rxp(qsfp_9_rx_p), + .xcvr_rxn(qsfp_9_rx_n), - // Serial data - .xcvr_txp(qsfp_9_tx_p[0]), - .xcvr_txn(qsfp_9_tx_n[0]), - .xcvr_rxp(qsfp_9_rx_p[0]), - .xcvr_rxn(qsfp_9_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_9_tx_clk_1_int), + .phy_1_tx_rst(qsfp_9_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_9_txd_1_int), + .phy_1_xgmii_txc(qsfp_9_txc_1_int), + .phy_1_rx_clk(qsfp_9_rx_clk_1_int), + .phy_1_rx_rst(qsfp_9_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_9_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_9_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_9_rx_block_lock_1), + .phy_1_rx_high_ber(), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_1_int), - .phy_tx_rst(qsfp_9_tx_rst_1_int), - .phy_xgmii_txd(qsfp_9_txd_1_int), - .phy_xgmii_txc(qsfp_9_txc_1_int), - .phy_rx_clk(qsfp_9_rx_clk_1_int), - .phy_rx_rst(qsfp_9_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_9_rxd_1_int), - .phy_xgmii_rxc(qsfp_9_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_9_tx_clk_2_int), + .phy_2_tx_rst(qsfp_9_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_9_txd_2_int), + .phy_2_xgmii_txc(qsfp_9_txc_2_int), + .phy_2_rx_clk(qsfp_9_rx_clk_2_int), + .phy_2_rx_rst(qsfp_9_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_9_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_9_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_9_rx_block_lock_2), + .phy_2_rx_high_ber(), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_9_tx_clk_3_int), + .phy_3_tx_rst(qsfp_9_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_9_txd_3_int), + .phy_3_xgmii_txc(qsfp_9_txc_3_int), + .phy_3_rx_clk(qsfp_9_rx_clk_3_int), + .phy_3_rx_rst(qsfp_9_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_9_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_9_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_9_rx_block_lock_3), + .phy_3_rx_high_ber(), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[1]), - .xcvr_txn(qsfp_9_tx_n[1]), - .xcvr_rxp(qsfp_9_rx_p[1]), - .xcvr_rxn(qsfp_9_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_2_int), - .phy_tx_rst(qsfp_9_tx_rst_2_int), - .phy_xgmii_txd(qsfp_9_txd_2_int), - .phy_xgmii_txc(qsfp_9_txc_2_int), - .phy_rx_clk(qsfp_9_rx_clk_2_int), - .phy_rx_rst(qsfp_9_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_9_rxd_2_int), - .phy_xgmii_rxc(qsfp_9_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[2]), - .xcvr_txn(qsfp_9_tx_n[2]), - .xcvr_rxp(qsfp_9_rx_p[2]), - .xcvr_rxn(qsfp_9_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_3_int), - .phy_tx_rst(qsfp_9_tx_rst_3_int), - .phy_xgmii_txd(qsfp_9_txd_3_int), - .phy_xgmii_txc(qsfp_9_txc_3_int), - .phy_rx_clk(qsfp_9_rx_clk_3_int), - .phy_rx_rst(qsfp_9_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_9_rxd_3_int), - .phy_xgmii_rxc(qsfp_9_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[3]), - .xcvr_txn(qsfp_9_tx_n[3]), - .xcvr_rxp(qsfp_9_rx_p[3]), - .xcvr_rxn(qsfp_9_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_4_int), - .phy_tx_rst(qsfp_9_tx_rst_4_int), - .phy_xgmii_txd(qsfp_9_txd_4_int), - .phy_xgmii_txc(qsfp_9_txc_4_int), - .phy_rx_clk(qsfp_9_rx_clk_4_int), - .phy_rx_rst(qsfp_9_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_9_rxd_4_int), - .phy_xgmii_rxc(qsfp_9_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_9_tx_clk_4_int), + .phy_4_tx_rst(qsfp_9_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_9_txd_4_int), + .phy_4_xgmii_txc(qsfp_9_txc_4_int), + .phy_4_rx_clk(qsfp_9_rx_clk_4_int), + .phy_4_rx_rst(qsfp_9_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_9_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_9_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_9_rx_block_lock_4), + .phy_4_rx_high_ber(), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); fpga_core diff --git a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga/Makefile b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga/Makefile index 578e97b42..1ec3cbda9 100644 --- a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga/Makefile +++ b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga/Makefile @@ -8,6 +8,7 @@ FPGA_ARCH = virtexuplus SYN_FILES = rtl/fpga.v SYN_FILES += rtl/fpga_core.v SYN_FILES += rtl/eth_xcvr_phy_wrapper.v +SYN_FILES += rtl/eth_xcvr_phy_quad_wrapper.v SYN_FILES += rtl/debounce_switch.v SYN_FILES += rtl/sync_signal.v SYN_FILES += rtl/i2c_master.v diff --git a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga_10g/Makefile b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga_10g/Makefile index 578e97b42..1ec3cbda9 100644 --- a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga_10g/Makefile +++ b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga_10g/Makefile @@ -8,6 +8,7 @@ FPGA_ARCH = virtexuplus SYN_FILES = rtl/fpga.v SYN_FILES += rtl/fpga_core.v SYN_FILES += rtl/eth_xcvr_phy_wrapper.v +SYN_FILES += rtl/eth_xcvr_phy_quad_wrapper.v SYN_FILES += rtl/debounce_switch.v SYN_FILES += rtl/sync_signal.v SYN_FILES += rtl/i2c_master.v diff --git a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_quad_wrapper.v b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_quad_wrapper.v new file mode 100644 index 000000000..c910d7906 --- /dev/null +++ b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_quad_wrapper.v @@ -0,0 +1,395 @@ +/* + +Copyright (c) 2023 Alex Forencich + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +*/ + +// Language: Verilog 2001 + +`resetall +`timescale 1ns / 1ps +`default_nettype none + +/* + * Transceiver and PHY quad wrapper + */ +module eth_xcvr_phy_quad_wrapper # +( + parameter COUNT = 4, + parameter DATA_WIDTH = 64, + parameter CTRL_WIDTH = (DATA_WIDTH/8), + parameter HDR_WIDTH = 2, + parameter PRBS31_ENABLE = 0, + parameter TX_SERDES_PIPELINE = 0, + parameter RX_SERDES_PIPELINE = 0, + parameter BITSLIP_HIGH_CYCLES = 1, + parameter BITSLIP_LOW_CYCLES = 8, + parameter COUNT_125US = 125000/6.4 +) +( + input wire xcvr_ctrl_clk, + input wire xcvr_ctrl_rst, + + /* + * Common + */ + output wire xcvr_gtpowergood_out, + + /* + * PLL + */ + input wire xcvr_gtrefclk00_in, + + /* + * Serial data + */ + output wire [COUNT-1:0] xcvr_txp, + output wire [COUNT-1:0] xcvr_txn, + input wire [COUNT-1:0] xcvr_rxp, + input wire [COUNT-1:0] xcvr_rxn, + + /* + * PHY connections + */ + output wire phy_1_tx_clk, + output wire phy_1_tx_rst, + input wire [DATA_WIDTH-1:0] phy_1_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_1_xgmii_txc, + output wire phy_1_rx_clk, + output wire phy_1_rx_rst, + output wire [DATA_WIDTH-1:0] phy_1_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_1_xgmii_rxc, + output wire phy_1_tx_bad_block, + output wire [6:0] phy_1_rx_error_count, + output wire phy_1_rx_bad_block, + output wire phy_1_rx_sequence_error, + output wire phy_1_rx_block_lock, + output wire phy_1_rx_high_ber, + output wire phy_1_rx_status, + input wire phy_1_cfg_tx_prbs31_enable, + input wire phy_1_cfg_rx_prbs31_enable, + + output wire phy_2_tx_clk, + output wire phy_2_tx_rst, + input wire [DATA_WIDTH-1:0] phy_2_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_2_xgmii_txc, + output wire phy_2_rx_clk, + output wire phy_2_rx_rst, + output wire [DATA_WIDTH-1:0] phy_2_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_2_xgmii_rxc, + output wire phy_2_tx_bad_block, + output wire [6:0] phy_2_rx_error_count, + output wire phy_2_rx_bad_block, + output wire phy_2_rx_sequence_error, + output wire phy_2_rx_block_lock, + output wire phy_2_rx_high_ber, + output wire phy_2_rx_status, + input wire phy_2_cfg_tx_prbs31_enable, + input wire phy_2_cfg_rx_prbs31_enable, + + output wire phy_3_tx_clk, + output wire phy_3_tx_rst, + input wire [DATA_WIDTH-1:0] phy_3_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_3_xgmii_txc, + output wire phy_3_rx_clk, + output wire phy_3_rx_rst, + output wire [DATA_WIDTH-1:0] phy_3_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_3_xgmii_rxc, + output wire phy_3_tx_bad_block, + output wire [6:0] phy_3_rx_error_count, + output wire phy_3_rx_bad_block, + output wire phy_3_rx_sequence_error, + output wire phy_3_rx_block_lock, + output wire phy_3_rx_high_ber, + output wire phy_3_rx_status, + input wire phy_3_cfg_tx_prbs31_enable, + input wire phy_3_cfg_rx_prbs31_enable, + + output wire phy_4_tx_clk, + output wire phy_4_tx_rst, + input wire [DATA_WIDTH-1:0] phy_4_xgmii_txd, + input wire [CTRL_WIDTH-1:0] phy_4_xgmii_txc, + output wire phy_4_rx_clk, + output wire phy_4_rx_rst, + output wire [DATA_WIDTH-1:0] phy_4_xgmii_rxd, + output wire [CTRL_WIDTH-1:0] phy_4_xgmii_rxc, + output wire phy_4_tx_bad_block, + output wire [6:0] phy_4_rx_error_count, + output wire phy_4_rx_bad_block, + output wire phy_4_rx_sequence_error, + output wire phy_4_rx_block_lock, + output wire phy_4_rx_high_ber, + output wire phy_4_rx_status, + input wire phy_4_cfg_tx_prbs31_enable, + input wire phy_4_cfg_rx_prbs31_enable +); + +generate + +wire xcvr_qpll0lock; +wire xcvr_qpll0clk; +wire xcvr_qpll0refclk; + +if (COUNT > 0) begin : phy1 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(1), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_1 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(xcvr_gtpowergood_out), + + // PLL out + .xcvr_gtrefclk00_in(xcvr_gtrefclk00_in), + .xcvr_qpll0lock_out(xcvr_qpll0lock), + .xcvr_qpll0clk_out(xcvr_qpll0clk), + .xcvr_qpll0refclk_out(xcvr_qpll0refclk), + + // PLL in + .xcvr_qpll0lock_in(1'b0), + .xcvr_qpll0clk_in(1'b0), + .xcvr_qpll0refclk_in(1'b0), + + // Serial data + .xcvr_txp(xcvr_txp[0]), + .xcvr_txn(xcvr_txn[0]), + .xcvr_rxp(xcvr_rxp[0]), + .xcvr_rxn(xcvr_rxn[0]), + + // PHY connections + .phy_tx_clk(phy_1_tx_clk), + .phy_tx_rst(phy_1_tx_rst), + .phy_xgmii_txd(phy_1_xgmii_txd), + .phy_xgmii_txc(phy_1_xgmii_txc), + .phy_rx_clk(phy_1_rx_clk), + .phy_rx_rst(phy_1_rx_rst), + .phy_xgmii_rxd(phy_1_xgmii_rxd), + .phy_xgmii_rxc(phy_1_xgmii_rxc), + .phy_tx_bad_block(phy_1_tx_bad_block), + .phy_rx_error_count(phy_1_rx_error_count), + .phy_rx_bad_block(phy_1_rx_bad_block), + .phy_rx_sequence_error(phy_1_rx_sequence_error), + .phy_rx_block_lock(phy_1_rx_block_lock), + .phy_rx_high_ber(phy_1_rx_high_ber), + .phy_rx_status(phy_1_rx_status), + .phy_cfg_tx_prbs31_enable(phy_1_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_1_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 1) begin : phy2 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_2 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[1]), + .xcvr_txn(xcvr_txn[1]), + .xcvr_rxp(xcvr_rxp[1]), + .xcvr_rxn(xcvr_rxn[1]), + + // PHY connections + .phy_tx_clk(phy_2_tx_clk), + .phy_tx_rst(phy_2_tx_rst), + .phy_xgmii_txd(phy_2_xgmii_txd), + .phy_xgmii_txc(phy_2_xgmii_txc), + .phy_rx_clk(phy_2_rx_clk), + .phy_rx_rst(phy_2_rx_rst), + .phy_xgmii_rxd(phy_2_xgmii_rxd), + .phy_xgmii_rxc(phy_2_xgmii_rxc), + .phy_tx_bad_block(phy_2_tx_bad_block), + .phy_rx_error_count(phy_2_rx_error_count), + .phy_rx_bad_block(phy_2_rx_bad_block), + .phy_rx_sequence_error(phy_2_rx_sequence_error), + .phy_rx_block_lock(phy_2_rx_block_lock), + .phy_rx_high_ber(phy_2_rx_high_ber), + .phy_rx_status(phy_2_rx_status), + .phy_cfg_tx_prbs31_enable(phy_2_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_2_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 2) begin : phy3 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_3 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[2]), + .xcvr_txn(xcvr_txn[2]), + .xcvr_rxp(xcvr_rxp[2]), + .xcvr_rxn(xcvr_rxn[2]), + + // PHY connections + .phy_tx_clk(phy_3_tx_clk), + .phy_tx_rst(phy_3_tx_rst), + .phy_xgmii_txd(phy_3_xgmii_txd), + .phy_xgmii_txc(phy_3_xgmii_txc), + .phy_rx_clk(phy_3_rx_clk), + .phy_rx_rst(phy_3_rx_rst), + .phy_xgmii_rxd(phy_3_xgmii_rxd), + .phy_xgmii_rxc(phy_3_xgmii_rxc), + .phy_tx_bad_block(phy_3_tx_bad_block), + .phy_rx_error_count(phy_3_rx_error_count), + .phy_rx_bad_block(phy_3_rx_bad_block), + .phy_rx_sequence_error(phy_3_rx_sequence_error), + .phy_rx_block_lock(phy_3_rx_block_lock), + .phy_rx_high_ber(phy_3_rx_high_ber), + .phy_rx_status(phy_3_rx_status), + .phy_cfg_tx_prbs31_enable(phy_3_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_3_cfg_rx_prbs31_enable) + ); + +end + +if (COUNT > 3) begin : phy4 + + eth_xcvr_phy_wrapper #( + .HAS_COMMON(0), + .DATA_WIDTH(DATA_WIDTH), + .CTRL_WIDTH(CTRL_WIDTH), + .HDR_WIDTH(HDR_WIDTH), + .PRBS31_ENABLE(PRBS31_ENABLE), + .TX_SERDES_PIPELINE(TX_SERDES_PIPELINE), + .RX_SERDES_PIPELINE(RX_SERDES_PIPELINE), + .BITSLIP_HIGH_CYCLES(BITSLIP_HIGH_CYCLES), + .BITSLIP_LOW_CYCLES(BITSLIP_LOW_CYCLES), + .COUNT_125US(COUNT_125US) + ) + eth_xcvr_phy_4 ( + .xcvr_ctrl_clk(xcvr_ctrl_clk), + .xcvr_ctrl_rst(xcvr_ctrl_rst), + + // Common + .xcvr_gtpowergood_out(), + + // PLL out + .xcvr_gtrefclk00_in(1'b0), + .xcvr_qpll0lock_out(), + .xcvr_qpll0clk_out(), + .xcvr_qpll0refclk_out(), + + // PLL in + .xcvr_qpll0lock_in(xcvr_qpll0lock), + .xcvr_qpll0clk_in(xcvr_qpll0clk), + .xcvr_qpll0refclk_in(xcvr_qpll0refclk), + + // Serial data + .xcvr_txp(xcvr_txp[3]), + .xcvr_txn(xcvr_txn[3]), + .xcvr_rxp(xcvr_rxp[3]), + .xcvr_rxn(xcvr_rxn[3]), + + // PHY connections + .phy_tx_clk(phy_4_tx_clk), + .phy_tx_rst(phy_4_tx_rst), + .phy_xgmii_txd(phy_4_xgmii_txd), + .phy_xgmii_txc(phy_4_xgmii_txc), + .phy_rx_clk(phy_4_rx_clk), + .phy_rx_rst(phy_4_rx_rst), + .phy_xgmii_rxd(phy_4_xgmii_rxd), + .phy_xgmii_rxc(phy_4_xgmii_rxc), + .phy_tx_bad_block(phy_4_tx_bad_block), + .phy_rx_error_count(phy_4_rx_error_count), + .phy_rx_bad_block(phy_4_rx_bad_block), + .phy_rx_sequence_error(phy_4_rx_sequence_error), + .phy_rx_block_lock(phy_4_rx_block_lock), + .phy_rx_high_ber(phy_4_rx_high_ber), + .phy_rx_status(phy_4_rx_status), + .phy_cfg_tx_prbs31_enable(phy_4_cfg_tx_prbs31_enable), + .phy_cfg_rx_prbs31_enable(phy_4_cfg_rx_prbs31_enable) + ); + +end + +endgenerate + +endmodule + +`resetall diff --git a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_wrapper.v b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_wrapper.v index c898dcabe..0d1142eb6 100644 --- a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_wrapper.v +++ b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/eth_xcvr_phy_wrapper.v @@ -1,6 +1,6 @@ /* -Copyright (c) 2021 Alex Forencich +Copyright (c) 2021-2023 Alex Forencich Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal @@ -58,8 +58,8 @@ module eth_xcvr_phy_wrapper # */ input wire xcvr_gtrefclk00_in, output wire xcvr_qpll0lock_out, - output wire xcvr_qpll0outclk_out, - output wire xcvr_qpll0outrefclk_out, + output wire xcvr_qpll0clk_out, + output wire xcvr_qpll0refclk_out, /* * PLL in @@ -94,6 +94,7 @@ module eth_xcvr_phy_wrapper # output wire phy_rx_sequence_error, output wire phy_rx_block_lock, output wire phy_rx_high_ber, + output wire phy_rx_status, input wire phy_cfg_tx_prbs31_enable, input wire phy_cfg_rx_prbs31_enable ); @@ -128,8 +129,8 @@ if (HAS_COMMON) begin : xcvr // PLL .gtrefclk00_in(xcvr_gtrefclk00_in), .qpll0lock_out(xcvr_qpll0lock_out), - .qpll0outclk_out(xcvr_qpll0outclk_out), - .qpll0outrefclk_out(xcvr_qpll0outrefclk_out), + .qpll0outclk_out(xcvr_qpll0clk_out), + .qpll0outrefclk_out(xcvr_qpll0refclk_out), // Serial data .gtytxp_out(xcvr_txp), @@ -174,6 +175,8 @@ if (HAS_COMMON) begin : xcvr .rxstartofseq_out() ); + assign xcvr_qpll0reset_out = 1'b0; + end else begin : xcvr eth_xcvr_gt_channel @@ -234,6 +237,10 @@ end else begin : xcvr .rxstartofseq_out() ); + assign xcvr_qpll0lock_out = 1'b0; + assign xcvr_qpll0clk_out = 1'b0; + assign xcvr_qpll0refclk_out = 1'b0; + end endgenerate @@ -290,6 +297,7 @@ phy_inst ( .rx_sequence_error(phy_rx_sequence_error), .rx_block_lock(phy_rx_block_lock), .rx_high_ber(phy_rx_high_ber), + .rx_status(phy_rx_status), .cfg_tx_prbs31_enable(phy_cfg_tx_prbs31_enable), .cfg_rx_prbs31_enable(phy_cfg_rx_prbs31_enable) ); diff --git a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/fpga.v b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/fpga.v index 8fa8b2978..2b0110227 100644 --- a/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/fpga.v +++ b/example/HTG9200/fpga_fmc_htg_6qsfp_25g/rtl/fpga.v @@ -554,196 +554,99 @@ OBUFDS obufds_fmc_refclk_inst ( .OB(fmc_sync_c2m_n) ); -wire qsfp_1_qpll0lock; -wire qsfp_1_qpll0outclk; -wire qsfp_1_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_1_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_1_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(qsfp_1_gtpowergood), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_1_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_1_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_1_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_1_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_1_tx_p), + .xcvr_txn(qsfp_1_tx_n), + .xcvr_rxp(qsfp_1_rx_p), + .xcvr_rxn(qsfp_1_rx_n), - // Serial data - .xcvr_txp(qsfp_1_tx_p[0]), - .xcvr_txn(qsfp_1_tx_n[0]), - .xcvr_rxp(qsfp_1_rx_p[0]), - .xcvr_rxn(qsfp_1_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_1_tx_clk_1_int), + .phy_1_tx_rst(qsfp_1_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_1_txd_1_int), + .phy_1_xgmii_txc(qsfp_1_txc_1_int), + .phy_1_rx_clk(qsfp_1_rx_clk_1_int), + .phy_1_rx_rst(qsfp_1_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_1_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_1_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_1_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_1_int), - .phy_tx_rst(qsfp_1_tx_rst_1_int), - .phy_xgmii_txd(qsfp_1_txd_1_int), - .phy_xgmii_txc(qsfp_1_txc_1_int), - .phy_rx_clk(qsfp_1_rx_clk_1_int), - .phy_rx_rst(qsfp_1_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_1_rxd_1_int), - .phy_xgmii_rxc(qsfp_1_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_1_tx_clk_2_int), + .phy_2_tx_rst(qsfp_1_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_1_txd_2_int), + .phy_2_xgmii_txc(qsfp_1_txc_2_int), + .phy_2_rx_clk(qsfp_1_rx_clk_2_int), + .phy_2_rx_rst(qsfp_1_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_1_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_1_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_1_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_1_tx_clk_3_int), + .phy_3_tx_rst(qsfp_1_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_1_txd_3_int), + .phy_3_xgmii_txc(qsfp_1_txc_3_int), + .phy_3_rx_clk(qsfp_1_rx_clk_3_int), + .phy_3_rx_rst(qsfp_1_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_1_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_1_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_1_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[1]), - .xcvr_txn(qsfp_1_tx_n[1]), - .xcvr_rxp(qsfp_1_rx_p[1]), - .xcvr_rxn(qsfp_1_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_2_int), - .phy_tx_rst(qsfp_1_tx_rst_2_int), - .phy_xgmii_txd(qsfp_1_txd_2_int), - .phy_xgmii_txc(qsfp_1_txc_2_int), - .phy_rx_clk(qsfp_1_rx_clk_2_int), - .phy_rx_rst(qsfp_1_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_1_rxd_2_int), - .phy_xgmii_rxc(qsfp_1_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[2]), - .xcvr_txn(qsfp_1_tx_n[2]), - .xcvr_rxp(qsfp_1_rx_p[2]), - .xcvr_rxn(qsfp_1_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_3_int), - .phy_tx_rst(qsfp_1_tx_rst_3_int), - .phy_xgmii_txd(qsfp_1_txd_3_int), - .phy_xgmii_txc(qsfp_1_txc_3_int), - .phy_rx_clk(qsfp_1_rx_clk_3_int), - .phy_rx_rst(qsfp_1_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_1_rxd_3_int), - .phy_xgmii_rxc(qsfp_1_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_1_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_1_tx_p[3]), - .xcvr_txn(qsfp_1_tx_n[3]), - .xcvr_rxp(qsfp_1_rx_p[3]), - .xcvr_rxn(qsfp_1_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_1_tx_clk_4_int), - .phy_tx_rst(qsfp_1_tx_rst_4_int), - .phy_xgmii_txd(qsfp_1_txd_4_int), - .phy_xgmii_txc(qsfp_1_txc_4_int), - .phy_rx_clk(qsfp_1_rx_clk_4_int), - .phy_rx_rst(qsfp_1_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_1_rxd_4_int), - .phy_xgmii_rxc(qsfp_1_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_1_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_1_tx_clk_4_int), + .phy_4_tx_rst(qsfp_1_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_1_txd_4_int), + .phy_4_xgmii_txc(qsfp_1_txc_4_int), + .phy_4_rx_clk(qsfp_1_rx_clk_4_int), + .phy_4_rx_rst(qsfp_1_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_1_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_1_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_1_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 2 @@ -797,196 +700,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_2_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_2_qpll0lock; -wire qsfp_2_qpll0outclk; -wire qsfp_2_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_2_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_2_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_2_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_2_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_2_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_2_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_2_tx_p), + .xcvr_txn(qsfp_2_tx_n), + .xcvr_rxp(qsfp_2_rx_p), + .xcvr_rxn(qsfp_2_rx_n), - // Serial data - .xcvr_txp(qsfp_2_tx_p[0]), - .xcvr_txn(qsfp_2_tx_n[0]), - .xcvr_rxp(qsfp_2_rx_p[0]), - .xcvr_rxn(qsfp_2_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_2_tx_clk_1_int), + .phy_1_tx_rst(qsfp_2_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_2_txd_1_int), + .phy_1_xgmii_txc(qsfp_2_txc_1_int), + .phy_1_rx_clk(qsfp_2_rx_clk_1_int), + .phy_1_rx_rst(qsfp_2_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_2_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_2_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_2_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_1_int), - .phy_tx_rst(qsfp_2_tx_rst_1_int), - .phy_xgmii_txd(qsfp_2_txd_1_int), - .phy_xgmii_txc(qsfp_2_txc_1_int), - .phy_rx_clk(qsfp_2_rx_clk_1_int), - .phy_rx_rst(qsfp_2_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_2_rxd_1_int), - .phy_xgmii_rxc(qsfp_2_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_2_tx_clk_2_int), + .phy_2_tx_rst(qsfp_2_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_2_txd_2_int), + .phy_2_xgmii_txc(qsfp_2_txc_2_int), + .phy_2_rx_clk(qsfp_2_rx_clk_2_int), + .phy_2_rx_rst(qsfp_2_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_2_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_2_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_2_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_2_tx_clk_3_int), + .phy_3_tx_rst(qsfp_2_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_2_txd_3_int), + .phy_3_xgmii_txc(qsfp_2_txc_3_int), + .phy_3_rx_clk(qsfp_2_rx_clk_3_int), + .phy_3_rx_rst(qsfp_2_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_2_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_2_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_2_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[1]), - .xcvr_txn(qsfp_2_tx_n[1]), - .xcvr_rxp(qsfp_2_rx_p[1]), - .xcvr_rxn(qsfp_2_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_2_int), - .phy_tx_rst(qsfp_2_tx_rst_2_int), - .phy_xgmii_txd(qsfp_2_txd_2_int), - .phy_xgmii_txc(qsfp_2_txc_2_int), - .phy_rx_clk(qsfp_2_rx_clk_2_int), - .phy_rx_rst(qsfp_2_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_2_rxd_2_int), - .phy_xgmii_rxc(qsfp_2_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[2]), - .xcvr_txn(qsfp_2_tx_n[2]), - .xcvr_rxp(qsfp_2_rx_p[2]), - .xcvr_rxn(qsfp_2_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_3_int), - .phy_tx_rst(qsfp_2_tx_rst_3_int), - .phy_xgmii_txd(qsfp_2_txd_3_int), - .phy_xgmii_txc(qsfp_2_txc_3_int), - .phy_rx_clk(qsfp_2_rx_clk_3_int), - .phy_rx_rst(qsfp_2_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_2_rxd_3_int), - .phy_xgmii_rxc(qsfp_2_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_2_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_2_tx_p[3]), - .xcvr_txn(qsfp_2_tx_n[3]), - .xcvr_rxp(qsfp_2_rx_p[3]), - .xcvr_rxn(qsfp_2_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_2_tx_clk_4_int), - .phy_tx_rst(qsfp_2_tx_rst_4_int), - .phy_xgmii_txd(qsfp_2_txd_4_int), - .phy_xgmii_txc(qsfp_2_txc_4_int), - .phy_rx_clk(qsfp_2_rx_clk_4_int), - .phy_rx_rst(qsfp_2_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_2_rxd_4_int), - .phy_xgmii_rxc(qsfp_2_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_2_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_2_tx_clk_4_int), + .phy_4_tx_rst(qsfp_2_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_2_txd_4_int), + .phy_4_xgmii_txc(qsfp_2_txc_4_int), + .phy_4_rx_clk(qsfp_2_rx_clk_4_int), + .phy_4_rx_rst(qsfp_2_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_2_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_2_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_2_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 3 @@ -1040,196 +846,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_3_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_3_qpll0lock; -wire qsfp_3_qpll0outclk; -wire qsfp_3_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_3_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_3_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_3_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_3_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_3_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_3_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_3_tx_p), + .xcvr_txn(qsfp_3_tx_n), + .xcvr_rxp(qsfp_3_rx_p), + .xcvr_rxn(qsfp_3_rx_n), - // Serial data - .xcvr_txp(qsfp_3_tx_p[0]), - .xcvr_txn(qsfp_3_tx_n[0]), - .xcvr_rxp(qsfp_3_rx_p[0]), - .xcvr_rxn(qsfp_3_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_3_tx_clk_1_int), + .phy_1_tx_rst(qsfp_3_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_3_txd_1_int), + .phy_1_xgmii_txc(qsfp_3_txc_1_int), + .phy_1_rx_clk(qsfp_3_rx_clk_1_int), + .phy_1_rx_rst(qsfp_3_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_3_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_3_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_3_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_1_int), - .phy_tx_rst(qsfp_3_tx_rst_1_int), - .phy_xgmii_txd(qsfp_3_txd_1_int), - .phy_xgmii_txc(qsfp_3_txc_1_int), - .phy_rx_clk(qsfp_3_rx_clk_1_int), - .phy_rx_rst(qsfp_3_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_3_rxd_1_int), - .phy_xgmii_rxc(qsfp_3_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_3_tx_clk_2_int), + .phy_2_tx_rst(qsfp_3_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_3_txd_2_int), + .phy_2_xgmii_txc(qsfp_3_txc_2_int), + .phy_2_rx_clk(qsfp_3_rx_clk_2_int), + .phy_2_rx_rst(qsfp_3_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_3_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_3_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_3_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_3_tx_clk_3_int), + .phy_3_tx_rst(qsfp_3_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_3_txd_3_int), + .phy_3_xgmii_txc(qsfp_3_txc_3_int), + .phy_3_rx_clk(qsfp_3_rx_clk_3_int), + .phy_3_rx_rst(qsfp_3_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_3_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_3_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_3_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[1]), - .xcvr_txn(qsfp_3_tx_n[1]), - .xcvr_rxp(qsfp_3_rx_p[1]), - .xcvr_rxn(qsfp_3_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_2_int), - .phy_tx_rst(qsfp_3_tx_rst_2_int), - .phy_xgmii_txd(qsfp_3_txd_2_int), - .phy_xgmii_txc(qsfp_3_txc_2_int), - .phy_rx_clk(qsfp_3_rx_clk_2_int), - .phy_rx_rst(qsfp_3_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_3_rxd_2_int), - .phy_xgmii_rxc(qsfp_3_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[2]), - .xcvr_txn(qsfp_3_tx_n[2]), - .xcvr_rxp(qsfp_3_rx_p[2]), - .xcvr_rxn(qsfp_3_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_3_int), - .phy_tx_rst(qsfp_3_tx_rst_3_int), - .phy_xgmii_txd(qsfp_3_txd_3_int), - .phy_xgmii_txc(qsfp_3_txc_3_int), - .phy_rx_clk(qsfp_3_rx_clk_3_int), - .phy_rx_rst(qsfp_3_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_3_rxd_3_int), - .phy_xgmii_rxc(qsfp_3_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_3_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_3_tx_p[3]), - .xcvr_txn(qsfp_3_tx_n[3]), - .xcvr_rxp(qsfp_3_rx_p[3]), - .xcvr_rxn(qsfp_3_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_3_tx_clk_4_int), - .phy_tx_rst(qsfp_3_tx_rst_4_int), - .phy_xgmii_txd(qsfp_3_txd_4_int), - .phy_xgmii_txc(qsfp_3_txc_4_int), - .phy_rx_clk(qsfp_3_rx_clk_4_int), - .phy_rx_rst(qsfp_3_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_3_rxd_4_int), - .phy_xgmii_rxc(qsfp_3_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_3_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_3_tx_clk_4_int), + .phy_4_tx_rst(qsfp_3_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_3_txd_4_int), + .phy_4_xgmii_txc(qsfp_3_txc_4_int), + .phy_4_rx_clk(qsfp_3_rx_clk_4_int), + .phy_4_rx_rst(qsfp_3_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_3_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_3_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_3_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 4 @@ -1283,196 +992,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_4_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_4_qpll0lock; -wire qsfp_4_qpll0outclk; -wire qsfp_4_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_4_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_4_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_4_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_4_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_4_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_4_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_4_tx_p), + .xcvr_txn(qsfp_4_tx_n), + .xcvr_rxp(qsfp_4_rx_p), + .xcvr_rxn(qsfp_4_rx_n), - // Serial data - .xcvr_txp(qsfp_4_tx_p[0]), - .xcvr_txn(qsfp_4_tx_n[0]), - .xcvr_rxp(qsfp_4_rx_p[0]), - .xcvr_rxn(qsfp_4_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_4_tx_clk_1_int), + .phy_1_tx_rst(qsfp_4_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_4_txd_1_int), + .phy_1_xgmii_txc(qsfp_4_txc_1_int), + .phy_1_rx_clk(qsfp_4_rx_clk_1_int), + .phy_1_rx_rst(qsfp_4_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_4_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_4_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_4_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_1_int), - .phy_tx_rst(qsfp_4_tx_rst_1_int), - .phy_xgmii_txd(qsfp_4_txd_1_int), - .phy_xgmii_txc(qsfp_4_txc_1_int), - .phy_rx_clk(qsfp_4_rx_clk_1_int), - .phy_rx_rst(qsfp_4_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_4_rxd_1_int), - .phy_xgmii_rxc(qsfp_4_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_4_tx_clk_2_int), + .phy_2_tx_rst(qsfp_4_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_4_txd_2_int), + .phy_2_xgmii_txc(qsfp_4_txc_2_int), + .phy_2_rx_clk(qsfp_4_rx_clk_2_int), + .phy_2_rx_rst(qsfp_4_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_4_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_4_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_4_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_4_tx_clk_3_int), + .phy_3_tx_rst(qsfp_4_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_4_txd_3_int), + .phy_3_xgmii_txc(qsfp_4_txc_3_int), + .phy_3_rx_clk(qsfp_4_rx_clk_3_int), + .phy_3_rx_rst(qsfp_4_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_4_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_4_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_4_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[1]), - .xcvr_txn(qsfp_4_tx_n[1]), - .xcvr_rxp(qsfp_4_rx_p[1]), - .xcvr_rxn(qsfp_4_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_2_int), - .phy_tx_rst(qsfp_4_tx_rst_2_int), - .phy_xgmii_txd(qsfp_4_txd_2_int), - .phy_xgmii_txc(qsfp_4_txc_2_int), - .phy_rx_clk(qsfp_4_rx_clk_2_int), - .phy_rx_rst(qsfp_4_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_4_rxd_2_int), - .phy_xgmii_rxc(qsfp_4_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[2]), - .xcvr_txn(qsfp_4_tx_n[2]), - .xcvr_rxp(qsfp_4_rx_p[2]), - .xcvr_rxn(qsfp_4_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_3_int), - .phy_tx_rst(qsfp_4_tx_rst_3_int), - .phy_xgmii_txd(qsfp_4_txd_3_int), - .phy_xgmii_txc(qsfp_4_txc_3_int), - .phy_rx_clk(qsfp_4_rx_clk_3_int), - .phy_rx_rst(qsfp_4_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_4_rxd_3_int), - .phy_xgmii_rxc(qsfp_4_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_4_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_4_tx_p[3]), - .xcvr_txn(qsfp_4_tx_n[3]), - .xcvr_rxp(qsfp_4_rx_p[3]), - .xcvr_rxn(qsfp_4_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_4_tx_clk_4_int), - .phy_tx_rst(qsfp_4_tx_rst_4_int), - .phy_xgmii_txd(qsfp_4_txd_4_int), - .phy_xgmii_txc(qsfp_4_txc_4_int), - .phy_rx_clk(qsfp_4_rx_clk_4_int), - .phy_rx_rst(qsfp_4_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_4_rxd_4_int), - .phy_xgmii_rxc(qsfp_4_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_4_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_4_tx_clk_4_int), + .phy_4_tx_rst(qsfp_4_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_4_txd_4_int), + .phy_4_xgmii_txc(qsfp_4_txc_4_int), + .phy_4_rx_clk(qsfp_4_rx_clk_4_int), + .phy_4_rx_rst(qsfp_4_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_4_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_4_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_4_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 5 @@ -1526,196 +1138,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_5_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_5_qpll0lock; -wire qsfp_5_qpll0outclk; -wire qsfp_5_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_5_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_5_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_5_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_5_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_5_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_5_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_5_tx_p), + .xcvr_txn(qsfp_5_tx_n), + .xcvr_rxp(qsfp_5_rx_p), + .xcvr_rxn(qsfp_5_rx_n), - // Serial data - .xcvr_txp(qsfp_5_tx_p[0]), - .xcvr_txn(qsfp_5_tx_n[0]), - .xcvr_rxp(qsfp_5_rx_p[0]), - .xcvr_rxn(qsfp_5_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_5_tx_clk_1_int), + .phy_1_tx_rst(qsfp_5_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_5_txd_1_int), + .phy_1_xgmii_txc(qsfp_5_txc_1_int), + .phy_1_rx_clk(qsfp_5_rx_clk_1_int), + .phy_1_rx_rst(qsfp_5_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_5_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_5_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_5_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_1_int), - .phy_tx_rst(qsfp_5_tx_rst_1_int), - .phy_xgmii_txd(qsfp_5_txd_1_int), - .phy_xgmii_txc(qsfp_5_txc_1_int), - .phy_rx_clk(qsfp_5_rx_clk_1_int), - .phy_rx_rst(qsfp_5_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_5_rxd_1_int), - .phy_xgmii_rxc(qsfp_5_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_5_tx_clk_2_int), + .phy_2_tx_rst(qsfp_5_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_5_txd_2_int), + .phy_2_xgmii_txc(qsfp_5_txc_2_int), + .phy_2_rx_clk(qsfp_5_rx_clk_2_int), + .phy_2_rx_rst(qsfp_5_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_5_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_5_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_5_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_5_tx_clk_3_int), + .phy_3_tx_rst(qsfp_5_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_5_txd_3_int), + .phy_3_xgmii_txc(qsfp_5_txc_3_int), + .phy_3_rx_clk(qsfp_5_rx_clk_3_int), + .phy_3_rx_rst(qsfp_5_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_5_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_5_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_5_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[1]), - .xcvr_txn(qsfp_5_tx_n[1]), - .xcvr_rxp(qsfp_5_rx_p[1]), - .xcvr_rxn(qsfp_5_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_2_int), - .phy_tx_rst(qsfp_5_tx_rst_2_int), - .phy_xgmii_txd(qsfp_5_txd_2_int), - .phy_xgmii_txc(qsfp_5_txc_2_int), - .phy_rx_clk(qsfp_5_rx_clk_2_int), - .phy_rx_rst(qsfp_5_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_5_rxd_2_int), - .phy_xgmii_rxc(qsfp_5_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[2]), - .xcvr_txn(qsfp_5_tx_n[2]), - .xcvr_rxp(qsfp_5_rx_p[2]), - .xcvr_rxn(qsfp_5_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_3_int), - .phy_tx_rst(qsfp_5_tx_rst_3_int), - .phy_xgmii_txd(qsfp_5_txd_3_int), - .phy_xgmii_txc(qsfp_5_txc_3_int), - .phy_rx_clk(qsfp_5_rx_clk_3_int), - .phy_rx_rst(qsfp_5_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_5_rxd_3_int), - .phy_xgmii_rxc(qsfp_5_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_5_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_5_tx_p[3]), - .xcvr_txn(qsfp_5_tx_n[3]), - .xcvr_rxp(qsfp_5_rx_p[3]), - .xcvr_rxn(qsfp_5_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_5_tx_clk_4_int), - .phy_tx_rst(qsfp_5_tx_rst_4_int), - .phy_xgmii_txd(qsfp_5_txd_4_int), - .phy_xgmii_txc(qsfp_5_txc_4_int), - .phy_rx_clk(qsfp_5_rx_clk_4_int), - .phy_rx_rst(qsfp_5_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_5_rxd_4_int), - .phy_xgmii_rxc(qsfp_5_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_5_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_5_tx_clk_4_int), + .phy_4_tx_rst(qsfp_5_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_5_txd_4_int), + .phy_4_xgmii_txc(qsfp_5_txc_4_int), + .phy_4_rx_clk(qsfp_5_rx_clk_4_int), + .phy_4_rx_rst(qsfp_5_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_5_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_5_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_5_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 6 @@ -1769,196 +1284,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_6_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_6_qpll0lock; -wire qsfp_6_qpll0outclk; -wire qsfp_6_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_6_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_6_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_6_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_6_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_6_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_6_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_6_tx_p), + .xcvr_txn(qsfp_6_tx_n), + .xcvr_rxp(qsfp_6_rx_p), + .xcvr_rxn(qsfp_6_rx_n), - // Serial data - .xcvr_txp(qsfp_6_tx_p[0]), - .xcvr_txn(qsfp_6_tx_n[0]), - .xcvr_rxp(qsfp_6_rx_p[0]), - .xcvr_rxn(qsfp_6_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_6_tx_clk_1_int), + .phy_1_tx_rst(qsfp_6_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_6_txd_1_int), + .phy_1_xgmii_txc(qsfp_6_txc_1_int), + .phy_1_rx_clk(qsfp_6_rx_clk_1_int), + .phy_1_rx_rst(qsfp_6_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_6_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_6_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_6_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_1_int), - .phy_tx_rst(qsfp_6_tx_rst_1_int), - .phy_xgmii_txd(qsfp_6_txd_1_int), - .phy_xgmii_txc(qsfp_6_txc_1_int), - .phy_rx_clk(qsfp_6_rx_clk_1_int), - .phy_rx_rst(qsfp_6_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_6_rxd_1_int), - .phy_xgmii_rxc(qsfp_6_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_6_tx_clk_2_int), + .phy_2_tx_rst(qsfp_6_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_6_txd_2_int), + .phy_2_xgmii_txc(qsfp_6_txc_2_int), + .phy_2_rx_clk(qsfp_6_rx_clk_2_int), + .phy_2_rx_rst(qsfp_6_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_6_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_6_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_6_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_6_tx_clk_3_int), + .phy_3_tx_rst(qsfp_6_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_6_txd_3_int), + .phy_3_xgmii_txc(qsfp_6_txc_3_int), + .phy_3_rx_clk(qsfp_6_rx_clk_3_int), + .phy_3_rx_rst(qsfp_6_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_6_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_6_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_6_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[1]), - .xcvr_txn(qsfp_6_tx_n[1]), - .xcvr_rxp(qsfp_6_rx_p[1]), - .xcvr_rxn(qsfp_6_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_2_int), - .phy_tx_rst(qsfp_6_tx_rst_2_int), - .phy_xgmii_txd(qsfp_6_txd_2_int), - .phy_xgmii_txc(qsfp_6_txc_2_int), - .phy_rx_clk(qsfp_6_rx_clk_2_int), - .phy_rx_rst(qsfp_6_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_6_rxd_2_int), - .phy_xgmii_rxc(qsfp_6_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[2]), - .xcvr_txn(qsfp_6_tx_n[2]), - .xcvr_rxp(qsfp_6_rx_p[2]), - .xcvr_rxn(qsfp_6_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_3_int), - .phy_tx_rst(qsfp_6_tx_rst_3_int), - .phy_xgmii_txd(qsfp_6_txd_3_int), - .phy_xgmii_txc(qsfp_6_txc_3_int), - .phy_rx_clk(qsfp_6_rx_clk_3_int), - .phy_rx_rst(qsfp_6_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_6_rxd_3_int), - .phy_xgmii_rxc(qsfp_6_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_6_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_6_tx_p[3]), - .xcvr_txn(qsfp_6_tx_n[3]), - .xcvr_rxp(qsfp_6_rx_p[3]), - .xcvr_rxn(qsfp_6_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_6_tx_clk_4_int), - .phy_tx_rst(qsfp_6_tx_rst_4_int), - .phy_xgmii_txd(qsfp_6_txd_4_int), - .phy_xgmii_txc(qsfp_6_txc_4_int), - .phy_rx_clk(qsfp_6_rx_clk_4_int), - .phy_rx_rst(qsfp_6_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_6_rxd_4_int), - .phy_xgmii_rxc(qsfp_6_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_6_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_6_tx_clk_4_int), + .phy_4_tx_rst(qsfp_6_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_6_txd_4_int), + .phy_4_xgmii_txc(qsfp_6_txc_4_int), + .phy_4_rx_clk(qsfp_6_rx_clk_4_int), + .phy_4_rx_rst(qsfp_6_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_6_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_6_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_6_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 7 @@ -2012,196 +1430,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_7_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_7_qpll0lock; -wire qsfp_7_qpll0outclk; -wire qsfp_7_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_7_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_7_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_7_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_7_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_7_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_7_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_7_tx_p), + .xcvr_txn(qsfp_7_tx_n), + .xcvr_rxp(qsfp_7_rx_p), + .xcvr_rxn(qsfp_7_rx_n), - // Serial data - .xcvr_txp(qsfp_7_tx_p[0]), - .xcvr_txn(qsfp_7_tx_n[0]), - .xcvr_rxp(qsfp_7_rx_p[0]), - .xcvr_rxn(qsfp_7_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_7_tx_clk_1_int), + .phy_1_tx_rst(qsfp_7_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_7_txd_1_int), + .phy_1_xgmii_txc(qsfp_7_txc_1_int), + .phy_1_rx_clk(qsfp_7_rx_clk_1_int), + .phy_1_rx_rst(qsfp_7_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_7_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_7_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_7_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_1_int), - .phy_tx_rst(qsfp_7_tx_rst_1_int), - .phy_xgmii_txd(qsfp_7_txd_1_int), - .phy_xgmii_txc(qsfp_7_txc_1_int), - .phy_rx_clk(qsfp_7_rx_clk_1_int), - .phy_rx_rst(qsfp_7_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_7_rxd_1_int), - .phy_xgmii_rxc(qsfp_7_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_7_tx_clk_2_int), + .phy_2_tx_rst(qsfp_7_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_7_txd_2_int), + .phy_2_xgmii_txc(qsfp_7_txc_2_int), + .phy_2_rx_clk(qsfp_7_rx_clk_2_int), + .phy_2_rx_rst(qsfp_7_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_7_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_7_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_7_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_7_tx_clk_3_int), + .phy_3_tx_rst(qsfp_7_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_7_txd_3_int), + .phy_3_xgmii_txc(qsfp_7_txc_3_int), + .phy_3_rx_clk(qsfp_7_rx_clk_3_int), + .phy_3_rx_rst(qsfp_7_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_7_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_7_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_7_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[1]), - .xcvr_txn(qsfp_7_tx_n[1]), - .xcvr_rxp(qsfp_7_rx_p[1]), - .xcvr_rxn(qsfp_7_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_2_int), - .phy_tx_rst(qsfp_7_tx_rst_2_int), - .phy_xgmii_txd(qsfp_7_txd_2_int), - .phy_xgmii_txc(qsfp_7_txc_2_int), - .phy_rx_clk(qsfp_7_rx_clk_2_int), - .phy_rx_rst(qsfp_7_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_7_rxd_2_int), - .phy_xgmii_rxc(qsfp_7_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[2]), - .xcvr_txn(qsfp_7_tx_n[2]), - .xcvr_rxp(qsfp_7_rx_p[2]), - .xcvr_rxn(qsfp_7_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_3_int), - .phy_tx_rst(qsfp_7_tx_rst_3_int), - .phy_xgmii_txd(qsfp_7_txd_3_int), - .phy_xgmii_txc(qsfp_7_txc_3_int), - .phy_rx_clk(qsfp_7_rx_clk_3_int), - .phy_rx_rst(qsfp_7_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_7_rxd_3_int), - .phy_xgmii_rxc(qsfp_7_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_7_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_7_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_7_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_7_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_7_tx_p[3]), - .xcvr_txn(qsfp_7_tx_n[3]), - .xcvr_rxp(qsfp_7_rx_p[3]), - .xcvr_rxn(qsfp_7_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_7_tx_clk_4_int), - .phy_tx_rst(qsfp_7_tx_rst_4_int), - .phy_xgmii_txd(qsfp_7_txd_4_int), - .phy_xgmii_txc(qsfp_7_txc_4_int), - .phy_rx_clk(qsfp_7_rx_clk_4_int), - .phy_rx_rst(qsfp_7_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_7_rxd_4_int), - .phy_xgmii_rxc(qsfp_7_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_7_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_7_tx_clk_4_int), + .phy_4_tx_rst(qsfp_7_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_7_txd_4_int), + .phy_4_xgmii_txc(qsfp_7_txc_4_int), + .phy_4_rx_clk(qsfp_7_rx_clk_4_int), + .phy_4_rx_rst(qsfp_7_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_7_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_7_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_7_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 8 @@ -2255,196 +1576,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_8_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_8_qpll0lock; -wire qsfp_8_qpll0outclk; -wire qsfp_8_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_8_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_8_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_8_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_8_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_8_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_8_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_8_tx_p), + .xcvr_txn(qsfp_8_tx_n), + .xcvr_rxp(qsfp_8_rx_p), + .xcvr_rxn(qsfp_8_rx_n), - // Serial data - .xcvr_txp(qsfp_8_tx_p[0]), - .xcvr_txn(qsfp_8_tx_n[0]), - .xcvr_rxp(qsfp_8_rx_p[0]), - .xcvr_rxn(qsfp_8_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_8_tx_clk_1_int), + .phy_1_tx_rst(qsfp_8_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_8_txd_1_int), + .phy_1_xgmii_txc(qsfp_8_txc_1_int), + .phy_1_rx_clk(qsfp_8_rx_clk_1_int), + .phy_1_rx_rst(qsfp_8_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_8_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_8_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_8_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_1_int), - .phy_tx_rst(qsfp_8_tx_rst_1_int), - .phy_xgmii_txd(qsfp_8_txd_1_int), - .phy_xgmii_txc(qsfp_8_txc_1_int), - .phy_rx_clk(qsfp_8_rx_clk_1_int), - .phy_rx_rst(qsfp_8_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_8_rxd_1_int), - .phy_xgmii_rxc(qsfp_8_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_8_tx_clk_2_int), + .phy_2_tx_rst(qsfp_8_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_8_txd_2_int), + .phy_2_xgmii_txc(qsfp_8_txc_2_int), + .phy_2_rx_clk(qsfp_8_rx_clk_2_int), + .phy_2_rx_rst(qsfp_8_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_8_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_8_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_8_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_8_tx_clk_3_int), + .phy_3_tx_rst(qsfp_8_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_8_txd_3_int), + .phy_3_xgmii_txc(qsfp_8_txc_3_int), + .phy_3_rx_clk(qsfp_8_rx_clk_3_int), + .phy_3_rx_rst(qsfp_8_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_8_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_8_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_8_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[1]), - .xcvr_txn(qsfp_8_tx_n[1]), - .xcvr_rxp(qsfp_8_rx_p[1]), - .xcvr_rxn(qsfp_8_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_2_int), - .phy_tx_rst(qsfp_8_tx_rst_2_int), - .phy_xgmii_txd(qsfp_8_txd_2_int), - .phy_xgmii_txc(qsfp_8_txc_2_int), - .phy_rx_clk(qsfp_8_rx_clk_2_int), - .phy_rx_rst(qsfp_8_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_8_rxd_2_int), - .phy_xgmii_rxc(qsfp_8_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[2]), - .xcvr_txn(qsfp_8_tx_n[2]), - .xcvr_rxp(qsfp_8_rx_p[2]), - .xcvr_rxn(qsfp_8_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_3_int), - .phy_tx_rst(qsfp_8_tx_rst_3_int), - .phy_xgmii_txd(qsfp_8_txd_3_int), - .phy_xgmii_txc(qsfp_8_txc_3_int), - .phy_rx_clk(qsfp_8_rx_clk_3_int), - .phy_rx_rst(qsfp_8_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_8_rxd_3_int), - .phy_xgmii_rxc(qsfp_8_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_8_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_8_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_8_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_8_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_8_tx_p[3]), - .xcvr_txn(qsfp_8_tx_n[3]), - .xcvr_rxp(qsfp_8_rx_p[3]), - .xcvr_rxn(qsfp_8_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_8_tx_clk_4_int), - .phy_tx_rst(qsfp_8_tx_rst_4_int), - .phy_xgmii_txd(qsfp_8_txd_4_int), - .phy_xgmii_txc(qsfp_8_txc_4_int), - .phy_rx_clk(qsfp_8_rx_clk_4_int), - .phy_rx_rst(qsfp_8_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_8_rxd_4_int), - .phy_xgmii_rxc(qsfp_8_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_8_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_8_tx_clk_4_int), + .phy_4_tx_rst(qsfp_8_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_8_txd_4_int), + .phy_4_xgmii_txc(qsfp_8_txc_4_int), + .phy_4_rx_clk(qsfp_8_rx_clk_4_int), + .phy_4_rx_rst(qsfp_8_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_8_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_8_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_8_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // QSFP 9 @@ -2498,196 +1722,99 @@ IBUFDS_GTE4 ibufds_gte4_qsfp_9_mgt_refclk_inst ( .ODIV2 () ); -wire qsfp_9_qpll0lock; -wire qsfp_9_qpll0outclk; -wire qsfp_9_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -qsfp_9_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +qsfp_9_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(qsfp_9_mgt_refclk), - .xcvr_qpll0lock_out(qsfp_9_qpll0lock), - .xcvr_qpll0outclk_out(qsfp_9_qpll0outclk), - .xcvr_qpll0outrefclk_out(qsfp_9_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(qsfp_9_tx_p), + .xcvr_txn(qsfp_9_tx_n), + .xcvr_rxp(qsfp_9_rx_p), + .xcvr_rxn(qsfp_9_rx_n), - // Serial data - .xcvr_txp(qsfp_9_tx_p[0]), - .xcvr_txn(qsfp_9_tx_n[0]), - .xcvr_rxp(qsfp_9_rx_p[0]), - .xcvr_rxn(qsfp_9_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(qsfp_9_tx_clk_1_int), + .phy_1_tx_rst(qsfp_9_tx_rst_1_int), + .phy_1_xgmii_txd(qsfp_9_txd_1_int), + .phy_1_xgmii_txc(qsfp_9_txc_1_int), + .phy_1_rx_clk(qsfp_9_rx_clk_1_int), + .phy_1_rx_rst(qsfp_9_rx_rst_1_int), + .phy_1_xgmii_rxd(qsfp_9_rxd_1_int), + .phy_1_xgmii_rxc(qsfp_9_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(qsfp_9_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_1_int), - .phy_tx_rst(qsfp_9_tx_rst_1_int), - .phy_xgmii_txd(qsfp_9_txd_1_int), - .phy_xgmii_txc(qsfp_9_txc_1_int), - .phy_rx_clk(qsfp_9_rx_clk_1_int), - .phy_rx_rst(qsfp_9_rx_rst_1_int), - .phy_xgmii_rxd(qsfp_9_rxd_1_int), - .phy_xgmii_rxc(qsfp_9_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(qsfp_9_tx_clk_2_int), + .phy_2_tx_rst(qsfp_9_tx_rst_2_int), + .phy_2_xgmii_txd(qsfp_9_txd_2_int), + .phy_2_xgmii_txc(qsfp_9_txc_2_int), + .phy_2_rx_clk(qsfp_9_rx_clk_2_int), + .phy_2_rx_rst(qsfp_9_rx_rst_2_int), + .phy_2_xgmii_rxd(qsfp_9_rxd_2_int), + .phy_2_xgmii_rxc(qsfp_9_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(qsfp_9_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), + .phy_3_tx_clk(qsfp_9_tx_clk_3_int), + .phy_3_tx_rst(qsfp_9_tx_rst_3_int), + .phy_3_xgmii_txd(qsfp_9_txd_3_int), + .phy_3_xgmii_txc(qsfp_9_txc_3_int), + .phy_3_rx_clk(qsfp_9_rx_clk_3_int), + .phy_3_rx_rst(qsfp_9_rx_rst_3_int), + .phy_3_xgmii_rxd(qsfp_9_rxd_3_int), + .phy_3_xgmii_rxc(qsfp_9_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(qsfp_9_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[1]), - .xcvr_txn(qsfp_9_tx_n[1]), - .xcvr_rxp(qsfp_9_rx_p[1]), - .xcvr_rxn(qsfp_9_rx_n[1]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_2_int), - .phy_tx_rst(qsfp_9_tx_rst_2_int), - .phy_xgmii_txd(qsfp_9_txd_2_int), - .phy_xgmii_txc(qsfp_9_txc_2_int), - .phy_rx_clk(qsfp_9_rx_clk_2_int), - .phy_rx_rst(qsfp_9_rx_rst_2_int), - .phy_xgmii_rxd(qsfp_9_rxd_2_int), - .phy_xgmii_rxc(qsfp_9_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[2]), - .xcvr_txn(qsfp_9_tx_n[2]), - .xcvr_rxp(qsfp_9_rx_p[2]), - .xcvr_rxn(qsfp_9_rx_n[2]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_3_int), - .phy_tx_rst(qsfp_9_tx_rst_3_int), - .phy_xgmii_txd(qsfp_9_txd_3_int), - .phy_xgmii_txc(qsfp_9_txc_3_int), - .phy_rx_clk(qsfp_9_rx_clk_3_int), - .phy_rx_rst(qsfp_9_rx_rst_3_int), - .phy_xgmii_rxd(qsfp_9_rxd_3_int), - .phy_xgmii_rxc(qsfp_9_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -qsfp_9_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(qsfp_9_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(qsfp_9_qpll0outclk), - .xcvr_qpll0refclk_in(qsfp_9_qpll0outrefclk), - - // Serial data - .xcvr_txp(qsfp_9_tx_p[3]), - .xcvr_txn(qsfp_9_tx_n[3]), - .xcvr_rxp(qsfp_9_rx_p[3]), - .xcvr_rxn(qsfp_9_rx_n[3]), - - // PHY connections - .phy_tx_clk(qsfp_9_tx_clk_4_int), - .phy_tx_rst(qsfp_9_tx_rst_4_int), - .phy_xgmii_txd(qsfp_9_txd_4_int), - .phy_xgmii_txc(qsfp_9_txc_4_int), - .phy_rx_clk(qsfp_9_rx_clk_4_int), - .phy_rx_rst(qsfp_9_rx_rst_4_int), - .phy_xgmii_rxd(qsfp_9_rxd_4_int), - .phy_xgmii_rxc(qsfp_9_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(qsfp_9_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(qsfp_9_tx_clk_4_int), + .phy_4_tx_rst(qsfp_9_tx_rst_4_int), + .phy_4_xgmii_txd(qsfp_9_txd_4_int), + .phy_4_xgmii_txc(qsfp_9_txc_4_int), + .phy_4_rx_clk(qsfp_9_rx_clk_4_int), + .phy_4_rx_rst(qsfp_9_rx_rst_4_int), + .phy_4_xgmii_rxd(qsfp_9_rxd_4_int), + .phy_4_xgmii_rxc(qsfp_9_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(qsfp_9_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 1 @@ -2743,196 +1870,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_1_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_1_qpll0lock; -wire fmc_qsfp_1_qpll0outclk; -wire fmc_qsfp_1_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_1_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_1_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_1_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_1_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_1_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_1_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_1_tx_p), + .xcvr_txn(fmc_qsfp_1_tx_n), + .xcvr_rxp(fmc_qsfp_1_rx_p), + .xcvr_rxn(fmc_qsfp_1_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_1_tx_p[0]), - .xcvr_txn(fmc_qsfp_1_tx_n[0]), - .xcvr_rxp(fmc_qsfp_1_rx_p[0]), - .xcvr_rxn(fmc_qsfp_1_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_1_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_1_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_1_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_1_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_1_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_1_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_1_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_1_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_1_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_1_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_1_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_1_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_1_txc_1_int), - .phy_rx_clk(fmc_qsfp_1_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_1_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_1_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_1_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_1_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_1_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_1_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_1_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_1_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_1_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_1_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_1_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_1_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_1_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_1_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_1_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_1_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_1_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_1_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_1_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_1_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_1_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_1_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_1_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_1_tx_p[1]), - .xcvr_txn(fmc_qsfp_1_tx_n[1]), - .xcvr_rxp(fmc_qsfp_1_rx_p[1]), - .xcvr_rxn(fmc_qsfp_1_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_1_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_1_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_1_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_1_txc_2_int), - .phy_rx_clk(fmc_qsfp_1_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_1_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_1_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_1_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_1_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_1_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_1_tx_p[2]), - .xcvr_txn(fmc_qsfp_1_tx_n[2]), - .xcvr_rxp(fmc_qsfp_1_rx_p[2]), - .xcvr_rxn(fmc_qsfp_1_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_1_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_1_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_1_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_1_txc_3_int), - .phy_rx_clk(fmc_qsfp_1_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_1_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_1_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_1_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_1_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_1_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_1_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_1_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_1_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_1_tx_p[3]), - .xcvr_txn(fmc_qsfp_1_tx_n[3]), - .xcvr_rxp(fmc_qsfp_1_rx_p[3]), - .xcvr_rxn(fmc_qsfp_1_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_1_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_1_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_1_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_1_txc_4_int), - .phy_rx_clk(fmc_qsfp_1_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_1_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_1_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_1_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_1_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_1_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_1_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_1_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_1_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_1_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_1_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_1_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_1_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_1_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 2 @@ -2988,196 +2018,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_2_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_2_qpll0lock; -wire fmc_qsfp_2_qpll0outclk; -wire fmc_qsfp_2_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_2_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_2_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_2_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_2_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_2_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_2_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_2_tx_p), + .xcvr_txn(fmc_qsfp_2_tx_n), + .xcvr_rxp(fmc_qsfp_2_rx_p), + .xcvr_rxn(fmc_qsfp_2_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_2_tx_p[0]), - .xcvr_txn(fmc_qsfp_2_tx_n[0]), - .xcvr_rxp(fmc_qsfp_2_rx_p[0]), - .xcvr_rxn(fmc_qsfp_2_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_2_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_2_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_2_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_2_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_2_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_2_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_2_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_2_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_2_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_2_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_2_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_2_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_2_txc_1_int), - .phy_rx_clk(fmc_qsfp_2_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_2_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_2_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_2_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_2_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_2_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_2_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_2_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_2_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_2_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_2_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_2_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_2_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_2_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_2_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_2_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_2_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_2_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_2_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_2_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_2_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_2_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_2_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_2_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_2_tx_p[1]), - .xcvr_txn(fmc_qsfp_2_tx_n[1]), - .xcvr_rxp(fmc_qsfp_2_rx_p[1]), - .xcvr_rxn(fmc_qsfp_2_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_2_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_2_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_2_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_2_txc_2_int), - .phy_rx_clk(fmc_qsfp_2_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_2_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_2_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_2_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_2_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_2_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_2_tx_p[2]), - .xcvr_txn(fmc_qsfp_2_tx_n[2]), - .xcvr_rxp(fmc_qsfp_2_rx_p[2]), - .xcvr_rxn(fmc_qsfp_2_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_2_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_2_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_2_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_2_txc_3_int), - .phy_rx_clk(fmc_qsfp_2_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_2_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_2_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_2_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_2_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_2_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_2_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_2_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_2_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_2_tx_p[3]), - .xcvr_txn(fmc_qsfp_2_tx_n[3]), - .xcvr_rxp(fmc_qsfp_2_rx_p[3]), - .xcvr_rxn(fmc_qsfp_2_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_2_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_2_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_2_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_2_txc_4_int), - .phy_rx_clk(fmc_qsfp_2_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_2_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_2_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_2_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_2_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_2_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_2_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_2_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_2_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_2_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_2_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_2_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_2_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_2_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 3 @@ -3233,196 +2166,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_3_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_3_qpll0lock; -wire fmc_qsfp_3_qpll0outclk; -wire fmc_qsfp_3_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_3_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_3_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_3_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_3_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_3_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_3_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_3_tx_p), + .xcvr_txn(fmc_qsfp_3_tx_n), + .xcvr_rxp(fmc_qsfp_3_rx_p), + .xcvr_rxn(fmc_qsfp_3_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_3_tx_p[0]), - .xcvr_txn(fmc_qsfp_3_tx_n[0]), - .xcvr_rxp(fmc_qsfp_3_rx_p[0]), - .xcvr_rxn(fmc_qsfp_3_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_3_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_3_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_3_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_3_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_3_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_3_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_3_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_3_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_3_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_3_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_3_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_3_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_3_txc_1_int), - .phy_rx_clk(fmc_qsfp_3_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_3_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_3_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_3_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_3_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_3_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_3_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_3_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_3_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_3_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_3_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_3_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_3_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_3_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_3_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_3_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_3_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_3_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_3_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_3_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_3_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_3_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_3_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_3_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_3_tx_p[1]), - .xcvr_txn(fmc_qsfp_3_tx_n[1]), - .xcvr_rxp(fmc_qsfp_3_rx_p[1]), - .xcvr_rxn(fmc_qsfp_3_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_3_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_3_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_3_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_3_txc_2_int), - .phy_rx_clk(fmc_qsfp_3_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_3_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_3_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_3_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_3_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_3_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_3_tx_p[2]), - .xcvr_txn(fmc_qsfp_3_tx_n[2]), - .xcvr_rxp(fmc_qsfp_3_rx_p[2]), - .xcvr_rxn(fmc_qsfp_3_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_3_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_3_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_3_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_3_txc_3_int), - .phy_rx_clk(fmc_qsfp_3_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_3_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_3_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_3_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_3_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_3_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_3_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_3_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_3_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_3_tx_p[3]), - .xcvr_txn(fmc_qsfp_3_tx_n[3]), - .xcvr_rxp(fmc_qsfp_3_rx_p[3]), - .xcvr_rxn(fmc_qsfp_3_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_3_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_3_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_3_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_3_txc_4_int), - .phy_rx_clk(fmc_qsfp_3_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_3_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_3_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_3_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_3_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_3_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_3_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_3_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_3_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_3_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_3_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_3_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_3_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_3_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 4 @@ -3478,196 +2314,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_4_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_4_qpll0lock; -wire fmc_qsfp_4_qpll0outclk; -wire fmc_qsfp_4_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_4_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_4_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_4_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_4_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_4_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_4_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_4_tx_p), + .xcvr_txn(fmc_qsfp_4_tx_n), + .xcvr_rxp(fmc_qsfp_4_rx_p), + .xcvr_rxn(fmc_qsfp_4_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_4_tx_p[0]), - .xcvr_txn(fmc_qsfp_4_tx_n[0]), - .xcvr_rxp(fmc_qsfp_4_rx_p[0]), - .xcvr_rxn(fmc_qsfp_4_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_4_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_4_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_4_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_4_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_4_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_4_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_4_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_4_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_4_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_4_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_4_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_4_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_4_txc_1_int), - .phy_rx_clk(fmc_qsfp_4_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_4_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_4_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_4_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_4_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_4_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_4_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_4_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_4_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_4_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_4_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_4_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_4_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_4_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_4_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_4_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_4_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_4_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_4_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_4_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_4_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_4_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_4_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_4_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_4_tx_p[1]), - .xcvr_txn(fmc_qsfp_4_tx_n[1]), - .xcvr_rxp(fmc_qsfp_4_rx_p[1]), - .xcvr_rxn(fmc_qsfp_4_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_4_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_4_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_4_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_4_txc_2_int), - .phy_rx_clk(fmc_qsfp_4_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_4_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_4_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_4_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_4_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_4_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_4_tx_p[2]), - .xcvr_txn(fmc_qsfp_4_tx_n[2]), - .xcvr_rxp(fmc_qsfp_4_rx_p[2]), - .xcvr_rxn(fmc_qsfp_4_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_4_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_4_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_4_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_4_txc_3_int), - .phy_rx_clk(fmc_qsfp_4_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_4_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_4_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_4_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_4_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_4_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_4_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_4_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_4_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_4_tx_p[3]), - .xcvr_txn(fmc_qsfp_4_tx_n[3]), - .xcvr_rxp(fmc_qsfp_4_rx_p[3]), - .xcvr_rxn(fmc_qsfp_4_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_4_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_4_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_4_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_4_txc_4_int), - .phy_rx_clk(fmc_qsfp_4_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_4_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_4_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_4_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_4_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_4_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_4_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_4_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_4_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_4_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_4_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_4_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_4_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_4_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 5 @@ -3723,196 +2462,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_5_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_5_qpll0lock; -wire fmc_qsfp_5_qpll0outclk; -wire fmc_qsfp_5_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_5_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_5_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_5_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_5_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_5_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_5_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_5_tx_p), + .xcvr_txn(fmc_qsfp_5_tx_n), + .xcvr_rxp(fmc_qsfp_5_rx_p), + .xcvr_rxn(fmc_qsfp_5_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_5_tx_p[0]), - .xcvr_txn(fmc_qsfp_5_tx_n[0]), - .xcvr_rxp(fmc_qsfp_5_rx_p[0]), - .xcvr_rxn(fmc_qsfp_5_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_5_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_5_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_5_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_5_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_5_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_5_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_5_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_5_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_5_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_5_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_5_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_5_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_5_txc_1_int), - .phy_rx_clk(fmc_qsfp_5_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_5_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_5_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_5_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_5_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_5_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_5_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_5_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_5_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_5_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_5_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_5_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_5_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_5_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_5_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_5_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_5_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_5_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_5_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_5_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_5_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_5_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_5_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_5_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_5_tx_p[1]), - .xcvr_txn(fmc_qsfp_5_tx_n[1]), - .xcvr_rxp(fmc_qsfp_5_rx_p[1]), - .xcvr_rxn(fmc_qsfp_5_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_5_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_5_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_5_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_5_txc_2_int), - .phy_rx_clk(fmc_qsfp_5_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_5_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_5_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_5_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_5_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_5_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_5_tx_p[2]), - .xcvr_txn(fmc_qsfp_5_tx_n[2]), - .xcvr_rxp(fmc_qsfp_5_rx_p[2]), - .xcvr_rxn(fmc_qsfp_5_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_5_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_5_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_5_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_5_txc_3_int), - .phy_rx_clk(fmc_qsfp_5_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_5_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_5_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_5_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_5_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_5_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_5_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_5_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_5_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_5_tx_p[3]), - .xcvr_txn(fmc_qsfp_5_tx_n[3]), - .xcvr_rxp(fmc_qsfp_5_rx_p[3]), - .xcvr_rxn(fmc_qsfp_5_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_5_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_5_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_5_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_5_txc_4_int), - .phy_rx_clk(fmc_qsfp_5_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_5_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_5_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_5_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_5_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_5_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_5_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_5_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_5_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_5_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_5_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_5_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_5_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_5_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); // FMC QSFP 6 @@ -3968,196 +2610,99 @@ IBUFDS_GTE4 ibufds_gte4_fmc_qsfp_6_mgt_refclk_inst ( .ODIV2 () ); -wire fmc_qsfp_6_qpll0lock; -wire fmc_qsfp_6_qpll0outclk; -wire fmc_qsfp_6_qpll0outrefclk; - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(1) -) -fmc_qsfp_6_phy_1_inst ( +eth_xcvr_phy_quad_wrapper +fmc_qsfp_6_phy_inst ( .xcvr_ctrl_clk(clk_125mhz_int), .xcvr_ctrl_rst(fmc_qsfp_reset), - // Common + /* + * Common + */ .xcvr_gtpowergood_out(), - // PLL out + /* + * PLL + */ .xcvr_gtrefclk00_in(fmc_qsfp_6_mgt_refclk), - .xcvr_qpll0lock_out(fmc_qsfp_6_qpll0lock), - .xcvr_qpll0outclk_out(fmc_qsfp_6_qpll0outclk), - .xcvr_qpll0outrefclk_out(fmc_qsfp_6_qpll0outrefclk), - // PLL in - .xcvr_qpll0lock_in(1'b0), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(1'b0), - .xcvr_qpll0refclk_in(1'b0), + /* + * Serial data + */ + .xcvr_txp(fmc_qsfp_6_tx_p), + .xcvr_txn(fmc_qsfp_6_tx_n), + .xcvr_rxp(fmc_qsfp_6_rx_p), + .xcvr_rxn(fmc_qsfp_6_rx_n), - // Serial data - .xcvr_txp(fmc_qsfp_6_tx_p[0]), - .xcvr_txn(fmc_qsfp_6_tx_n[0]), - .xcvr_rxp(fmc_qsfp_6_rx_p[0]), - .xcvr_rxn(fmc_qsfp_6_rx_n[0]), + /* + * PHY connections + */ + .phy_1_tx_clk(fmc_qsfp_6_tx_clk_1_int), + .phy_1_tx_rst(fmc_qsfp_6_tx_rst_1_int), + .phy_1_xgmii_txd(fmc_qsfp_6_txd_1_int), + .phy_1_xgmii_txc(fmc_qsfp_6_txc_1_int), + .phy_1_rx_clk(fmc_qsfp_6_rx_clk_1_int), + .phy_1_rx_rst(fmc_qsfp_6_rx_rst_1_int), + .phy_1_xgmii_rxd(fmc_qsfp_6_rxd_1_int), + .phy_1_xgmii_rxc(fmc_qsfp_6_rxc_1_int), + .phy_1_tx_bad_block(), + .phy_1_rx_error_count(), + .phy_1_rx_bad_block(), + .phy_1_rx_sequence_error(), + .phy_1_rx_block_lock(fmc_qsfp_6_rx_block_lock_1), + .phy_1_rx_status(), + .phy_1_cfg_tx_prbs31_enable(1'b0), + .phy_1_cfg_rx_prbs31_enable(1'b0), - // PHY connections - .phy_tx_clk(fmc_qsfp_6_tx_clk_1_int), - .phy_tx_rst(fmc_qsfp_6_tx_rst_1_int), - .phy_xgmii_txd(fmc_qsfp_6_txd_1_int), - .phy_xgmii_txc(fmc_qsfp_6_txc_1_int), - .phy_rx_clk(fmc_qsfp_6_rx_clk_1_int), - .phy_rx_rst(fmc_qsfp_6_rx_rst_1_int), - .phy_xgmii_rxd(fmc_qsfp_6_rxd_1_int), - .phy_xgmii_rxc(fmc_qsfp_6_rxc_1_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_6_rx_block_lock_1), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); + .phy_2_tx_clk(fmc_qsfp_6_tx_clk_2_int), + .phy_2_tx_rst(fmc_qsfp_6_tx_rst_2_int), + .phy_2_xgmii_txd(fmc_qsfp_6_txd_2_int), + .phy_2_xgmii_txc(fmc_qsfp_6_txc_2_int), + .phy_2_rx_clk(fmc_qsfp_6_rx_clk_2_int), + .phy_2_rx_rst(fmc_qsfp_6_rx_rst_2_int), + .phy_2_xgmii_rxd(fmc_qsfp_6_rxd_2_int), + .phy_2_xgmii_rxc(fmc_qsfp_6_rxc_2_int), + .phy_2_tx_bad_block(), + .phy_2_rx_error_count(), + .phy_2_rx_bad_block(), + .phy_2_rx_sequence_error(), + .phy_2_rx_block_lock(fmc_qsfp_6_rx_block_lock_2), + .phy_2_rx_status(), + .phy_2_cfg_tx_prbs31_enable(1'b0), + .phy_2_cfg_rx_prbs31_enable(1'b0), -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_6_phy_2_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), + .phy_3_tx_clk(fmc_qsfp_6_tx_clk_3_int), + .phy_3_tx_rst(fmc_qsfp_6_tx_rst_3_int), + .phy_3_xgmii_txd(fmc_qsfp_6_txd_3_int), + .phy_3_xgmii_txc(fmc_qsfp_6_txc_3_int), + .phy_3_rx_clk(fmc_qsfp_6_rx_clk_3_int), + .phy_3_rx_rst(fmc_qsfp_6_rx_rst_3_int), + .phy_3_xgmii_rxd(fmc_qsfp_6_rxd_3_int), + .phy_3_xgmii_rxc(fmc_qsfp_6_rxc_3_int), + .phy_3_tx_bad_block(), + .phy_3_rx_error_count(), + .phy_3_rx_bad_block(), + .phy_3_rx_sequence_error(), + .phy_3_rx_block_lock(fmc_qsfp_6_rx_block_lock_3), + .phy_3_rx_status(), + .phy_3_cfg_tx_prbs31_enable(1'b0), + .phy_3_cfg_rx_prbs31_enable(1'b0), - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_6_tx_p[1]), - .xcvr_txn(fmc_qsfp_6_tx_n[1]), - .xcvr_rxp(fmc_qsfp_6_rx_p[1]), - .xcvr_rxn(fmc_qsfp_6_rx_n[1]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_6_tx_clk_2_int), - .phy_tx_rst(fmc_qsfp_6_tx_rst_2_int), - .phy_xgmii_txd(fmc_qsfp_6_txd_2_int), - .phy_xgmii_txc(fmc_qsfp_6_txc_2_int), - .phy_rx_clk(fmc_qsfp_6_rx_clk_2_int), - .phy_rx_rst(fmc_qsfp_6_rx_rst_2_int), - .phy_xgmii_rxd(fmc_qsfp_6_rxd_2_int), - .phy_xgmii_rxc(fmc_qsfp_6_rxc_2_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_6_rx_block_lock_2), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_6_phy_3_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_6_tx_p[2]), - .xcvr_txn(fmc_qsfp_6_tx_n[2]), - .xcvr_rxp(fmc_qsfp_6_rx_p[2]), - .xcvr_rxn(fmc_qsfp_6_rx_n[2]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_6_tx_clk_3_int), - .phy_tx_rst(fmc_qsfp_6_tx_rst_3_int), - .phy_xgmii_txd(fmc_qsfp_6_txd_3_int), - .phy_xgmii_txc(fmc_qsfp_6_txc_3_int), - .phy_rx_clk(fmc_qsfp_6_rx_clk_3_int), - .phy_rx_rst(fmc_qsfp_6_rx_rst_3_int), - .phy_xgmii_rxd(fmc_qsfp_6_rxd_3_int), - .phy_xgmii_rxc(fmc_qsfp_6_rxc_3_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_6_rx_block_lock_3), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) -); - -eth_xcvr_phy_wrapper #( - .HAS_COMMON(0) -) -fmc_qsfp_6_phy_4_inst ( - .xcvr_ctrl_clk(clk_125mhz_int), - .xcvr_ctrl_rst(fmc_qsfp_reset), - - // Common - .xcvr_gtpowergood_out(), - - // PLL out - .xcvr_gtrefclk00_in(1'b0), - .xcvr_qpll0lock_out(), - .xcvr_qpll0outclk_out(), - .xcvr_qpll0outrefclk_out(), - - // PLL in - .xcvr_qpll0lock_in(fmc_qsfp_6_qpll0lock), - .xcvr_qpll0reset_out(), - .xcvr_qpll0clk_in(fmc_qsfp_6_qpll0outclk), - .xcvr_qpll0refclk_in(fmc_qsfp_6_qpll0outrefclk), - - // Serial data - .xcvr_txp(fmc_qsfp_6_tx_p[3]), - .xcvr_txn(fmc_qsfp_6_tx_n[3]), - .xcvr_rxp(fmc_qsfp_6_rx_p[3]), - .xcvr_rxn(fmc_qsfp_6_rx_n[3]), - - // PHY connections - .phy_tx_clk(fmc_qsfp_6_tx_clk_4_int), - .phy_tx_rst(fmc_qsfp_6_tx_rst_4_int), - .phy_xgmii_txd(fmc_qsfp_6_txd_4_int), - .phy_xgmii_txc(fmc_qsfp_6_txc_4_int), - .phy_rx_clk(fmc_qsfp_6_rx_clk_4_int), - .phy_rx_rst(fmc_qsfp_6_rx_rst_4_int), - .phy_xgmii_rxd(fmc_qsfp_6_rxd_4_int), - .phy_xgmii_rxc(fmc_qsfp_6_rxc_4_int), - .phy_tx_bad_block(), - .phy_rx_error_count(), - .phy_rx_bad_block(), - .phy_rx_sequence_error(), - .phy_rx_block_lock(fmc_qsfp_6_rx_block_lock_4), - .phy_rx_high_ber(), - .phy_cfg_tx_prbs31_enable(1'b0), - .phy_cfg_rx_prbs31_enable(1'b0) + .phy_4_tx_clk(fmc_qsfp_6_tx_clk_4_int), + .phy_4_tx_rst(fmc_qsfp_6_tx_rst_4_int), + .phy_4_xgmii_txd(fmc_qsfp_6_txd_4_int), + .phy_4_xgmii_txc(fmc_qsfp_6_txc_4_int), + .phy_4_rx_clk(fmc_qsfp_6_rx_clk_4_int), + .phy_4_rx_rst(fmc_qsfp_6_rx_rst_4_int), + .phy_4_xgmii_rxd(fmc_qsfp_6_rxd_4_int), + .phy_4_xgmii_rxc(fmc_qsfp_6_rxc_4_int), + .phy_4_tx_bad_block(), + .phy_4_rx_error_count(), + .phy_4_rx_bad_block(), + .phy_4_rx_sequence_error(), + .phy_4_rx_block_lock(fmc_qsfp_6_rx_block_lock_4), + .phy_4_rx_status(), + .phy_4_cfg_tx_prbs31_enable(1'b0), + .phy_4_cfg_rx_prbs31_enable(1'b0) ); fpga_core