From 7a0e88ffeaa93ec64c58bf0d1e940eeb28eb3538 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 13 Jan 2023 14:57:46 -0800 Subject: [PATCH] Update vivado.mk Signed-off-by: Alex Forencich --- .../ADM_PCIE_9V3/fpga_10g/common/vivado.mk | 56 +++++++++++-------- .../ADM_PCIE_9V3/fpga_25g/common/vivado.mk | 56 +++++++++++-------- example/AU200/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/AU250/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/AU280/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/AU50/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/Arty/fpga/common/vivado.mk | 56 +++++++++++-------- example/ExaNIC_X10/fpga/common/vivado.mk | 56 +++++++++++-------- example/ExaNIC_X25/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/HTG9200/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/KC705/fpga_gmii/common/vivado.mk | 56 +++++++++++-------- example/KC705/fpga_rgmii/common/vivado.mk | 56 +++++++++++-------- example/KC705/fpga_sgmii/common/vivado.mk | 56 +++++++++++-------- example/NetFPGA_SUME/fpga/common/vivado.mk | 56 +++++++++++-------- example/NexysVideo/fpga/common/vivado.mk | 56 +++++++++++-------- example/VCU108/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/VCU108/fpga_1g/common/vivado.mk | 56 +++++++++++-------- example/VCU118/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/VCU118/fpga_1g/common/vivado.mk | 56 +++++++++++-------- example/VCU118/fpga_25g/common/vivado.mk | 56 +++++++++++-------- example/VCU1525/fpga_10g/common/vivado.mk | 56 +++++++++++-------- example/ZCU102/fpga/common/vivado.mk | 56 +++++++++++-------- example/ZCU106/fpga/common/vivado.mk | 56 +++++++++++-------- example/fb2CG/fpga_10g/common/vivado.mk | 56 +++++++++++-------- 24 files changed, 768 insertions(+), 576 deletions(-) diff --git a/example/ADM_PCIE_9V3/fpga_10g/common/vivado.mk b/example/ADM_PCIE_9V3/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ADM_PCIE_9V3/fpga_10g/common/vivado.mk +++ b/example/ADM_PCIE_9V3/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/ADM_PCIE_9V3/fpga_25g/common/vivado.mk b/example/ADM_PCIE_9V3/fpga_25g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ADM_PCIE_9V3/fpga_25g/common/vivado.mk +++ b/example/ADM_PCIE_9V3/fpga_25g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/AU200/fpga_10g/common/vivado.mk b/example/AU200/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/AU200/fpga_10g/common/vivado.mk +++ b/example/AU200/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/AU250/fpga_10g/common/vivado.mk b/example/AU250/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/AU250/fpga_10g/common/vivado.mk +++ b/example/AU250/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/AU280/fpga_10g/common/vivado.mk b/example/AU280/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/AU280/fpga_10g/common/vivado.mk +++ b/example/AU280/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/AU50/fpga_10g/common/vivado.mk b/example/AU50/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/AU50/fpga_10g/common/vivado.mk +++ b/example/AU50/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/Arty/fpga/common/vivado.mk b/example/Arty/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/Arty/fpga/common/vivado.mk +++ b/example/Arty/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/ExaNIC_X10/fpga/common/vivado.mk b/example/ExaNIC_X10/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ExaNIC_X10/fpga/common/vivado.mk +++ b/example/ExaNIC_X10/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/ExaNIC_X25/fpga_10g/common/vivado.mk b/example/ExaNIC_X25/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ExaNIC_X25/fpga_10g/common/vivado.mk +++ b/example/ExaNIC_X25/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/HTG9200/fpga_10g/common/vivado.mk b/example/HTG9200/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/HTG9200/fpga_10g/common/vivado.mk +++ b/example/HTG9200/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/KC705/fpga_gmii/common/vivado.mk b/example/KC705/fpga_gmii/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/KC705/fpga_gmii/common/vivado.mk +++ b/example/KC705/fpga_gmii/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/KC705/fpga_rgmii/common/vivado.mk b/example/KC705/fpga_rgmii/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/KC705/fpga_rgmii/common/vivado.mk +++ b/example/KC705/fpga_rgmii/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/KC705/fpga_sgmii/common/vivado.mk b/example/KC705/fpga_sgmii/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/KC705/fpga_sgmii/common/vivado.mk +++ b/example/KC705/fpga_sgmii/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/NetFPGA_SUME/fpga/common/vivado.mk b/example/NetFPGA_SUME/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/NetFPGA_SUME/fpga/common/vivado.mk +++ b/example/NetFPGA_SUME/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/NexysVideo/fpga/common/vivado.mk b/example/NexysVideo/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/NexysVideo/fpga/common/vivado.mk +++ b/example/NexysVideo/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU108/fpga_10g/common/vivado.mk b/example/VCU108/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU108/fpga_10g/common/vivado.mk +++ b/example/VCU108/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU108/fpga_1g/common/vivado.mk b/example/VCU108/fpga_1g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU108/fpga_1g/common/vivado.mk +++ b/example/VCU108/fpga_1g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU118/fpga_10g/common/vivado.mk b/example/VCU118/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU118/fpga_10g/common/vivado.mk +++ b/example/VCU118/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU118/fpga_1g/common/vivado.mk b/example/VCU118/fpga_1g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU118/fpga_1g/common/vivado.mk +++ b/example/VCU118/fpga_1g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU118/fpga_25g/common/vivado.mk b/example/VCU118/fpga_25g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU118/fpga_25g/common/vivado.mk +++ b/example/VCU118/fpga_25g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/VCU1525/fpga_10g/common/vivado.mk b/example/VCU1525/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/VCU1525/fpga_10g/common/vivado.mk +++ b/example/VCU1525/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/ZCU102/fpga/common/vivado.mk b/example/ZCU102/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ZCU102/fpga/common/vivado.mk +++ b/example/ZCU102/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/ZCU106/fpga/common/vivado.mk b/example/ZCU106/fpga/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/ZCU106/fpga/common/vivado.mk +++ b/example/ZCU106/fpga/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi diff --git a/example/fb2CG/fpga_10g/common/vivado.mk b/example/fb2CG/fpga_10g/common/vivado.mk index 83bcb8d90..21e6a5fed 100644 --- a/example/fb2CG/fpga_10g/common/vivado.mk +++ b/example/fb2CG/fpga_10g/common/vivado.mk @@ -37,6 +37,9 @@ CONFIG ?= config.mk -include ../$(CONFIG) +FPGA_TOP ?= fpga +PROJECT ?= $(FPGA_TOP) + SYN_FILES_REL = $(patsubst %, ../%, $(SYN_FILES)) INC_FILES_REL = $(patsubst %, ../%, $(INC_FILES)) XCI_FILES_REL = $(patsubst %, ../%, $(XCI_FILES)) @@ -67,7 +70,8 @@ tmpclean: -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl clean: tmpclean - -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *.bit *.ltx program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl + -rm -rf *_utilization.rpt *_utilization_hierarchical.rpt distclean: clean -rm -rf rev @@ -77,47 +81,51 @@ distclean: clean ################################################################### # Vivado project file -%.xpr: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) +create_project.tcl: Makefile $(XCI_FILES_REL) $(IP_TCL_FILES_REL) rm -rf defines.v touch defines.v for x in $(DEFS); do echo '`define' $$x >> defines.v; done - echo "create_project -force -part $(FPGA_PART) $*" > create_project.tcl - echo "add_files -fileset sources_1 defines.v" >> create_project.tcl - for x in $(SYN_FILES_REL); do echo "add_files -fileset sources_1 $$x" >> create_project.tcl; done - for x in $(XDC_FILES_REL); do echo "add_files -fileset constrs_1 $$x" >> create_project.tcl; done - for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> create_project.tcl; done - for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> create_project.tcl; done - echo "exit" >> create_project.tcl - vivado -nojournal -nolog -mode batch -source create_project.tcl + echo "create_project -force -part $(FPGA_PART) $(PROJECT)" > $@ + echo "add_files -fileset sources_1 defines.v $(SYN_FILES_REL)" >> $@ + echo "set_property top $(FPGA_TOP) [current_fileset]" >> $@ + echo "add_files -fileset constrs_1 $(XDC_FILES_REL)" >> $@ + for x in $(XCI_FILES_REL); do echo "import_ip $$x" >> $@; done + for x in $(IP_TCL_FILES_REL); do echo "source $$x" >> $@; done + +$(PROJECT).xpr: create_project.tcl + vivado -nojournal -nolog -mode batch $(foreach x,$?,-source $x) # synthesis run -%.runs/synth_1/%.dcp: %.xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) - echo "open_project $*.xpr" > run_synth.tcl +$(PROJECT).runs/synth_1/$(PROJECT).dcp: $(PROJECT).xpr $(SYN_FILES_REL) $(INC_FILES_REL) $(XDC_FILES_REL) + echo "open_project $(PROJECT).xpr" > run_synth.tcl echo "reset_run synth_1" >> run_synth.tcl echo "launch_runs -jobs 4 synth_1" >> run_synth.tcl echo "wait_on_run synth_1" >> run_synth.tcl - echo "exit" >> run_synth.tcl vivado -nojournal -nolog -mode batch -source run_synth.tcl # implementation run -%.runs/impl_1/%_routed.dcp: %.runs/synth_1/%.dcp - echo "open_project $*.xpr" > run_impl.tcl +$(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp: $(PROJECT).runs/synth_1/$(PROJECT).dcp + echo "open_project $(PROJECT).xpr" > run_impl.tcl echo "reset_run impl_1" >> run_impl.tcl echo "launch_runs -jobs 4 impl_1" >> run_impl.tcl echo "wait_on_run impl_1" >> run_impl.tcl - echo "exit" >> run_impl.tcl + echo "open_run impl_1" >> run_impl.tcl + echo "report_utilization -file $(PROJECT)_utilization.rpt" >> run_impl.tcl + echo "report_utilization -hierarchical -file $(PROJECT)_utilization_hierarchical.rpt" >> run_impl.tcl vivado -nojournal -nolog -mode batch -source run_impl.tcl # bit file -%.bit: %.runs/impl_1/%_routed.dcp - echo "open_project $*.xpr" > generate_bit.tcl +$(PROJECT).bit $(PROJECT).ltx: $(PROJECT).runs/impl_1/$(PROJECT)_routed.dcp + echo "open_project $(PROJECT).xpr" > generate_bit.tcl echo "open_run impl_1" >> generate_bit.tcl - echo "write_bitstream -force $*.bit" >> generate_bit.tcl - echo "exit" >> generate_bit.tcl + echo "write_bitstream -force $(PROJECT).runs/impl_1/$(PROJECT).bit" >> generate_bit.tcl + echo "write_debug_probes -force $(PROJECT).runs/impl_1/$(PROJECT).ltx" >> generate_bit.tcl vivado -nojournal -nolog -mode batch -source generate_bit.tcl + ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).bit . + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then ln -f -s $(PROJECT).runs/impl_1/$(PROJECT).ltx .; fi mkdir -p rev - EXT=bit; COUNT=100; \ - while [ -e rev/$*_rev$$COUNT.$$EXT ]; \ + COUNT=100; \ + while [ -e rev/$(PROJECT)_rev$$COUNT.bit ]; \ do COUNT=$$((COUNT+1)); done; \ - cp $@ rev/$*_rev$$COUNT.$$EXT; \ - echo "Output: rev/$*_rev$$COUNT.$$EXT"; + cp -pv $(PROJECT).runs/impl_1/$(PROJECT).bit rev/$(PROJECT)_rev$$COUNT.bit; \ + if [ -e $(PROJECT).runs/impl_1/$(PROJECT).ltx ]; then cp -pv $(PROJECT).runs/impl_1/$(PROJECT).ltx rev/$(PROJECT)_rev$$COUNT.ltx; fi