diff --git a/example/ATLYS/fpga/fpga/Makefile b/example/ATLYS/fpga/fpga/Makefile index ce0381e91..ca2f8954a 100644 --- a/example/ATLYS/fpga/fpga/Makefile +++ b/example/ATLYS/fpga/fpga/Makefile @@ -47,7 +47,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v #SYN_FILES += coregen/dcm_i100_o125/dcm_i100_o125.v # UCF files diff --git a/example/ATLYS/fpga/rtl/fpga_core.v b/example/ATLYS/fpga/rtl/fpga_core.v index b55dae1c5..ad68f8006 100644 --- a/example/ATLYS/fpga/rtl/fpga_core.v +++ b/example/ATLYS/fpga/rtl/fpga_core.v @@ -317,7 +317,9 @@ eth_mac_1g_gmii_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .gtx_clk(clk), @@ -550,31 +552,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/ATLYS/fpga/tb/test_fpga_core.py b/example/ATLYS/fpga/tb/test_fpga_core.py index 9a4eaa413..e0f9fcefc 100755 --- a/example/ATLYS/fpga/tb/test_fpga_core.py +++ b/example/ATLYS/fpga/tb/test_fpga_core.py @@ -70,7 +70,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/DE5-Net/fpga/fpga/Makefile b/example/DE5-Net/fpga/fpga/Makefile index fba61fa3a..44641f6fc 100644 --- a/example/DE5-Net/fpga/fpga/Makefile +++ b/example/DE5-Net/fpga/fpga/Makefile @@ -41,7 +41,7 @@ SYN_FILES += lib/eth/rtl/xgmii_deinterleave.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v SYN_FILES += cores/phy/phy.qip SYN_FILES += cores/phy_reconfig/phy_reconfig.qip diff --git a/example/DE5-Net/fpga/rtl/fpga_core.v b/example/DE5-Net/fpga/rtl/fpga_core.v index c97f87dd9..3a8604c17 100644 --- a/example/DE5-Net/fpga/rtl/fpga_core.v +++ b/example/DE5-Net/fpga/rtl/fpga_core.v @@ -336,7 +336,9 @@ eth_mac_10g_fifo #( .ENABLE_DIC(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(9), - .RX_FIFO_ADDR_WIDTH(9) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(9), + .RX_FRAME_FIFO(1) ) eth_mac_10g_fifo_inst ( .rx_clk(clk), @@ -578,31 +580,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(rx_fifo_udp_payload_tkeep), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(rx_fifo_udp_payload_tkeep), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(tx_fifo_udp_payload_tkeep), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(tx_fifo_udp_payload_tkeep), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/DE5-Net/fpga/tb/test_fpga_core.py b/example/DE5-Net/fpga/tb/test_fpga_core.py index 0fd1a8b1b..129b3e0ab 100755 --- a/example/DE5-Net/fpga/tb/test_fpga_core.py +++ b/example/DE5-Net/fpga/tb/test_fpga_core.py @@ -64,7 +64,7 @@ srcs.append("../lib/eth/rtl/eth_mux_64_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/HXT100G/fpga/fpga/Makefile b/example/HXT100G/fpga/fpga/Makefile index 06c1a6e4a..23454c522 100644 --- a/example/HXT100G/fpga/fpga/Makefile +++ b/example/HXT100G/fpga/fpga/Makefile @@ -44,7 +44,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_64_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6/ten_gig_eth_pcs_pma_v2_6.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6/ten_gig_eth_pcs_pma_v2_6/example_design/ten_gig_eth_pcs_pma_v2_6_management_arbiter.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6_v6gth_wrapper/ten_gig_eth_pcs_pma_v2_6_v6gth_wrapper_quad.v diff --git a/example/HXT100G/fpga/rtl/fpga_core.v b/example/HXT100G/fpga/rtl/fpga_core.v index 56fee2161..16c386580 100644 --- a/example/HXT100G/fpga/rtl/fpga_core.v +++ b/example/HXT100G/fpga/rtl/fpga_core.v @@ -480,7 +480,9 @@ eth_mac_10g_fifo #( .ENABLE_DIC(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(9), - .RX_FIFO_ADDR_WIDTH(9) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(9), + .RX_FRAME_FIFO(1) ) eth_mac_10g_fifo_inst ( .rx_clk(clk), @@ -722,31 +724,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(rx_fifo_udp_payload_tkeep), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(rx_fifo_udp_payload_tkeep), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(tx_fifo_udp_payload_tkeep), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(tx_fifo_udp_payload_tkeep), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/HXT100G/fpga/tb/test_fpga_core.py b/example/HXT100G/fpga/tb/test_fpga_core.py index baf1c7b17..f78bccea3 100755 --- a/example/HXT100G/fpga/tb/test_fpga_core.py +++ b/example/HXT100G/fpga/tb/test_fpga_core.py @@ -64,7 +64,7 @@ srcs.append("../lib/eth/rtl/eth_mux_64_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/HXT100G/fpga_cxpt16/fpga/Makefile b/example/HXT100G/fpga_cxpt16/fpga/Makefile index 721af3e0e..d2771adf9 100644 --- a/example/HXT100G/fpga_cxpt16/fpga/Makefile +++ b/example/HXT100G/fpga_cxpt16/fpga/Makefile @@ -17,7 +17,6 @@ SYN_FILES += rtl/sync_signal.v SYN_FILES += rtl/i2c_master.v SYN_FILES += rtl/gth_i2c_init.v SYN_FILES += rtl/eth_gth_phy_quad.v -SYN_FILES += rtl/axis_crosspoint_16x16.v SYN_FILES += lib/eth/rtl/eth_mac_10g_fifo.v SYN_FILES += lib/eth/rtl/eth_mac_10g.v SYN_FILES += lib/eth/rtl/axis_xgmii_rx_64.v @@ -25,7 +24,8 @@ SYN_FILES += lib/eth/rtl/axis_xgmii_tx_64.v SYN_FILES += lib/eth/rtl/lfsr.v SYN_FILES += lib/eth/rtl/eth_axis_rx_64.v SYN_FILES += lib/eth/rtl/eth_axis_tx_64.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_crosspoint.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6/ten_gig_eth_pcs_pma_v2_6.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6/ten_gig_eth_pcs_pma_v2_6/example_design/ten_gig_eth_pcs_pma_v2_6_management_arbiter.v SYN_FILES += coregen/ten_gig_eth_pcs_pma_v2_6_v6gth_wrapper/ten_gig_eth_pcs_pma_v2_6_v6gth_wrapper_quad.v diff --git a/example/HXT100G/fpga_cxpt16/rtl/axis_crosspoint_16x16.v b/example/HXT100G/fpga_cxpt16/rtl/axis_crosspoint_16x16.v deleted file mode 100644 index 25fa61576..000000000 --- a/example/HXT100G/fpga_cxpt16/rtl/axis_crosspoint_16x16.v +++ /dev/null @@ -1,3334 +0,0 @@ -/* - -Copyright (c) 2014-2018 Alex Forencich - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in -all copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -THE SOFTWARE. - -*/ - -// Language: Verilog 2001 - -`timescale 1ns / 1ps - -/* - * AXI4-Stream 16x16 crosspoint - */ -module axis_crosspoint_16x16 # -( - parameter DATA_WIDTH = 8, - parameter KEEP_ENABLE = (DATA_WIDTH>8), - parameter KEEP_WIDTH = (DATA_WIDTH/8), - parameter LAST_ENABLE = 1, - parameter ID_ENABLE = 0, - parameter ID_WIDTH = 8, - parameter DEST_ENABLE = 0, - parameter DEST_WIDTH = 8, - parameter USER_ENABLE = 1, - parameter USER_WIDTH = 1 -) -( - input wire clk, - input wire rst, - - /* - * AXI Stream inputs - */ - input wire [DATA_WIDTH-1:0] input_0_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_0_axis_tkeep, - input wire input_0_axis_tvalid, - input wire input_0_axis_tlast, - input wire [ID_WIDTH-1:0] input_0_axis_tid, - input wire [DEST_WIDTH-1:0] input_0_axis_tdest, - input wire [USER_WIDTH-1:0] input_0_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_1_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_1_axis_tkeep, - input wire input_1_axis_tvalid, - input wire input_1_axis_tlast, - input wire [ID_WIDTH-1:0] input_1_axis_tid, - input wire [DEST_WIDTH-1:0] input_1_axis_tdest, - input wire [USER_WIDTH-1:0] input_1_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_2_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_2_axis_tkeep, - input wire input_2_axis_tvalid, - input wire input_2_axis_tlast, - input wire [ID_WIDTH-1:0] input_2_axis_tid, - input wire [DEST_WIDTH-1:0] input_2_axis_tdest, - input wire [USER_WIDTH-1:0] input_2_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_3_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_3_axis_tkeep, - input wire input_3_axis_tvalid, - input wire input_3_axis_tlast, - input wire [ID_WIDTH-1:0] input_3_axis_tid, - input wire [DEST_WIDTH-1:0] input_3_axis_tdest, - input wire [USER_WIDTH-1:0] input_3_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_4_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_4_axis_tkeep, - input wire input_4_axis_tvalid, - input wire input_4_axis_tlast, - input wire [ID_WIDTH-1:0] input_4_axis_tid, - input wire [DEST_WIDTH-1:0] input_4_axis_tdest, - input wire [USER_WIDTH-1:0] input_4_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_5_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_5_axis_tkeep, - input wire input_5_axis_tvalid, - input wire input_5_axis_tlast, - input wire [ID_WIDTH-1:0] input_5_axis_tid, - input wire [DEST_WIDTH-1:0] input_5_axis_tdest, - input wire [USER_WIDTH-1:0] input_5_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_6_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_6_axis_tkeep, - input wire input_6_axis_tvalid, - input wire input_6_axis_tlast, - input wire [ID_WIDTH-1:0] input_6_axis_tid, - input wire [DEST_WIDTH-1:0] input_6_axis_tdest, - input wire [USER_WIDTH-1:0] input_6_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_7_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_7_axis_tkeep, - input wire input_7_axis_tvalid, - input wire input_7_axis_tlast, - input wire [ID_WIDTH-1:0] input_7_axis_tid, - input wire [DEST_WIDTH-1:0] input_7_axis_tdest, - input wire [USER_WIDTH-1:0] input_7_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_8_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_8_axis_tkeep, - input wire input_8_axis_tvalid, - input wire input_8_axis_tlast, - input wire [ID_WIDTH-1:0] input_8_axis_tid, - input wire [DEST_WIDTH-1:0] input_8_axis_tdest, - input wire [USER_WIDTH-1:0] input_8_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_9_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_9_axis_tkeep, - input wire input_9_axis_tvalid, - input wire input_9_axis_tlast, - input wire [ID_WIDTH-1:0] input_9_axis_tid, - input wire [DEST_WIDTH-1:0] input_9_axis_tdest, - input wire [USER_WIDTH-1:0] input_9_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_10_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_10_axis_tkeep, - input wire input_10_axis_tvalid, - input wire input_10_axis_tlast, - input wire [ID_WIDTH-1:0] input_10_axis_tid, - input wire [DEST_WIDTH-1:0] input_10_axis_tdest, - input wire [USER_WIDTH-1:0] input_10_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_11_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_11_axis_tkeep, - input wire input_11_axis_tvalid, - input wire input_11_axis_tlast, - input wire [ID_WIDTH-1:0] input_11_axis_tid, - input wire [DEST_WIDTH-1:0] input_11_axis_tdest, - input wire [USER_WIDTH-1:0] input_11_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_12_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_12_axis_tkeep, - input wire input_12_axis_tvalid, - input wire input_12_axis_tlast, - input wire [ID_WIDTH-1:0] input_12_axis_tid, - input wire [DEST_WIDTH-1:0] input_12_axis_tdest, - input wire [USER_WIDTH-1:0] input_12_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_13_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_13_axis_tkeep, - input wire input_13_axis_tvalid, - input wire input_13_axis_tlast, - input wire [ID_WIDTH-1:0] input_13_axis_tid, - input wire [DEST_WIDTH-1:0] input_13_axis_tdest, - input wire [USER_WIDTH-1:0] input_13_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_14_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_14_axis_tkeep, - input wire input_14_axis_tvalid, - input wire input_14_axis_tlast, - input wire [ID_WIDTH-1:0] input_14_axis_tid, - input wire [DEST_WIDTH-1:0] input_14_axis_tdest, - input wire [USER_WIDTH-1:0] input_14_axis_tuser, - - input wire [DATA_WIDTH-1:0] input_15_axis_tdata, - input wire [KEEP_WIDTH-1:0] input_15_axis_tkeep, - input wire input_15_axis_tvalid, - input wire input_15_axis_tlast, - input wire [ID_WIDTH-1:0] input_15_axis_tid, - input wire [DEST_WIDTH-1:0] input_15_axis_tdest, - input wire [USER_WIDTH-1:0] input_15_axis_tuser, - - /* - * AXI Stream outputs - */ - output wire [DATA_WIDTH-1:0] output_0_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_0_axis_tkeep, - output wire output_0_axis_tvalid, - output wire output_0_axis_tlast, - output wire [ID_WIDTH-1:0] output_0_axis_tid, - output wire [DEST_WIDTH-1:0] output_0_axis_tdest, - output wire [USER_WIDTH-1:0] output_0_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_1_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_1_axis_tkeep, - output wire output_1_axis_tvalid, - output wire output_1_axis_tlast, - output wire [ID_WIDTH-1:0] output_1_axis_tid, - output wire [DEST_WIDTH-1:0] output_1_axis_tdest, - output wire [USER_WIDTH-1:0] output_1_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_2_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_2_axis_tkeep, - output wire output_2_axis_tvalid, - output wire output_2_axis_tlast, - output wire [ID_WIDTH-1:0] output_2_axis_tid, - output wire [DEST_WIDTH-1:0] output_2_axis_tdest, - output wire [USER_WIDTH-1:0] output_2_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_3_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_3_axis_tkeep, - output wire output_3_axis_tvalid, - output wire output_3_axis_tlast, - output wire [ID_WIDTH-1:0] output_3_axis_tid, - output wire [DEST_WIDTH-1:0] output_3_axis_tdest, - output wire [USER_WIDTH-1:0] output_3_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_4_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_4_axis_tkeep, - output wire output_4_axis_tvalid, - output wire output_4_axis_tlast, - output wire [ID_WIDTH-1:0] output_4_axis_tid, - output wire [DEST_WIDTH-1:0] output_4_axis_tdest, - output wire [USER_WIDTH-1:0] output_4_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_5_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_5_axis_tkeep, - output wire output_5_axis_tvalid, - output wire output_5_axis_tlast, - output wire [ID_WIDTH-1:0] output_5_axis_tid, - output wire [DEST_WIDTH-1:0] output_5_axis_tdest, - output wire [USER_WIDTH-1:0] output_5_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_6_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_6_axis_tkeep, - output wire output_6_axis_tvalid, - output wire output_6_axis_tlast, - output wire [ID_WIDTH-1:0] output_6_axis_tid, - output wire [DEST_WIDTH-1:0] output_6_axis_tdest, - output wire [USER_WIDTH-1:0] output_6_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_7_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_7_axis_tkeep, - output wire output_7_axis_tvalid, - output wire output_7_axis_tlast, - output wire [ID_WIDTH-1:0] output_7_axis_tid, - output wire [DEST_WIDTH-1:0] output_7_axis_tdest, - output wire [USER_WIDTH-1:0] output_7_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_8_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_8_axis_tkeep, - output wire output_8_axis_tvalid, - output wire output_8_axis_tlast, - output wire [ID_WIDTH-1:0] output_8_axis_tid, - output wire [DEST_WIDTH-1:0] output_8_axis_tdest, - output wire [USER_WIDTH-1:0] output_8_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_9_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_9_axis_tkeep, - output wire output_9_axis_tvalid, - output wire output_9_axis_tlast, - output wire [ID_WIDTH-1:0] output_9_axis_tid, - output wire [DEST_WIDTH-1:0] output_9_axis_tdest, - output wire [USER_WIDTH-1:0] output_9_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_10_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_10_axis_tkeep, - output wire output_10_axis_tvalid, - output wire output_10_axis_tlast, - output wire [ID_WIDTH-1:0] output_10_axis_tid, - output wire [DEST_WIDTH-1:0] output_10_axis_tdest, - output wire [USER_WIDTH-1:0] output_10_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_11_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_11_axis_tkeep, - output wire output_11_axis_tvalid, - output wire output_11_axis_tlast, - output wire [ID_WIDTH-1:0] output_11_axis_tid, - output wire [DEST_WIDTH-1:0] output_11_axis_tdest, - output wire [USER_WIDTH-1:0] output_11_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_12_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_12_axis_tkeep, - output wire output_12_axis_tvalid, - output wire output_12_axis_tlast, - output wire [ID_WIDTH-1:0] output_12_axis_tid, - output wire [DEST_WIDTH-1:0] output_12_axis_tdest, - output wire [USER_WIDTH-1:0] output_12_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_13_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_13_axis_tkeep, - output wire output_13_axis_tvalid, - output wire output_13_axis_tlast, - output wire [ID_WIDTH-1:0] output_13_axis_tid, - output wire [DEST_WIDTH-1:0] output_13_axis_tdest, - output wire [USER_WIDTH-1:0] output_13_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_14_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_14_axis_tkeep, - output wire output_14_axis_tvalid, - output wire output_14_axis_tlast, - output wire [ID_WIDTH-1:0] output_14_axis_tid, - output wire [DEST_WIDTH-1:0] output_14_axis_tdest, - output wire [USER_WIDTH-1:0] output_14_axis_tuser, - - output wire [DATA_WIDTH-1:0] output_15_axis_tdata, - output wire [KEEP_WIDTH-1:0] output_15_axis_tkeep, - output wire output_15_axis_tvalid, - output wire output_15_axis_tlast, - output wire [ID_WIDTH-1:0] output_15_axis_tid, - output wire [DEST_WIDTH-1:0] output_15_axis_tdest, - output wire [USER_WIDTH-1:0] output_15_axis_tuser, - - /* - * Control - */ - input wire [3:0] output_0_select, - input wire [3:0] output_1_select, - input wire [3:0] output_2_select, - input wire [3:0] output_3_select, - input wire [3:0] output_4_select, - input wire [3:0] output_5_select, - input wire [3:0] output_6_select, - input wire [3:0] output_7_select, - input wire [3:0] output_8_select, - input wire [3:0] output_9_select, - input wire [3:0] output_10_select, - input wire [3:0] output_11_select, - input wire [3:0] output_12_select, - input wire [3:0] output_13_select, - input wire [3:0] output_14_select, - input wire [3:0] output_15_select -); - -reg [DATA_WIDTH-1:0] input_0_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_0_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_0_axis_tvalid_reg = 1'b0; -reg input_0_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_0_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_0_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_0_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_1_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_1_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_1_axis_tvalid_reg = 1'b0; -reg input_1_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_1_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_1_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_1_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_2_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_2_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_2_axis_tvalid_reg = 1'b0; -reg input_2_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_2_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_2_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_2_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_3_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_3_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_3_axis_tvalid_reg = 1'b0; -reg input_3_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_3_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_3_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_3_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_4_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_4_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_4_axis_tvalid_reg = 1'b0; -reg input_4_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_4_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_4_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_4_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_5_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_5_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_5_axis_tvalid_reg = 1'b0; -reg input_5_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_5_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_5_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_5_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_6_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_6_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_6_axis_tvalid_reg = 1'b0; -reg input_6_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_6_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_6_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_6_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_7_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_7_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_7_axis_tvalid_reg = 1'b0; -reg input_7_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_7_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_7_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_7_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_8_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_8_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_8_axis_tvalid_reg = 1'b0; -reg input_8_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_8_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_8_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_8_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_9_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_9_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_9_axis_tvalid_reg = 1'b0; -reg input_9_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_9_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_9_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_9_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_10_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_10_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_10_axis_tvalid_reg = 1'b0; -reg input_10_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_10_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_10_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_10_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_11_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_11_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_11_axis_tvalid_reg = 1'b0; -reg input_11_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_11_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_11_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_11_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_12_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_12_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_12_axis_tvalid_reg = 1'b0; -reg input_12_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_12_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_12_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_12_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_13_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_13_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_13_axis_tvalid_reg = 1'b0; -reg input_13_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_13_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_13_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_13_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_14_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_14_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_14_axis_tvalid_reg = 1'b0; -reg input_14_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_14_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_14_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_14_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] input_15_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] input_15_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg input_15_axis_tvalid_reg = 1'b0; -reg input_15_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] input_15_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] input_15_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] input_15_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_0_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_0_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_0_axis_tvalid_reg = 1'b0; -reg output_0_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_0_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_0_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_0_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_1_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_1_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_1_axis_tvalid_reg = 1'b0; -reg output_1_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_1_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_1_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_1_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_2_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_2_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_2_axis_tvalid_reg = 1'b0; -reg output_2_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_2_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_2_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_2_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_3_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_3_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_3_axis_tvalid_reg = 1'b0; -reg output_3_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_3_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_3_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_3_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_4_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_4_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_4_axis_tvalid_reg = 1'b0; -reg output_4_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_4_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_4_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_4_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_5_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_5_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_5_axis_tvalid_reg = 1'b0; -reg output_5_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_5_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_5_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_5_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_6_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_6_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_6_axis_tvalid_reg = 1'b0; -reg output_6_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_6_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_6_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_6_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_7_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_7_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_7_axis_tvalid_reg = 1'b0; -reg output_7_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_7_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_7_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_7_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_8_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_8_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_8_axis_tvalid_reg = 1'b0; -reg output_8_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_8_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_8_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_8_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_9_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_9_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_9_axis_tvalid_reg = 1'b0; -reg output_9_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_9_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_9_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_9_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_10_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_10_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_10_axis_tvalid_reg = 1'b0; -reg output_10_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_10_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_10_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_10_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_11_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_11_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_11_axis_tvalid_reg = 1'b0; -reg output_11_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_11_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_11_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_11_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_12_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_12_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_12_axis_tvalid_reg = 1'b0; -reg output_12_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_12_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_12_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_12_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_13_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_13_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_13_axis_tvalid_reg = 1'b0; -reg output_13_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_13_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_13_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_13_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_14_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_14_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_14_axis_tvalid_reg = 1'b0; -reg output_14_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_14_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_14_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_14_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [DATA_WIDTH-1:0] output_15_axis_tdata_reg = {DATA_WIDTH{1'b0}}; -reg [KEEP_WIDTH-1:0] output_15_axis_tkeep_reg = {KEEP_WIDTH{1'b0}}; -reg output_15_axis_tvalid_reg = 1'b0; -reg output_15_axis_tlast_reg = 1'b0; -reg [ID_WIDTH-1:0] output_15_axis_tid_reg = {ID_WIDTH{1'b0}}; -reg [DEST_WIDTH-1:0] output_15_axis_tdest_reg = {DEST_WIDTH{1'b0}}; -reg [USER_WIDTH-1:0] output_15_axis_tuser_reg = {USER_WIDTH{1'b0}}; - -reg [3:0] output_0_select_reg = 4'd0; -reg [3:0] output_1_select_reg = 4'd0; -reg [3:0] output_2_select_reg = 4'd0; -reg [3:0] output_3_select_reg = 4'd0; -reg [3:0] output_4_select_reg = 4'd0; -reg [3:0] output_5_select_reg = 4'd0; -reg [3:0] output_6_select_reg = 4'd0; -reg [3:0] output_7_select_reg = 4'd0; -reg [3:0] output_8_select_reg = 4'd0; -reg [3:0] output_9_select_reg = 4'd0; -reg [3:0] output_10_select_reg = 4'd0; -reg [3:0] output_11_select_reg = 4'd0; -reg [3:0] output_12_select_reg = 4'd0; -reg [3:0] output_13_select_reg = 4'd0; -reg [3:0] output_14_select_reg = 4'd0; -reg [3:0] output_15_select_reg = 4'd0; - -assign output_0_axis_tdata = output_0_axis_tdata_reg; -assign output_0_axis_tkeep = KEEP_ENABLE ? output_0_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_0_axis_tvalid = output_0_axis_tvalid_reg; -assign output_0_axis_tlast = LAST_ENABLE ? output_0_axis_tlast_reg : 1'b1; -assign output_0_axis_tid = ID_ENABLE ? output_0_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_0_axis_tdest = DEST_ENABLE ? output_0_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_0_axis_tuser = USER_ENABLE ? output_0_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_1_axis_tdata = output_1_axis_tdata_reg; -assign output_1_axis_tkeep = KEEP_ENABLE ? output_1_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_1_axis_tvalid = output_1_axis_tvalid_reg; -assign output_1_axis_tlast = LAST_ENABLE ? output_1_axis_tlast_reg : 1'b1; -assign output_1_axis_tid = ID_ENABLE ? output_1_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_1_axis_tdest = DEST_ENABLE ? output_1_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_1_axis_tuser = USER_ENABLE ? output_1_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_2_axis_tdata = output_2_axis_tdata_reg; -assign output_2_axis_tkeep = KEEP_ENABLE ? output_2_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_2_axis_tvalid = output_2_axis_tvalid_reg; -assign output_2_axis_tlast = LAST_ENABLE ? output_2_axis_tlast_reg : 1'b1; -assign output_2_axis_tid = ID_ENABLE ? output_2_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_2_axis_tdest = DEST_ENABLE ? output_2_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_2_axis_tuser = USER_ENABLE ? output_2_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_3_axis_tdata = output_3_axis_tdata_reg; -assign output_3_axis_tkeep = KEEP_ENABLE ? output_3_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_3_axis_tvalid = output_3_axis_tvalid_reg; -assign output_3_axis_tlast = LAST_ENABLE ? output_3_axis_tlast_reg : 1'b1; -assign output_3_axis_tid = ID_ENABLE ? output_3_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_3_axis_tdest = DEST_ENABLE ? output_3_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_3_axis_tuser = USER_ENABLE ? output_3_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_4_axis_tdata = output_4_axis_tdata_reg; -assign output_4_axis_tkeep = KEEP_ENABLE ? output_4_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_4_axis_tvalid = output_4_axis_tvalid_reg; -assign output_4_axis_tlast = LAST_ENABLE ? output_4_axis_tlast_reg : 1'b1; -assign output_4_axis_tid = ID_ENABLE ? output_4_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_4_axis_tdest = DEST_ENABLE ? output_4_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_4_axis_tuser = USER_ENABLE ? output_4_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_5_axis_tdata = output_5_axis_tdata_reg; -assign output_5_axis_tkeep = KEEP_ENABLE ? output_5_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_5_axis_tvalid = output_5_axis_tvalid_reg; -assign output_5_axis_tlast = LAST_ENABLE ? output_5_axis_tlast_reg : 1'b1; -assign output_5_axis_tid = ID_ENABLE ? output_5_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_5_axis_tdest = DEST_ENABLE ? output_5_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_5_axis_tuser = USER_ENABLE ? output_5_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_6_axis_tdata = output_6_axis_tdata_reg; -assign output_6_axis_tkeep = KEEP_ENABLE ? output_6_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_6_axis_tvalid = output_6_axis_tvalid_reg; -assign output_6_axis_tlast = LAST_ENABLE ? output_6_axis_tlast_reg : 1'b1; -assign output_6_axis_tid = ID_ENABLE ? output_6_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_6_axis_tdest = DEST_ENABLE ? output_6_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_6_axis_tuser = USER_ENABLE ? output_6_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_7_axis_tdata = output_7_axis_tdata_reg; -assign output_7_axis_tkeep = KEEP_ENABLE ? output_7_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_7_axis_tvalid = output_7_axis_tvalid_reg; -assign output_7_axis_tlast = LAST_ENABLE ? output_7_axis_tlast_reg : 1'b1; -assign output_7_axis_tid = ID_ENABLE ? output_7_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_7_axis_tdest = DEST_ENABLE ? output_7_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_7_axis_tuser = USER_ENABLE ? output_7_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_8_axis_tdata = output_8_axis_tdata_reg; -assign output_8_axis_tkeep = KEEP_ENABLE ? output_8_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_8_axis_tvalid = output_8_axis_tvalid_reg; -assign output_8_axis_tlast = LAST_ENABLE ? output_8_axis_tlast_reg : 1'b1; -assign output_8_axis_tid = ID_ENABLE ? output_8_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_8_axis_tdest = DEST_ENABLE ? output_8_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_8_axis_tuser = USER_ENABLE ? output_8_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_9_axis_tdata = output_9_axis_tdata_reg; -assign output_9_axis_tkeep = KEEP_ENABLE ? output_9_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_9_axis_tvalid = output_9_axis_tvalid_reg; -assign output_9_axis_tlast = LAST_ENABLE ? output_9_axis_tlast_reg : 1'b1; -assign output_9_axis_tid = ID_ENABLE ? output_9_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_9_axis_tdest = DEST_ENABLE ? output_9_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_9_axis_tuser = USER_ENABLE ? output_9_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_10_axis_tdata = output_10_axis_tdata_reg; -assign output_10_axis_tkeep = KEEP_ENABLE ? output_10_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_10_axis_tvalid = output_10_axis_tvalid_reg; -assign output_10_axis_tlast = LAST_ENABLE ? output_10_axis_tlast_reg : 1'b1; -assign output_10_axis_tid = ID_ENABLE ? output_10_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_10_axis_tdest = DEST_ENABLE ? output_10_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_10_axis_tuser = USER_ENABLE ? output_10_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_11_axis_tdata = output_11_axis_tdata_reg; -assign output_11_axis_tkeep = KEEP_ENABLE ? output_11_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_11_axis_tvalid = output_11_axis_tvalid_reg; -assign output_11_axis_tlast = LAST_ENABLE ? output_11_axis_tlast_reg : 1'b1; -assign output_11_axis_tid = ID_ENABLE ? output_11_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_11_axis_tdest = DEST_ENABLE ? output_11_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_11_axis_tuser = USER_ENABLE ? output_11_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_12_axis_tdata = output_12_axis_tdata_reg; -assign output_12_axis_tkeep = KEEP_ENABLE ? output_12_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_12_axis_tvalid = output_12_axis_tvalid_reg; -assign output_12_axis_tlast = LAST_ENABLE ? output_12_axis_tlast_reg : 1'b1; -assign output_12_axis_tid = ID_ENABLE ? output_12_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_12_axis_tdest = DEST_ENABLE ? output_12_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_12_axis_tuser = USER_ENABLE ? output_12_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_13_axis_tdata = output_13_axis_tdata_reg; -assign output_13_axis_tkeep = KEEP_ENABLE ? output_13_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_13_axis_tvalid = output_13_axis_tvalid_reg; -assign output_13_axis_tlast = LAST_ENABLE ? output_13_axis_tlast_reg : 1'b1; -assign output_13_axis_tid = ID_ENABLE ? output_13_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_13_axis_tdest = DEST_ENABLE ? output_13_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_13_axis_tuser = USER_ENABLE ? output_13_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_14_axis_tdata = output_14_axis_tdata_reg; -assign output_14_axis_tkeep = KEEP_ENABLE ? output_14_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_14_axis_tvalid = output_14_axis_tvalid_reg; -assign output_14_axis_tlast = LAST_ENABLE ? output_14_axis_tlast_reg : 1'b1; -assign output_14_axis_tid = ID_ENABLE ? output_14_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_14_axis_tdest = DEST_ENABLE ? output_14_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_14_axis_tuser = USER_ENABLE ? output_14_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -assign output_15_axis_tdata = output_15_axis_tdata_reg; -assign output_15_axis_tkeep = KEEP_ENABLE ? output_15_axis_tkeep_reg : {KEEP_WIDTH{1'b1}}; -assign output_15_axis_tvalid = output_15_axis_tvalid_reg; -assign output_15_axis_tlast = LAST_ENABLE ? output_15_axis_tlast_reg : 1'b1; -assign output_15_axis_tid = ID_ENABLE ? output_15_axis_tid_reg : {ID_WIDTH{1'b0}}; -assign output_15_axis_tdest = DEST_ENABLE ? output_15_axis_tdest_reg : {DEST_WIDTH{1'b0}}; -assign output_15_axis_tuser = USER_ENABLE ? output_15_axis_tuser_reg : {USER_WIDTH{1'b0}}; - -always @(posedge clk) begin - if (rst) begin - output_0_select_reg <= 4'd0; - output_1_select_reg <= 4'd0; - output_2_select_reg <= 4'd0; - output_3_select_reg <= 4'd0; - output_4_select_reg <= 4'd0; - output_5_select_reg <= 4'd0; - output_6_select_reg <= 4'd0; - output_7_select_reg <= 4'd0; - output_8_select_reg <= 4'd0; - output_9_select_reg <= 4'd0; - output_10_select_reg <= 4'd0; - output_11_select_reg <= 4'd0; - output_12_select_reg <= 4'd0; - output_13_select_reg <= 4'd0; - output_14_select_reg <= 4'd0; - output_15_select_reg <= 4'd0; - - input_0_axis_tvalid_reg <= 1'b0; - input_1_axis_tvalid_reg <= 1'b0; - input_2_axis_tvalid_reg <= 1'b0; - input_3_axis_tvalid_reg <= 1'b0; - input_4_axis_tvalid_reg <= 1'b0; - input_5_axis_tvalid_reg <= 1'b0; - input_6_axis_tvalid_reg <= 1'b0; - input_7_axis_tvalid_reg <= 1'b0; - input_8_axis_tvalid_reg <= 1'b0; - input_9_axis_tvalid_reg <= 1'b0; - input_10_axis_tvalid_reg <= 1'b0; - input_11_axis_tvalid_reg <= 1'b0; - input_12_axis_tvalid_reg <= 1'b0; - input_13_axis_tvalid_reg <= 1'b0; - input_14_axis_tvalid_reg <= 1'b0; - input_15_axis_tvalid_reg <= 1'b0; - - output_0_axis_tvalid_reg <= 1'b0; - output_1_axis_tvalid_reg <= 1'b0; - output_2_axis_tvalid_reg <= 1'b0; - output_3_axis_tvalid_reg <= 1'b0; - output_4_axis_tvalid_reg <= 1'b0; - output_5_axis_tvalid_reg <= 1'b0; - output_6_axis_tvalid_reg <= 1'b0; - output_7_axis_tvalid_reg <= 1'b0; - output_8_axis_tvalid_reg <= 1'b0; - output_9_axis_tvalid_reg <= 1'b0; - output_10_axis_tvalid_reg <= 1'b0; - output_11_axis_tvalid_reg <= 1'b0; - output_12_axis_tvalid_reg <= 1'b0; - output_13_axis_tvalid_reg <= 1'b0; - output_14_axis_tvalid_reg <= 1'b0; - output_15_axis_tvalid_reg <= 1'b0; - end else begin - input_0_axis_tvalid_reg <= input_0_axis_tvalid; - input_1_axis_tvalid_reg <= input_1_axis_tvalid; - input_2_axis_tvalid_reg <= input_2_axis_tvalid; - input_3_axis_tvalid_reg <= input_3_axis_tvalid; - input_4_axis_tvalid_reg <= input_4_axis_tvalid; - input_5_axis_tvalid_reg <= input_5_axis_tvalid; - input_6_axis_tvalid_reg <= input_6_axis_tvalid; - input_7_axis_tvalid_reg <= input_7_axis_tvalid; - input_8_axis_tvalid_reg <= input_8_axis_tvalid; - input_9_axis_tvalid_reg <= input_9_axis_tvalid; - input_10_axis_tvalid_reg <= input_10_axis_tvalid; - input_11_axis_tvalid_reg <= input_11_axis_tvalid; - input_12_axis_tvalid_reg <= input_12_axis_tvalid; - input_13_axis_tvalid_reg <= input_13_axis_tvalid; - input_14_axis_tvalid_reg <= input_14_axis_tvalid; - input_15_axis_tvalid_reg <= input_15_axis_tvalid; - - output_0_select_reg <= output_0_select; - output_1_select_reg <= output_1_select; - output_2_select_reg <= output_2_select; - output_3_select_reg <= output_3_select; - output_4_select_reg <= output_4_select; - output_5_select_reg <= output_5_select; - output_6_select_reg <= output_6_select; - output_7_select_reg <= output_7_select; - output_8_select_reg <= output_8_select; - output_9_select_reg <= output_9_select; - output_10_select_reg <= output_10_select; - output_11_select_reg <= output_11_select; - output_12_select_reg <= output_12_select; - output_13_select_reg <= output_13_select; - output_14_select_reg <= output_14_select; - output_15_select_reg <= output_15_select; - - case (output_0_select_reg) - 4'd0: output_0_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_0_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_0_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_0_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_0_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_0_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_0_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_0_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_0_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_0_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_0_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_0_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_0_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_0_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_0_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_0_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_1_select_reg) - 4'd0: output_1_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_1_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_1_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_1_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_1_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_1_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_1_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_1_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_1_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_1_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_1_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_1_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_1_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_1_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_1_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_1_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_2_select_reg) - 4'd0: output_2_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_2_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_2_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_2_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_2_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_2_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_2_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_2_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_2_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_2_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_2_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_2_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_2_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_2_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_2_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_2_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_3_select_reg) - 4'd0: output_3_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_3_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_3_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_3_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_3_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_3_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_3_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_3_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_3_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_3_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_3_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_3_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_3_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_3_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_3_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_3_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_4_select_reg) - 4'd0: output_4_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_4_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_4_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_4_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_4_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_4_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_4_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_4_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_4_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_4_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_4_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_4_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_4_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_4_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_4_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_4_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_5_select_reg) - 4'd0: output_5_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_5_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_5_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_5_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_5_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_5_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_5_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_5_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_5_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_5_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_5_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_5_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_5_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_5_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_5_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_5_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_6_select_reg) - 4'd0: output_6_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_6_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_6_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_6_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_6_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_6_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_6_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_6_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_6_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_6_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_6_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_6_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_6_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_6_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_6_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_6_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_7_select_reg) - 4'd0: output_7_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_7_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_7_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_7_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_7_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_7_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_7_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_7_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_7_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_7_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_7_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_7_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_7_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_7_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_7_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_7_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_8_select_reg) - 4'd0: output_8_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_8_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_8_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_8_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_8_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_8_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_8_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_8_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_8_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_8_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_8_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_8_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_8_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_8_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_8_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_8_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_9_select_reg) - 4'd0: output_9_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_9_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_9_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_9_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_9_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_9_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_9_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_9_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_9_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_9_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_9_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_9_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_9_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_9_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_9_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_9_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_10_select_reg) - 4'd0: output_10_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_10_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_10_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_10_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_10_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_10_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_10_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_10_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_10_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_10_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_10_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_10_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_10_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_10_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_10_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_10_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_11_select_reg) - 4'd0: output_11_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_11_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_11_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_11_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_11_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_11_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_11_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_11_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_11_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_11_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_11_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_11_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_11_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_11_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_11_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_11_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_12_select_reg) - 4'd0: output_12_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_12_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_12_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_12_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_12_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_12_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_12_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_12_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_12_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_12_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_12_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_12_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_12_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_12_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_12_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_12_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_13_select_reg) - 4'd0: output_13_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_13_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_13_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_13_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_13_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_13_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_13_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_13_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_13_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_13_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_13_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_13_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_13_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_13_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_13_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_13_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_14_select_reg) - 4'd0: output_14_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_14_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_14_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_14_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_14_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_14_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_14_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_14_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_14_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_14_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_14_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_14_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_14_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_14_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_14_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_14_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - - case (output_15_select_reg) - 4'd0: output_15_axis_tvalid_reg <= input_0_axis_tvalid_reg; - 4'd1: output_15_axis_tvalid_reg <= input_1_axis_tvalid_reg; - 4'd2: output_15_axis_tvalid_reg <= input_2_axis_tvalid_reg; - 4'd3: output_15_axis_tvalid_reg <= input_3_axis_tvalid_reg; - 4'd4: output_15_axis_tvalid_reg <= input_4_axis_tvalid_reg; - 4'd5: output_15_axis_tvalid_reg <= input_5_axis_tvalid_reg; - 4'd6: output_15_axis_tvalid_reg <= input_6_axis_tvalid_reg; - 4'd7: output_15_axis_tvalid_reg <= input_7_axis_tvalid_reg; - 4'd8: output_15_axis_tvalid_reg <= input_8_axis_tvalid_reg; - 4'd9: output_15_axis_tvalid_reg <= input_9_axis_tvalid_reg; - 4'd10: output_15_axis_tvalid_reg <= input_10_axis_tvalid_reg; - 4'd11: output_15_axis_tvalid_reg <= input_11_axis_tvalid_reg; - 4'd12: output_15_axis_tvalid_reg <= input_12_axis_tvalid_reg; - 4'd13: output_15_axis_tvalid_reg <= input_13_axis_tvalid_reg; - 4'd14: output_15_axis_tvalid_reg <= input_14_axis_tvalid_reg; - 4'd15: output_15_axis_tvalid_reg <= input_15_axis_tvalid_reg; - endcase - end - - input_0_axis_tdata_reg <= input_0_axis_tdata; - input_0_axis_tkeep_reg <= input_0_axis_tkeep; - input_0_axis_tlast_reg <= input_0_axis_tlast; - input_0_axis_tid_reg <= input_0_axis_tid; - input_0_axis_tdest_reg <= input_0_axis_tdest; - input_0_axis_tuser_reg <= input_0_axis_tuser; - - input_1_axis_tdata_reg <= input_1_axis_tdata; - input_1_axis_tkeep_reg <= input_1_axis_tkeep; - input_1_axis_tlast_reg <= input_1_axis_tlast; - input_1_axis_tid_reg <= input_1_axis_tid; - input_1_axis_tdest_reg <= input_1_axis_tdest; - input_1_axis_tuser_reg <= input_1_axis_tuser; - - input_2_axis_tdata_reg <= input_2_axis_tdata; - input_2_axis_tkeep_reg <= input_2_axis_tkeep; - input_2_axis_tlast_reg <= input_2_axis_tlast; - input_2_axis_tid_reg <= input_2_axis_tid; - input_2_axis_tdest_reg <= input_2_axis_tdest; - input_2_axis_tuser_reg <= input_2_axis_tuser; - - input_3_axis_tdata_reg <= input_3_axis_tdata; - input_3_axis_tkeep_reg <= input_3_axis_tkeep; - input_3_axis_tlast_reg <= input_3_axis_tlast; - input_3_axis_tid_reg <= input_3_axis_tid; - input_3_axis_tdest_reg <= input_3_axis_tdest; - input_3_axis_tuser_reg <= input_3_axis_tuser; - - input_4_axis_tdata_reg <= input_4_axis_tdata; - input_4_axis_tkeep_reg <= input_4_axis_tkeep; - input_4_axis_tlast_reg <= input_4_axis_tlast; - input_4_axis_tid_reg <= input_4_axis_tid; - input_4_axis_tdest_reg <= input_4_axis_tdest; - input_4_axis_tuser_reg <= input_4_axis_tuser; - - input_5_axis_tdata_reg <= input_5_axis_tdata; - input_5_axis_tkeep_reg <= input_5_axis_tkeep; - input_5_axis_tlast_reg <= input_5_axis_tlast; - input_5_axis_tid_reg <= input_5_axis_tid; - input_5_axis_tdest_reg <= input_5_axis_tdest; - input_5_axis_tuser_reg <= input_5_axis_tuser; - - input_6_axis_tdata_reg <= input_6_axis_tdata; - input_6_axis_tkeep_reg <= input_6_axis_tkeep; - input_6_axis_tlast_reg <= input_6_axis_tlast; - input_6_axis_tid_reg <= input_6_axis_tid; - input_6_axis_tdest_reg <= input_6_axis_tdest; - input_6_axis_tuser_reg <= input_6_axis_tuser; - - input_7_axis_tdata_reg <= input_7_axis_tdata; - input_7_axis_tkeep_reg <= input_7_axis_tkeep; - input_7_axis_tlast_reg <= input_7_axis_tlast; - input_7_axis_tid_reg <= input_7_axis_tid; - input_7_axis_tdest_reg <= input_7_axis_tdest; - input_7_axis_tuser_reg <= input_7_axis_tuser; - - input_8_axis_tdata_reg <= input_8_axis_tdata; - input_8_axis_tkeep_reg <= input_8_axis_tkeep; - input_8_axis_tlast_reg <= input_8_axis_tlast; - input_8_axis_tid_reg <= input_8_axis_tid; - input_8_axis_tdest_reg <= input_8_axis_tdest; - input_8_axis_tuser_reg <= input_8_axis_tuser; - - input_9_axis_tdata_reg <= input_9_axis_tdata; - input_9_axis_tkeep_reg <= input_9_axis_tkeep; - input_9_axis_tlast_reg <= input_9_axis_tlast; - input_9_axis_tid_reg <= input_9_axis_tid; - input_9_axis_tdest_reg <= input_9_axis_tdest; - input_9_axis_tuser_reg <= input_9_axis_tuser; - - input_10_axis_tdata_reg <= input_10_axis_tdata; - input_10_axis_tkeep_reg <= input_10_axis_tkeep; - input_10_axis_tlast_reg <= input_10_axis_tlast; - input_10_axis_tid_reg <= input_10_axis_tid; - input_10_axis_tdest_reg <= input_10_axis_tdest; - input_10_axis_tuser_reg <= input_10_axis_tuser; - - input_11_axis_tdata_reg <= input_11_axis_tdata; - input_11_axis_tkeep_reg <= input_11_axis_tkeep; - input_11_axis_tlast_reg <= input_11_axis_tlast; - input_11_axis_tid_reg <= input_11_axis_tid; - input_11_axis_tdest_reg <= input_11_axis_tdest; - input_11_axis_tuser_reg <= input_11_axis_tuser; - - input_12_axis_tdata_reg <= input_12_axis_tdata; - input_12_axis_tkeep_reg <= input_12_axis_tkeep; - input_12_axis_tlast_reg <= input_12_axis_tlast; - input_12_axis_tid_reg <= input_12_axis_tid; - input_12_axis_tdest_reg <= input_12_axis_tdest; - input_12_axis_tuser_reg <= input_12_axis_tuser; - - input_13_axis_tdata_reg <= input_13_axis_tdata; - input_13_axis_tkeep_reg <= input_13_axis_tkeep; - input_13_axis_tlast_reg <= input_13_axis_tlast; - input_13_axis_tid_reg <= input_13_axis_tid; - input_13_axis_tdest_reg <= input_13_axis_tdest; - input_13_axis_tuser_reg <= input_13_axis_tuser; - - input_14_axis_tdata_reg <= input_14_axis_tdata; - input_14_axis_tkeep_reg <= input_14_axis_tkeep; - input_14_axis_tlast_reg <= input_14_axis_tlast; - input_14_axis_tid_reg <= input_14_axis_tid; - input_14_axis_tdest_reg <= input_14_axis_tdest; - input_14_axis_tuser_reg <= input_14_axis_tuser; - - input_15_axis_tdata_reg <= input_15_axis_tdata; - input_15_axis_tkeep_reg <= input_15_axis_tkeep; - input_15_axis_tlast_reg <= input_15_axis_tlast; - input_15_axis_tid_reg <= input_15_axis_tid; - input_15_axis_tdest_reg <= input_15_axis_tdest; - input_15_axis_tuser_reg <= input_15_axis_tuser; - - case (output_0_select_reg) - 4'd0: begin - output_0_axis_tdata_reg <= input_0_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_0_axis_tlast_reg; - output_0_axis_tid_reg <= input_0_axis_tid_reg; - output_0_axis_tdest_reg <= input_0_axis_tdest_reg; - output_0_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_0_axis_tdata_reg <= input_1_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_1_axis_tlast_reg; - output_0_axis_tid_reg <= input_1_axis_tid_reg; - output_0_axis_tdest_reg <= input_1_axis_tdest_reg; - output_0_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_0_axis_tdata_reg <= input_2_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_2_axis_tlast_reg; - output_0_axis_tid_reg <= input_2_axis_tid_reg; - output_0_axis_tdest_reg <= input_2_axis_tdest_reg; - output_0_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_0_axis_tdata_reg <= input_3_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_3_axis_tlast_reg; - output_0_axis_tid_reg <= input_3_axis_tid_reg; - output_0_axis_tdest_reg <= input_3_axis_tdest_reg; - output_0_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_0_axis_tdata_reg <= input_4_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_4_axis_tlast_reg; - output_0_axis_tid_reg <= input_4_axis_tid_reg; - output_0_axis_tdest_reg <= input_4_axis_tdest_reg; - output_0_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_0_axis_tdata_reg <= input_5_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_5_axis_tlast_reg; - output_0_axis_tid_reg <= input_5_axis_tid_reg; - output_0_axis_tdest_reg <= input_5_axis_tdest_reg; - output_0_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_0_axis_tdata_reg <= input_6_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_6_axis_tlast_reg; - output_0_axis_tid_reg <= input_6_axis_tid_reg; - output_0_axis_tdest_reg <= input_6_axis_tdest_reg; - output_0_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_0_axis_tdata_reg <= input_7_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_7_axis_tlast_reg; - output_0_axis_tid_reg <= input_7_axis_tid_reg; - output_0_axis_tdest_reg <= input_7_axis_tdest_reg; - output_0_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_0_axis_tdata_reg <= input_8_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_8_axis_tlast_reg; - output_0_axis_tid_reg <= input_8_axis_tid_reg; - output_0_axis_tdest_reg <= input_8_axis_tdest_reg; - output_0_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_0_axis_tdata_reg <= input_9_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_9_axis_tlast_reg; - output_0_axis_tid_reg <= input_9_axis_tid_reg; - output_0_axis_tdest_reg <= input_9_axis_tdest_reg; - output_0_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_0_axis_tdata_reg <= input_10_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_10_axis_tlast_reg; - output_0_axis_tid_reg <= input_10_axis_tid_reg; - output_0_axis_tdest_reg <= input_10_axis_tdest_reg; - output_0_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_0_axis_tdata_reg <= input_11_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_11_axis_tlast_reg; - output_0_axis_tid_reg <= input_11_axis_tid_reg; - output_0_axis_tdest_reg <= input_11_axis_tdest_reg; - output_0_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_0_axis_tdata_reg <= input_12_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_12_axis_tlast_reg; - output_0_axis_tid_reg <= input_12_axis_tid_reg; - output_0_axis_tdest_reg <= input_12_axis_tdest_reg; - output_0_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_0_axis_tdata_reg <= input_13_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_13_axis_tlast_reg; - output_0_axis_tid_reg <= input_13_axis_tid_reg; - output_0_axis_tdest_reg <= input_13_axis_tdest_reg; - output_0_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_0_axis_tdata_reg <= input_14_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_14_axis_tlast_reg; - output_0_axis_tid_reg <= input_14_axis_tid_reg; - output_0_axis_tdest_reg <= input_14_axis_tdest_reg; - output_0_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_0_axis_tdata_reg <= input_15_axis_tdata_reg; - output_0_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_0_axis_tlast_reg <= input_15_axis_tlast_reg; - output_0_axis_tid_reg <= input_15_axis_tid_reg; - output_0_axis_tdest_reg <= input_15_axis_tdest_reg; - output_0_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_1_select_reg) - 4'd0: begin - output_1_axis_tdata_reg <= input_0_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_0_axis_tlast_reg; - output_1_axis_tid_reg <= input_0_axis_tid_reg; - output_1_axis_tdest_reg <= input_0_axis_tdest_reg; - output_1_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_1_axis_tdata_reg <= input_1_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_1_axis_tlast_reg; - output_1_axis_tid_reg <= input_1_axis_tid_reg; - output_1_axis_tdest_reg <= input_1_axis_tdest_reg; - output_1_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_1_axis_tdata_reg <= input_2_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_2_axis_tlast_reg; - output_1_axis_tid_reg <= input_2_axis_tid_reg; - output_1_axis_tdest_reg <= input_2_axis_tdest_reg; - output_1_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_1_axis_tdata_reg <= input_3_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_3_axis_tlast_reg; - output_1_axis_tid_reg <= input_3_axis_tid_reg; - output_1_axis_tdest_reg <= input_3_axis_tdest_reg; - output_1_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_1_axis_tdata_reg <= input_4_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_4_axis_tlast_reg; - output_1_axis_tid_reg <= input_4_axis_tid_reg; - output_1_axis_tdest_reg <= input_4_axis_tdest_reg; - output_1_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_1_axis_tdata_reg <= input_5_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_5_axis_tlast_reg; - output_1_axis_tid_reg <= input_5_axis_tid_reg; - output_1_axis_tdest_reg <= input_5_axis_tdest_reg; - output_1_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_1_axis_tdata_reg <= input_6_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_6_axis_tlast_reg; - output_1_axis_tid_reg <= input_6_axis_tid_reg; - output_1_axis_tdest_reg <= input_6_axis_tdest_reg; - output_1_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_1_axis_tdata_reg <= input_7_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_7_axis_tlast_reg; - output_1_axis_tid_reg <= input_7_axis_tid_reg; - output_1_axis_tdest_reg <= input_7_axis_tdest_reg; - output_1_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_1_axis_tdata_reg <= input_8_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_8_axis_tlast_reg; - output_1_axis_tid_reg <= input_8_axis_tid_reg; - output_1_axis_tdest_reg <= input_8_axis_tdest_reg; - output_1_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_1_axis_tdata_reg <= input_9_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_9_axis_tlast_reg; - output_1_axis_tid_reg <= input_9_axis_tid_reg; - output_1_axis_tdest_reg <= input_9_axis_tdest_reg; - output_1_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_1_axis_tdata_reg <= input_10_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_10_axis_tlast_reg; - output_1_axis_tid_reg <= input_10_axis_tid_reg; - output_1_axis_tdest_reg <= input_10_axis_tdest_reg; - output_1_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_1_axis_tdata_reg <= input_11_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_11_axis_tlast_reg; - output_1_axis_tid_reg <= input_11_axis_tid_reg; - output_1_axis_tdest_reg <= input_11_axis_tdest_reg; - output_1_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_1_axis_tdata_reg <= input_12_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_12_axis_tlast_reg; - output_1_axis_tid_reg <= input_12_axis_tid_reg; - output_1_axis_tdest_reg <= input_12_axis_tdest_reg; - output_1_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_1_axis_tdata_reg <= input_13_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_13_axis_tlast_reg; - output_1_axis_tid_reg <= input_13_axis_tid_reg; - output_1_axis_tdest_reg <= input_13_axis_tdest_reg; - output_1_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_1_axis_tdata_reg <= input_14_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_14_axis_tlast_reg; - output_1_axis_tid_reg <= input_14_axis_tid_reg; - output_1_axis_tdest_reg <= input_14_axis_tdest_reg; - output_1_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_1_axis_tdata_reg <= input_15_axis_tdata_reg; - output_1_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_1_axis_tlast_reg <= input_15_axis_tlast_reg; - output_1_axis_tid_reg <= input_15_axis_tid_reg; - output_1_axis_tdest_reg <= input_15_axis_tdest_reg; - output_1_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_2_select_reg) - 4'd0: begin - output_2_axis_tdata_reg <= input_0_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_0_axis_tlast_reg; - output_2_axis_tid_reg <= input_0_axis_tid_reg; - output_2_axis_tdest_reg <= input_0_axis_tdest_reg; - output_2_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_2_axis_tdata_reg <= input_1_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_1_axis_tlast_reg; - output_2_axis_tid_reg <= input_1_axis_tid_reg; - output_2_axis_tdest_reg <= input_1_axis_tdest_reg; - output_2_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_2_axis_tdata_reg <= input_2_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_2_axis_tlast_reg; - output_2_axis_tid_reg <= input_2_axis_tid_reg; - output_2_axis_tdest_reg <= input_2_axis_tdest_reg; - output_2_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_2_axis_tdata_reg <= input_3_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_3_axis_tlast_reg; - output_2_axis_tid_reg <= input_3_axis_tid_reg; - output_2_axis_tdest_reg <= input_3_axis_tdest_reg; - output_2_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_2_axis_tdata_reg <= input_4_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_4_axis_tlast_reg; - output_2_axis_tid_reg <= input_4_axis_tid_reg; - output_2_axis_tdest_reg <= input_4_axis_tdest_reg; - output_2_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_2_axis_tdata_reg <= input_5_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_5_axis_tlast_reg; - output_2_axis_tid_reg <= input_5_axis_tid_reg; - output_2_axis_tdest_reg <= input_5_axis_tdest_reg; - output_2_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_2_axis_tdata_reg <= input_6_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_6_axis_tlast_reg; - output_2_axis_tid_reg <= input_6_axis_tid_reg; - output_2_axis_tdest_reg <= input_6_axis_tdest_reg; - output_2_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_2_axis_tdata_reg <= input_7_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_7_axis_tlast_reg; - output_2_axis_tid_reg <= input_7_axis_tid_reg; - output_2_axis_tdest_reg <= input_7_axis_tdest_reg; - output_2_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_2_axis_tdata_reg <= input_8_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_8_axis_tlast_reg; - output_2_axis_tid_reg <= input_8_axis_tid_reg; - output_2_axis_tdest_reg <= input_8_axis_tdest_reg; - output_2_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_2_axis_tdata_reg <= input_9_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_9_axis_tlast_reg; - output_2_axis_tid_reg <= input_9_axis_tid_reg; - output_2_axis_tdest_reg <= input_9_axis_tdest_reg; - output_2_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_2_axis_tdata_reg <= input_10_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_10_axis_tlast_reg; - output_2_axis_tid_reg <= input_10_axis_tid_reg; - output_2_axis_tdest_reg <= input_10_axis_tdest_reg; - output_2_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_2_axis_tdata_reg <= input_11_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_11_axis_tlast_reg; - output_2_axis_tid_reg <= input_11_axis_tid_reg; - output_2_axis_tdest_reg <= input_11_axis_tdest_reg; - output_2_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_2_axis_tdata_reg <= input_12_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_12_axis_tlast_reg; - output_2_axis_tid_reg <= input_12_axis_tid_reg; - output_2_axis_tdest_reg <= input_12_axis_tdest_reg; - output_2_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_2_axis_tdata_reg <= input_13_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_13_axis_tlast_reg; - output_2_axis_tid_reg <= input_13_axis_tid_reg; - output_2_axis_tdest_reg <= input_13_axis_tdest_reg; - output_2_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_2_axis_tdata_reg <= input_14_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_14_axis_tlast_reg; - output_2_axis_tid_reg <= input_14_axis_tid_reg; - output_2_axis_tdest_reg <= input_14_axis_tdest_reg; - output_2_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_2_axis_tdata_reg <= input_15_axis_tdata_reg; - output_2_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_2_axis_tlast_reg <= input_15_axis_tlast_reg; - output_2_axis_tid_reg <= input_15_axis_tid_reg; - output_2_axis_tdest_reg <= input_15_axis_tdest_reg; - output_2_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_3_select_reg) - 4'd0: begin - output_3_axis_tdata_reg <= input_0_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_0_axis_tlast_reg; - output_3_axis_tid_reg <= input_0_axis_tid_reg; - output_3_axis_tdest_reg <= input_0_axis_tdest_reg; - output_3_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_3_axis_tdata_reg <= input_1_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_1_axis_tlast_reg; - output_3_axis_tid_reg <= input_1_axis_tid_reg; - output_3_axis_tdest_reg <= input_1_axis_tdest_reg; - output_3_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_3_axis_tdata_reg <= input_2_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_2_axis_tlast_reg; - output_3_axis_tid_reg <= input_2_axis_tid_reg; - output_3_axis_tdest_reg <= input_2_axis_tdest_reg; - output_3_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_3_axis_tdata_reg <= input_3_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_3_axis_tlast_reg; - output_3_axis_tid_reg <= input_3_axis_tid_reg; - output_3_axis_tdest_reg <= input_3_axis_tdest_reg; - output_3_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_3_axis_tdata_reg <= input_4_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_4_axis_tlast_reg; - output_3_axis_tid_reg <= input_4_axis_tid_reg; - output_3_axis_tdest_reg <= input_4_axis_tdest_reg; - output_3_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_3_axis_tdata_reg <= input_5_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_5_axis_tlast_reg; - output_3_axis_tid_reg <= input_5_axis_tid_reg; - output_3_axis_tdest_reg <= input_5_axis_tdest_reg; - output_3_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_3_axis_tdata_reg <= input_6_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_6_axis_tlast_reg; - output_3_axis_tid_reg <= input_6_axis_tid_reg; - output_3_axis_tdest_reg <= input_6_axis_tdest_reg; - output_3_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_3_axis_tdata_reg <= input_7_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_7_axis_tlast_reg; - output_3_axis_tid_reg <= input_7_axis_tid_reg; - output_3_axis_tdest_reg <= input_7_axis_tdest_reg; - output_3_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_3_axis_tdata_reg <= input_8_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_8_axis_tlast_reg; - output_3_axis_tid_reg <= input_8_axis_tid_reg; - output_3_axis_tdest_reg <= input_8_axis_tdest_reg; - output_3_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_3_axis_tdata_reg <= input_9_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_9_axis_tlast_reg; - output_3_axis_tid_reg <= input_9_axis_tid_reg; - output_3_axis_tdest_reg <= input_9_axis_tdest_reg; - output_3_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_3_axis_tdata_reg <= input_10_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_10_axis_tlast_reg; - output_3_axis_tid_reg <= input_10_axis_tid_reg; - output_3_axis_tdest_reg <= input_10_axis_tdest_reg; - output_3_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_3_axis_tdata_reg <= input_11_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_11_axis_tlast_reg; - output_3_axis_tid_reg <= input_11_axis_tid_reg; - output_3_axis_tdest_reg <= input_11_axis_tdest_reg; - output_3_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_3_axis_tdata_reg <= input_12_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_12_axis_tlast_reg; - output_3_axis_tid_reg <= input_12_axis_tid_reg; - output_3_axis_tdest_reg <= input_12_axis_tdest_reg; - output_3_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_3_axis_tdata_reg <= input_13_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_13_axis_tlast_reg; - output_3_axis_tid_reg <= input_13_axis_tid_reg; - output_3_axis_tdest_reg <= input_13_axis_tdest_reg; - output_3_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_3_axis_tdata_reg <= input_14_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_14_axis_tlast_reg; - output_3_axis_tid_reg <= input_14_axis_tid_reg; - output_3_axis_tdest_reg <= input_14_axis_tdest_reg; - output_3_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_3_axis_tdata_reg <= input_15_axis_tdata_reg; - output_3_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_3_axis_tlast_reg <= input_15_axis_tlast_reg; - output_3_axis_tid_reg <= input_15_axis_tid_reg; - output_3_axis_tdest_reg <= input_15_axis_tdest_reg; - output_3_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_4_select_reg) - 4'd0: begin - output_4_axis_tdata_reg <= input_0_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_0_axis_tlast_reg; - output_4_axis_tid_reg <= input_0_axis_tid_reg; - output_4_axis_tdest_reg <= input_0_axis_tdest_reg; - output_4_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_4_axis_tdata_reg <= input_1_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_1_axis_tlast_reg; - output_4_axis_tid_reg <= input_1_axis_tid_reg; - output_4_axis_tdest_reg <= input_1_axis_tdest_reg; - output_4_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_4_axis_tdata_reg <= input_2_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_2_axis_tlast_reg; - output_4_axis_tid_reg <= input_2_axis_tid_reg; - output_4_axis_tdest_reg <= input_2_axis_tdest_reg; - output_4_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_4_axis_tdata_reg <= input_3_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_3_axis_tlast_reg; - output_4_axis_tid_reg <= input_3_axis_tid_reg; - output_4_axis_tdest_reg <= input_3_axis_tdest_reg; - output_4_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_4_axis_tdata_reg <= input_4_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_4_axis_tlast_reg; - output_4_axis_tid_reg <= input_4_axis_tid_reg; - output_4_axis_tdest_reg <= input_4_axis_tdest_reg; - output_4_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_4_axis_tdata_reg <= input_5_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_5_axis_tlast_reg; - output_4_axis_tid_reg <= input_5_axis_tid_reg; - output_4_axis_tdest_reg <= input_5_axis_tdest_reg; - output_4_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_4_axis_tdata_reg <= input_6_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_6_axis_tlast_reg; - output_4_axis_tid_reg <= input_6_axis_tid_reg; - output_4_axis_tdest_reg <= input_6_axis_tdest_reg; - output_4_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_4_axis_tdata_reg <= input_7_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_7_axis_tlast_reg; - output_4_axis_tid_reg <= input_7_axis_tid_reg; - output_4_axis_tdest_reg <= input_7_axis_tdest_reg; - output_4_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_4_axis_tdata_reg <= input_8_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_8_axis_tlast_reg; - output_4_axis_tid_reg <= input_8_axis_tid_reg; - output_4_axis_tdest_reg <= input_8_axis_tdest_reg; - output_4_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_4_axis_tdata_reg <= input_9_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_9_axis_tlast_reg; - output_4_axis_tid_reg <= input_9_axis_tid_reg; - output_4_axis_tdest_reg <= input_9_axis_tdest_reg; - output_4_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_4_axis_tdata_reg <= input_10_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_10_axis_tlast_reg; - output_4_axis_tid_reg <= input_10_axis_tid_reg; - output_4_axis_tdest_reg <= input_10_axis_tdest_reg; - output_4_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_4_axis_tdata_reg <= input_11_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_11_axis_tlast_reg; - output_4_axis_tid_reg <= input_11_axis_tid_reg; - output_4_axis_tdest_reg <= input_11_axis_tdest_reg; - output_4_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_4_axis_tdata_reg <= input_12_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_12_axis_tlast_reg; - output_4_axis_tid_reg <= input_12_axis_tid_reg; - output_4_axis_tdest_reg <= input_12_axis_tdest_reg; - output_4_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_4_axis_tdata_reg <= input_13_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_13_axis_tlast_reg; - output_4_axis_tid_reg <= input_13_axis_tid_reg; - output_4_axis_tdest_reg <= input_13_axis_tdest_reg; - output_4_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_4_axis_tdata_reg <= input_14_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_14_axis_tlast_reg; - output_4_axis_tid_reg <= input_14_axis_tid_reg; - output_4_axis_tdest_reg <= input_14_axis_tdest_reg; - output_4_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_4_axis_tdata_reg <= input_15_axis_tdata_reg; - output_4_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_4_axis_tlast_reg <= input_15_axis_tlast_reg; - output_4_axis_tid_reg <= input_15_axis_tid_reg; - output_4_axis_tdest_reg <= input_15_axis_tdest_reg; - output_4_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_5_select_reg) - 4'd0: begin - output_5_axis_tdata_reg <= input_0_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_0_axis_tlast_reg; - output_5_axis_tid_reg <= input_0_axis_tid_reg; - output_5_axis_tdest_reg <= input_0_axis_tdest_reg; - output_5_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_5_axis_tdata_reg <= input_1_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_1_axis_tlast_reg; - output_5_axis_tid_reg <= input_1_axis_tid_reg; - output_5_axis_tdest_reg <= input_1_axis_tdest_reg; - output_5_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_5_axis_tdata_reg <= input_2_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_2_axis_tlast_reg; - output_5_axis_tid_reg <= input_2_axis_tid_reg; - output_5_axis_tdest_reg <= input_2_axis_tdest_reg; - output_5_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_5_axis_tdata_reg <= input_3_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_3_axis_tlast_reg; - output_5_axis_tid_reg <= input_3_axis_tid_reg; - output_5_axis_tdest_reg <= input_3_axis_tdest_reg; - output_5_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_5_axis_tdata_reg <= input_4_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_4_axis_tlast_reg; - output_5_axis_tid_reg <= input_4_axis_tid_reg; - output_5_axis_tdest_reg <= input_4_axis_tdest_reg; - output_5_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_5_axis_tdata_reg <= input_5_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_5_axis_tlast_reg; - output_5_axis_tid_reg <= input_5_axis_tid_reg; - output_5_axis_tdest_reg <= input_5_axis_tdest_reg; - output_5_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_5_axis_tdata_reg <= input_6_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_6_axis_tlast_reg; - output_5_axis_tid_reg <= input_6_axis_tid_reg; - output_5_axis_tdest_reg <= input_6_axis_tdest_reg; - output_5_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_5_axis_tdata_reg <= input_7_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_7_axis_tlast_reg; - output_5_axis_tid_reg <= input_7_axis_tid_reg; - output_5_axis_tdest_reg <= input_7_axis_tdest_reg; - output_5_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_5_axis_tdata_reg <= input_8_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_8_axis_tlast_reg; - output_5_axis_tid_reg <= input_8_axis_tid_reg; - output_5_axis_tdest_reg <= input_8_axis_tdest_reg; - output_5_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_5_axis_tdata_reg <= input_9_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_9_axis_tlast_reg; - output_5_axis_tid_reg <= input_9_axis_tid_reg; - output_5_axis_tdest_reg <= input_9_axis_tdest_reg; - output_5_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_5_axis_tdata_reg <= input_10_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_10_axis_tlast_reg; - output_5_axis_tid_reg <= input_10_axis_tid_reg; - output_5_axis_tdest_reg <= input_10_axis_tdest_reg; - output_5_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_5_axis_tdata_reg <= input_11_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_11_axis_tlast_reg; - output_5_axis_tid_reg <= input_11_axis_tid_reg; - output_5_axis_tdest_reg <= input_11_axis_tdest_reg; - output_5_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_5_axis_tdata_reg <= input_12_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_12_axis_tlast_reg; - output_5_axis_tid_reg <= input_12_axis_tid_reg; - output_5_axis_tdest_reg <= input_12_axis_tdest_reg; - output_5_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_5_axis_tdata_reg <= input_13_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_13_axis_tlast_reg; - output_5_axis_tid_reg <= input_13_axis_tid_reg; - output_5_axis_tdest_reg <= input_13_axis_tdest_reg; - output_5_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_5_axis_tdata_reg <= input_14_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_14_axis_tlast_reg; - output_5_axis_tid_reg <= input_14_axis_tid_reg; - output_5_axis_tdest_reg <= input_14_axis_tdest_reg; - output_5_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_5_axis_tdata_reg <= input_15_axis_tdata_reg; - output_5_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_5_axis_tlast_reg <= input_15_axis_tlast_reg; - output_5_axis_tid_reg <= input_15_axis_tid_reg; - output_5_axis_tdest_reg <= input_15_axis_tdest_reg; - output_5_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_6_select_reg) - 4'd0: begin - output_6_axis_tdata_reg <= input_0_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_0_axis_tlast_reg; - output_6_axis_tid_reg <= input_0_axis_tid_reg; - output_6_axis_tdest_reg <= input_0_axis_tdest_reg; - output_6_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_6_axis_tdata_reg <= input_1_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_1_axis_tlast_reg; - output_6_axis_tid_reg <= input_1_axis_tid_reg; - output_6_axis_tdest_reg <= input_1_axis_tdest_reg; - output_6_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_6_axis_tdata_reg <= input_2_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_2_axis_tlast_reg; - output_6_axis_tid_reg <= input_2_axis_tid_reg; - output_6_axis_tdest_reg <= input_2_axis_tdest_reg; - output_6_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_6_axis_tdata_reg <= input_3_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_3_axis_tlast_reg; - output_6_axis_tid_reg <= input_3_axis_tid_reg; - output_6_axis_tdest_reg <= input_3_axis_tdest_reg; - output_6_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_6_axis_tdata_reg <= input_4_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_4_axis_tlast_reg; - output_6_axis_tid_reg <= input_4_axis_tid_reg; - output_6_axis_tdest_reg <= input_4_axis_tdest_reg; - output_6_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_6_axis_tdata_reg <= input_5_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_5_axis_tlast_reg; - output_6_axis_tid_reg <= input_5_axis_tid_reg; - output_6_axis_tdest_reg <= input_5_axis_tdest_reg; - output_6_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_6_axis_tdata_reg <= input_6_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_6_axis_tlast_reg; - output_6_axis_tid_reg <= input_6_axis_tid_reg; - output_6_axis_tdest_reg <= input_6_axis_tdest_reg; - output_6_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_6_axis_tdata_reg <= input_7_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_7_axis_tlast_reg; - output_6_axis_tid_reg <= input_7_axis_tid_reg; - output_6_axis_tdest_reg <= input_7_axis_tdest_reg; - output_6_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_6_axis_tdata_reg <= input_8_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_8_axis_tlast_reg; - output_6_axis_tid_reg <= input_8_axis_tid_reg; - output_6_axis_tdest_reg <= input_8_axis_tdest_reg; - output_6_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_6_axis_tdata_reg <= input_9_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_9_axis_tlast_reg; - output_6_axis_tid_reg <= input_9_axis_tid_reg; - output_6_axis_tdest_reg <= input_9_axis_tdest_reg; - output_6_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_6_axis_tdata_reg <= input_10_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_10_axis_tlast_reg; - output_6_axis_tid_reg <= input_10_axis_tid_reg; - output_6_axis_tdest_reg <= input_10_axis_tdest_reg; - output_6_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_6_axis_tdata_reg <= input_11_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_11_axis_tlast_reg; - output_6_axis_tid_reg <= input_11_axis_tid_reg; - output_6_axis_tdest_reg <= input_11_axis_tdest_reg; - output_6_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_6_axis_tdata_reg <= input_12_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_12_axis_tlast_reg; - output_6_axis_tid_reg <= input_12_axis_tid_reg; - output_6_axis_tdest_reg <= input_12_axis_tdest_reg; - output_6_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_6_axis_tdata_reg <= input_13_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_13_axis_tlast_reg; - output_6_axis_tid_reg <= input_13_axis_tid_reg; - output_6_axis_tdest_reg <= input_13_axis_tdest_reg; - output_6_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_6_axis_tdata_reg <= input_14_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_14_axis_tlast_reg; - output_6_axis_tid_reg <= input_14_axis_tid_reg; - output_6_axis_tdest_reg <= input_14_axis_tdest_reg; - output_6_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_6_axis_tdata_reg <= input_15_axis_tdata_reg; - output_6_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_6_axis_tlast_reg <= input_15_axis_tlast_reg; - output_6_axis_tid_reg <= input_15_axis_tid_reg; - output_6_axis_tdest_reg <= input_15_axis_tdest_reg; - output_6_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_7_select_reg) - 4'd0: begin - output_7_axis_tdata_reg <= input_0_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_0_axis_tlast_reg; - output_7_axis_tid_reg <= input_0_axis_tid_reg; - output_7_axis_tdest_reg <= input_0_axis_tdest_reg; - output_7_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_7_axis_tdata_reg <= input_1_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_1_axis_tlast_reg; - output_7_axis_tid_reg <= input_1_axis_tid_reg; - output_7_axis_tdest_reg <= input_1_axis_tdest_reg; - output_7_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_7_axis_tdata_reg <= input_2_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_2_axis_tlast_reg; - output_7_axis_tid_reg <= input_2_axis_tid_reg; - output_7_axis_tdest_reg <= input_2_axis_tdest_reg; - output_7_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_7_axis_tdata_reg <= input_3_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_3_axis_tlast_reg; - output_7_axis_tid_reg <= input_3_axis_tid_reg; - output_7_axis_tdest_reg <= input_3_axis_tdest_reg; - output_7_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_7_axis_tdata_reg <= input_4_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_4_axis_tlast_reg; - output_7_axis_tid_reg <= input_4_axis_tid_reg; - output_7_axis_tdest_reg <= input_4_axis_tdest_reg; - output_7_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_7_axis_tdata_reg <= input_5_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_5_axis_tlast_reg; - output_7_axis_tid_reg <= input_5_axis_tid_reg; - output_7_axis_tdest_reg <= input_5_axis_tdest_reg; - output_7_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_7_axis_tdata_reg <= input_6_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_6_axis_tlast_reg; - output_7_axis_tid_reg <= input_6_axis_tid_reg; - output_7_axis_tdest_reg <= input_6_axis_tdest_reg; - output_7_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_7_axis_tdata_reg <= input_7_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_7_axis_tlast_reg; - output_7_axis_tid_reg <= input_7_axis_tid_reg; - output_7_axis_tdest_reg <= input_7_axis_tdest_reg; - output_7_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_7_axis_tdata_reg <= input_8_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_8_axis_tlast_reg; - output_7_axis_tid_reg <= input_8_axis_tid_reg; - output_7_axis_tdest_reg <= input_8_axis_tdest_reg; - output_7_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_7_axis_tdata_reg <= input_9_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_9_axis_tlast_reg; - output_7_axis_tid_reg <= input_9_axis_tid_reg; - output_7_axis_tdest_reg <= input_9_axis_tdest_reg; - output_7_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_7_axis_tdata_reg <= input_10_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_10_axis_tlast_reg; - output_7_axis_tid_reg <= input_10_axis_tid_reg; - output_7_axis_tdest_reg <= input_10_axis_tdest_reg; - output_7_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_7_axis_tdata_reg <= input_11_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_11_axis_tlast_reg; - output_7_axis_tid_reg <= input_11_axis_tid_reg; - output_7_axis_tdest_reg <= input_11_axis_tdest_reg; - output_7_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_7_axis_tdata_reg <= input_12_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_12_axis_tlast_reg; - output_7_axis_tid_reg <= input_12_axis_tid_reg; - output_7_axis_tdest_reg <= input_12_axis_tdest_reg; - output_7_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_7_axis_tdata_reg <= input_13_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_13_axis_tlast_reg; - output_7_axis_tid_reg <= input_13_axis_tid_reg; - output_7_axis_tdest_reg <= input_13_axis_tdest_reg; - output_7_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_7_axis_tdata_reg <= input_14_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_14_axis_tlast_reg; - output_7_axis_tid_reg <= input_14_axis_tid_reg; - output_7_axis_tdest_reg <= input_14_axis_tdest_reg; - output_7_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_7_axis_tdata_reg <= input_15_axis_tdata_reg; - output_7_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_7_axis_tlast_reg <= input_15_axis_tlast_reg; - output_7_axis_tid_reg <= input_15_axis_tid_reg; - output_7_axis_tdest_reg <= input_15_axis_tdest_reg; - output_7_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_8_select_reg) - 4'd0: begin - output_8_axis_tdata_reg <= input_0_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_0_axis_tlast_reg; - output_8_axis_tid_reg <= input_0_axis_tid_reg; - output_8_axis_tdest_reg <= input_0_axis_tdest_reg; - output_8_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_8_axis_tdata_reg <= input_1_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_1_axis_tlast_reg; - output_8_axis_tid_reg <= input_1_axis_tid_reg; - output_8_axis_tdest_reg <= input_1_axis_tdest_reg; - output_8_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_8_axis_tdata_reg <= input_2_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_2_axis_tlast_reg; - output_8_axis_tid_reg <= input_2_axis_tid_reg; - output_8_axis_tdest_reg <= input_2_axis_tdest_reg; - output_8_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_8_axis_tdata_reg <= input_3_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_3_axis_tlast_reg; - output_8_axis_tid_reg <= input_3_axis_tid_reg; - output_8_axis_tdest_reg <= input_3_axis_tdest_reg; - output_8_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_8_axis_tdata_reg <= input_4_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_4_axis_tlast_reg; - output_8_axis_tid_reg <= input_4_axis_tid_reg; - output_8_axis_tdest_reg <= input_4_axis_tdest_reg; - output_8_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_8_axis_tdata_reg <= input_5_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_5_axis_tlast_reg; - output_8_axis_tid_reg <= input_5_axis_tid_reg; - output_8_axis_tdest_reg <= input_5_axis_tdest_reg; - output_8_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_8_axis_tdata_reg <= input_6_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_6_axis_tlast_reg; - output_8_axis_tid_reg <= input_6_axis_tid_reg; - output_8_axis_tdest_reg <= input_6_axis_tdest_reg; - output_8_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_8_axis_tdata_reg <= input_7_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_7_axis_tlast_reg; - output_8_axis_tid_reg <= input_7_axis_tid_reg; - output_8_axis_tdest_reg <= input_7_axis_tdest_reg; - output_8_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_8_axis_tdata_reg <= input_8_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_8_axis_tlast_reg; - output_8_axis_tid_reg <= input_8_axis_tid_reg; - output_8_axis_tdest_reg <= input_8_axis_tdest_reg; - output_8_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_8_axis_tdata_reg <= input_9_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_9_axis_tlast_reg; - output_8_axis_tid_reg <= input_9_axis_tid_reg; - output_8_axis_tdest_reg <= input_9_axis_tdest_reg; - output_8_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_8_axis_tdata_reg <= input_10_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_10_axis_tlast_reg; - output_8_axis_tid_reg <= input_10_axis_tid_reg; - output_8_axis_tdest_reg <= input_10_axis_tdest_reg; - output_8_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_8_axis_tdata_reg <= input_11_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_11_axis_tlast_reg; - output_8_axis_tid_reg <= input_11_axis_tid_reg; - output_8_axis_tdest_reg <= input_11_axis_tdest_reg; - output_8_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_8_axis_tdata_reg <= input_12_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_12_axis_tlast_reg; - output_8_axis_tid_reg <= input_12_axis_tid_reg; - output_8_axis_tdest_reg <= input_12_axis_tdest_reg; - output_8_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_8_axis_tdata_reg <= input_13_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_13_axis_tlast_reg; - output_8_axis_tid_reg <= input_13_axis_tid_reg; - output_8_axis_tdest_reg <= input_13_axis_tdest_reg; - output_8_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_8_axis_tdata_reg <= input_14_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_14_axis_tlast_reg; - output_8_axis_tid_reg <= input_14_axis_tid_reg; - output_8_axis_tdest_reg <= input_14_axis_tdest_reg; - output_8_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_8_axis_tdata_reg <= input_15_axis_tdata_reg; - output_8_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_8_axis_tlast_reg <= input_15_axis_tlast_reg; - output_8_axis_tid_reg <= input_15_axis_tid_reg; - output_8_axis_tdest_reg <= input_15_axis_tdest_reg; - output_8_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_9_select_reg) - 4'd0: begin - output_9_axis_tdata_reg <= input_0_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_0_axis_tlast_reg; - output_9_axis_tid_reg <= input_0_axis_tid_reg; - output_9_axis_tdest_reg <= input_0_axis_tdest_reg; - output_9_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_9_axis_tdata_reg <= input_1_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_1_axis_tlast_reg; - output_9_axis_tid_reg <= input_1_axis_tid_reg; - output_9_axis_tdest_reg <= input_1_axis_tdest_reg; - output_9_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_9_axis_tdata_reg <= input_2_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_2_axis_tlast_reg; - output_9_axis_tid_reg <= input_2_axis_tid_reg; - output_9_axis_tdest_reg <= input_2_axis_tdest_reg; - output_9_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_9_axis_tdata_reg <= input_3_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_3_axis_tlast_reg; - output_9_axis_tid_reg <= input_3_axis_tid_reg; - output_9_axis_tdest_reg <= input_3_axis_tdest_reg; - output_9_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_9_axis_tdata_reg <= input_4_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_4_axis_tlast_reg; - output_9_axis_tid_reg <= input_4_axis_tid_reg; - output_9_axis_tdest_reg <= input_4_axis_tdest_reg; - output_9_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_9_axis_tdata_reg <= input_5_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_5_axis_tlast_reg; - output_9_axis_tid_reg <= input_5_axis_tid_reg; - output_9_axis_tdest_reg <= input_5_axis_tdest_reg; - output_9_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_9_axis_tdata_reg <= input_6_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_6_axis_tlast_reg; - output_9_axis_tid_reg <= input_6_axis_tid_reg; - output_9_axis_tdest_reg <= input_6_axis_tdest_reg; - output_9_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_9_axis_tdata_reg <= input_7_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_7_axis_tlast_reg; - output_9_axis_tid_reg <= input_7_axis_tid_reg; - output_9_axis_tdest_reg <= input_7_axis_tdest_reg; - output_9_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_9_axis_tdata_reg <= input_8_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_8_axis_tlast_reg; - output_9_axis_tid_reg <= input_8_axis_tid_reg; - output_9_axis_tdest_reg <= input_8_axis_tdest_reg; - output_9_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_9_axis_tdata_reg <= input_9_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_9_axis_tlast_reg; - output_9_axis_tid_reg <= input_9_axis_tid_reg; - output_9_axis_tdest_reg <= input_9_axis_tdest_reg; - output_9_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_9_axis_tdata_reg <= input_10_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_10_axis_tlast_reg; - output_9_axis_tid_reg <= input_10_axis_tid_reg; - output_9_axis_tdest_reg <= input_10_axis_tdest_reg; - output_9_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_9_axis_tdata_reg <= input_11_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_11_axis_tlast_reg; - output_9_axis_tid_reg <= input_11_axis_tid_reg; - output_9_axis_tdest_reg <= input_11_axis_tdest_reg; - output_9_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_9_axis_tdata_reg <= input_12_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_12_axis_tlast_reg; - output_9_axis_tid_reg <= input_12_axis_tid_reg; - output_9_axis_tdest_reg <= input_12_axis_tdest_reg; - output_9_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_9_axis_tdata_reg <= input_13_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_13_axis_tlast_reg; - output_9_axis_tid_reg <= input_13_axis_tid_reg; - output_9_axis_tdest_reg <= input_13_axis_tdest_reg; - output_9_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_9_axis_tdata_reg <= input_14_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_14_axis_tlast_reg; - output_9_axis_tid_reg <= input_14_axis_tid_reg; - output_9_axis_tdest_reg <= input_14_axis_tdest_reg; - output_9_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_9_axis_tdata_reg <= input_15_axis_tdata_reg; - output_9_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_9_axis_tlast_reg <= input_15_axis_tlast_reg; - output_9_axis_tid_reg <= input_15_axis_tid_reg; - output_9_axis_tdest_reg <= input_15_axis_tdest_reg; - output_9_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_10_select_reg) - 4'd0: begin - output_10_axis_tdata_reg <= input_0_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_0_axis_tlast_reg; - output_10_axis_tid_reg <= input_0_axis_tid_reg; - output_10_axis_tdest_reg <= input_0_axis_tdest_reg; - output_10_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_10_axis_tdata_reg <= input_1_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_1_axis_tlast_reg; - output_10_axis_tid_reg <= input_1_axis_tid_reg; - output_10_axis_tdest_reg <= input_1_axis_tdest_reg; - output_10_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_10_axis_tdata_reg <= input_2_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_2_axis_tlast_reg; - output_10_axis_tid_reg <= input_2_axis_tid_reg; - output_10_axis_tdest_reg <= input_2_axis_tdest_reg; - output_10_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_10_axis_tdata_reg <= input_3_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_3_axis_tlast_reg; - output_10_axis_tid_reg <= input_3_axis_tid_reg; - output_10_axis_tdest_reg <= input_3_axis_tdest_reg; - output_10_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_10_axis_tdata_reg <= input_4_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_4_axis_tlast_reg; - output_10_axis_tid_reg <= input_4_axis_tid_reg; - output_10_axis_tdest_reg <= input_4_axis_tdest_reg; - output_10_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_10_axis_tdata_reg <= input_5_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_5_axis_tlast_reg; - output_10_axis_tid_reg <= input_5_axis_tid_reg; - output_10_axis_tdest_reg <= input_5_axis_tdest_reg; - output_10_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_10_axis_tdata_reg <= input_6_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_6_axis_tlast_reg; - output_10_axis_tid_reg <= input_6_axis_tid_reg; - output_10_axis_tdest_reg <= input_6_axis_tdest_reg; - output_10_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_10_axis_tdata_reg <= input_7_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_7_axis_tlast_reg; - output_10_axis_tid_reg <= input_7_axis_tid_reg; - output_10_axis_tdest_reg <= input_7_axis_tdest_reg; - output_10_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_10_axis_tdata_reg <= input_8_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_8_axis_tlast_reg; - output_10_axis_tid_reg <= input_8_axis_tid_reg; - output_10_axis_tdest_reg <= input_8_axis_tdest_reg; - output_10_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_10_axis_tdata_reg <= input_9_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_9_axis_tlast_reg; - output_10_axis_tid_reg <= input_9_axis_tid_reg; - output_10_axis_tdest_reg <= input_9_axis_tdest_reg; - output_10_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_10_axis_tdata_reg <= input_10_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_10_axis_tlast_reg; - output_10_axis_tid_reg <= input_10_axis_tid_reg; - output_10_axis_tdest_reg <= input_10_axis_tdest_reg; - output_10_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_10_axis_tdata_reg <= input_11_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_11_axis_tlast_reg; - output_10_axis_tid_reg <= input_11_axis_tid_reg; - output_10_axis_tdest_reg <= input_11_axis_tdest_reg; - output_10_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_10_axis_tdata_reg <= input_12_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_12_axis_tlast_reg; - output_10_axis_tid_reg <= input_12_axis_tid_reg; - output_10_axis_tdest_reg <= input_12_axis_tdest_reg; - output_10_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_10_axis_tdata_reg <= input_13_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_13_axis_tlast_reg; - output_10_axis_tid_reg <= input_13_axis_tid_reg; - output_10_axis_tdest_reg <= input_13_axis_tdest_reg; - output_10_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_10_axis_tdata_reg <= input_14_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_14_axis_tlast_reg; - output_10_axis_tid_reg <= input_14_axis_tid_reg; - output_10_axis_tdest_reg <= input_14_axis_tdest_reg; - output_10_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_10_axis_tdata_reg <= input_15_axis_tdata_reg; - output_10_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_10_axis_tlast_reg <= input_15_axis_tlast_reg; - output_10_axis_tid_reg <= input_15_axis_tid_reg; - output_10_axis_tdest_reg <= input_15_axis_tdest_reg; - output_10_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_11_select_reg) - 4'd0: begin - output_11_axis_tdata_reg <= input_0_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_0_axis_tlast_reg; - output_11_axis_tid_reg <= input_0_axis_tid_reg; - output_11_axis_tdest_reg <= input_0_axis_tdest_reg; - output_11_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_11_axis_tdata_reg <= input_1_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_1_axis_tlast_reg; - output_11_axis_tid_reg <= input_1_axis_tid_reg; - output_11_axis_tdest_reg <= input_1_axis_tdest_reg; - output_11_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_11_axis_tdata_reg <= input_2_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_2_axis_tlast_reg; - output_11_axis_tid_reg <= input_2_axis_tid_reg; - output_11_axis_tdest_reg <= input_2_axis_tdest_reg; - output_11_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_11_axis_tdata_reg <= input_3_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_3_axis_tlast_reg; - output_11_axis_tid_reg <= input_3_axis_tid_reg; - output_11_axis_tdest_reg <= input_3_axis_tdest_reg; - output_11_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_11_axis_tdata_reg <= input_4_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_4_axis_tlast_reg; - output_11_axis_tid_reg <= input_4_axis_tid_reg; - output_11_axis_tdest_reg <= input_4_axis_tdest_reg; - output_11_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_11_axis_tdata_reg <= input_5_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_5_axis_tlast_reg; - output_11_axis_tid_reg <= input_5_axis_tid_reg; - output_11_axis_tdest_reg <= input_5_axis_tdest_reg; - output_11_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_11_axis_tdata_reg <= input_6_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_6_axis_tlast_reg; - output_11_axis_tid_reg <= input_6_axis_tid_reg; - output_11_axis_tdest_reg <= input_6_axis_tdest_reg; - output_11_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_11_axis_tdata_reg <= input_7_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_7_axis_tlast_reg; - output_11_axis_tid_reg <= input_7_axis_tid_reg; - output_11_axis_tdest_reg <= input_7_axis_tdest_reg; - output_11_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_11_axis_tdata_reg <= input_8_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_8_axis_tlast_reg; - output_11_axis_tid_reg <= input_8_axis_tid_reg; - output_11_axis_tdest_reg <= input_8_axis_tdest_reg; - output_11_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_11_axis_tdata_reg <= input_9_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_9_axis_tlast_reg; - output_11_axis_tid_reg <= input_9_axis_tid_reg; - output_11_axis_tdest_reg <= input_9_axis_tdest_reg; - output_11_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_11_axis_tdata_reg <= input_10_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_10_axis_tlast_reg; - output_11_axis_tid_reg <= input_10_axis_tid_reg; - output_11_axis_tdest_reg <= input_10_axis_tdest_reg; - output_11_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_11_axis_tdata_reg <= input_11_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_11_axis_tlast_reg; - output_11_axis_tid_reg <= input_11_axis_tid_reg; - output_11_axis_tdest_reg <= input_11_axis_tdest_reg; - output_11_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_11_axis_tdata_reg <= input_12_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_12_axis_tlast_reg; - output_11_axis_tid_reg <= input_12_axis_tid_reg; - output_11_axis_tdest_reg <= input_12_axis_tdest_reg; - output_11_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_11_axis_tdata_reg <= input_13_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_13_axis_tlast_reg; - output_11_axis_tid_reg <= input_13_axis_tid_reg; - output_11_axis_tdest_reg <= input_13_axis_tdest_reg; - output_11_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_11_axis_tdata_reg <= input_14_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_14_axis_tlast_reg; - output_11_axis_tid_reg <= input_14_axis_tid_reg; - output_11_axis_tdest_reg <= input_14_axis_tdest_reg; - output_11_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_11_axis_tdata_reg <= input_15_axis_tdata_reg; - output_11_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_11_axis_tlast_reg <= input_15_axis_tlast_reg; - output_11_axis_tid_reg <= input_15_axis_tid_reg; - output_11_axis_tdest_reg <= input_15_axis_tdest_reg; - output_11_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_12_select_reg) - 4'd0: begin - output_12_axis_tdata_reg <= input_0_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_0_axis_tlast_reg; - output_12_axis_tid_reg <= input_0_axis_tid_reg; - output_12_axis_tdest_reg <= input_0_axis_tdest_reg; - output_12_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_12_axis_tdata_reg <= input_1_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_1_axis_tlast_reg; - output_12_axis_tid_reg <= input_1_axis_tid_reg; - output_12_axis_tdest_reg <= input_1_axis_tdest_reg; - output_12_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_12_axis_tdata_reg <= input_2_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_2_axis_tlast_reg; - output_12_axis_tid_reg <= input_2_axis_tid_reg; - output_12_axis_tdest_reg <= input_2_axis_tdest_reg; - output_12_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_12_axis_tdata_reg <= input_3_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_3_axis_tlast_reg; - output_12_axis_tid_reg <= input_3_axis_tid_reg; - output_12_axis_tdest_reg <= input_3_axis_tdest_reg; - output_12_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_12_axis_tdata_reg <= input_4_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_4_axis_tlast_reg; - output_12_axis_tid_reg <= input_4_axis_tid_reg; - output_12_axis_tdest_reg <= input_4_axis_tdest_reg; - output_12_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_12_axis_tdata_reg <= input_5_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_5_axis_tlast_reg; - output_12_axis_tid_reg <= input_5_axis_tid_reg; - output_12_axis_tdest_reg <= input_5_axis_tdest_reg; - output_12_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_12_axis_tdata_reg <= input_6_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_6_axis_tlast_reg; - output_12_axis_tid_reg <= input_6_axis_tid_reg; - output_12_axis_tdest_reg <= input_6_axis_tdest_reg; - output_12_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_12_axis_tdata_reg <= input_7_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_7_axis_tlast_reg; - output_12_axis_tid_reg <= input_7_axis_tid_reg; - output_12_axis_tdest_reg <= input_7_axis_tdest_reg; - output_12_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_12_axis_tdata_reg <= input_8_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_8_axis_tlast_reg; - output_12_axis_tid_reg <= input_8_axis_tid_reg; - output_12_axis_tdest_reg <= input_8_axis_tdest_reg; - output_12_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_12_axis_tdata_reg <= input_9_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_9_axis_tlast_reg; - output_12_axis_tid_reg <= input_9_axis_tid_reg; - output_12_axis_tdest_reg <= input_9_axis_tdest_reg; - output_12_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_12_axis_tdata_reg <= input_10_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_10_axis_tlast_reg; - output_12_axis_tid_reg <= input_10_axis_tid_reg; - output_12_axis_tdest_reg <= input_10_axis_tdest_reg; - output_12_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_12_axis_tdata_reg <= input_11_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_11_axis_tlast_reg; - output_12_axis_tid_reg <= input_11_axis_tid_reg; - output_12_axis_tdest_reg <= input_11_axis_tdest_reg; - output_12_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_12_axis_tdata_reg <= input_12_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_12_axis_tlast_reg; - output_12_axis_tid_reg <= input_12_axis_tid_reg; - output_12_axis_tdest_reg <= input_12_axis_tdest_reg; - output_12_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_12_axis_tdata_reg <= input_13_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_13_axis_tlast_reg; - output_12_axis_tid_reg <= input_13_axis_tid_reg; - output_12_axis_tdest_reg <= input_13_axis_tdest_reg; - output_12_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_12_axis_tdata_reg <= input_14_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_14_axis_tlast_reg; - output_12_axis_tid_reg <= input_14_axis_tid_reg; - output_12_axis_tdest_reg <= input_14_axis_tdest_reg; - output_12_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_12_axis_tdata_reg <= input_15_axis_tdata_reg; - output_12_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_12_axis_tlast_reg <= input_15_axis_tlast_reg; - output_12_axis_tid_reg <= input_15_axis_tid_reg; - output_12_axis_tdest_reg <= input_15_axis_tdest_reg; - output_12_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_13_select_reg) - 4'd0: begin - output_13_axis_tdata_reg <= input_0_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_0_axis_tlast_reg; - output_13_axis_tid_reg <= input_0_axis_tid_reg; - output_13_axis_tdest_reg <= input_0_axis_tdest_reg; - output_13_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_13_axis_tdata_reg <= input_1_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_1_axis_tlast_reg; - output_13_axis_tid_reg <= input_1_axis_tid_reg; - output_13_axis_tdest_reg <= input_1_axis_tdest_reg; - output_13_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_13_axis_tdata_reg <= input_2_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_2_axis_tlast_reg; - output_13_axis_tid_reg <= input_2_axis_tid_reg; - output_13_axis_tdest_reg <= input_2_axis_tdest_reg; - output_13_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_13_axis_tdata_reg <= input_3_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_3_axis_tlast_reg; - output_13_axis_tid_reg <= input_3_axis_tid_reg; - output_13_axis_tdest_reg <= input_3_axis_tdest_reg; - output_13_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_13_axis_tdata_reg <= input_4_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_4_axis_tlast_reg; - output_13_axis_tid_reg <= input_4_axis_tid_reg; - output_13_axis_tdest_reg <= input_4_axis_tdest_reg; - output_13_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_13_axis_tdata_reg <= input_5_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_5_axis_tlast_reg; - output_13_axis_tid_reg <= input_5_axis_tid_reg; - output_13_axis_tdest_reg <= input_5_axis_tdest_reg; - output_13_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_13_axis_tdata_reg <= input_6_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_6_axis_tlast_reg; - output_13_axis_tid_reg <= input_6_axis_tid_reg; - output_13_axis_tdest_reg <= input_6_axis_tdest_reg; - output_13_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_13_axis_tdata_reg <= input_7_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_7_axis_tlast_reg; - output_13_axis_tid_reg <= input_7_axis_tid_reg; - output_13_axis_tdest_reg <= input_7_axis_tdest_reg; - output_13_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_13_axis_tdata_reg <= input_8_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_8_axis_tlast_reg; - output_13_axis_tid_reg <= input_8_axis_tid_reg; - output_13_axis_tdest_reg <= input_8_axis_tdest_reg; - output_13_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_13_axis_tdata_reg <= input_9_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_9_axis_tlast_reg; - output_13_axis_tid_reg <= input_9_axis_tid_reg; - output_13_axis_tdest_reg <= input_9_axis_tdest_reg; - output_13_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_13_axis_tdata_reg <= input_10_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_10_axis_tlast_reg; - output_13_axis_tid_reg <= input_10_axis_tid_reg; - output_13_axis_tdest_reg <= input_10_axis_tdest_reg; - output_13_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_13_axis_tdata_reg <= input_11_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_11_axis_tlast_reg; - output_13_axis_tid_reg <= input_11_axis_tid_reg; - output_13_axis_tdest_reg <= input_11_axis_tdest_reg; - output_13_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_13_axis_tdata_reg <= input_12_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_12_axis_tlast_reg; - output_13_axis_tid_reg <= input_12_axis_tid_reg; - output_13_axis_tdest_reg <= input_12_axis_tdest_reg; - output_13_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_13_axis_tdata_reg <= input_13_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_13_axis_tlast_reg; - output_13_axis_tid_reg <= input_13_axis_tid_reg; - output_13_axis_tdest_reg <= input_13_axis_tdest_reg; - output_13_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_13_axis_tdata_reg <= input_14_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_14_axis_tlast_reg; - output_13_axis_tid_reg <= input_14_axis_tid_reg; - output_13_axis_tdest_reg <= input_14_axis_tdest_reg; - output_13_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_13_axis_tdata_reg <= input_15_axis_tdata_reg; - output_13_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_13_axis_tlast_reg <= input_15_axis_tlast_reg; - output_13_axis_tid_reg <= input_15_axis_tid_reg; - output_13_axis_tdest_reg <= input_15_axis_tdest_reg; - output_13_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_14_select_reg) - 4'd0: begin - output_14_axis_tdata_reg <= input_0_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_0_axis_tlast_reg; - output_14_axis_tid_reg <= input_0_axis_tid_reg; - output_14_axis_tdest_reg <= input_0_axis_tdest_reg; - output_14_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_14_axis_tdata_reg <= input_1_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_1_axis_tlast_reg; - output_14_axis_tid_reg <= input_1_axis_tid_reg; - output_14_axis_tdest_reg <= input_1_axis_tdest_reg; - output_14_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_14_axis_tdata_reg <= input_2_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_2_axis_tlast_reg; - output_14_axis_tid_reg <= input_2_axis_tid_reg; - output_14_axis_tdest_reg <= input_2_axis_tdest_reg; - output_14_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_14_axis_tdata_reg <= input_3_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_3_axis_tlast_reg; - output_14_axis_tid_reg <= input_3_axis_tid_reg; - output_14_axis_tdest_reg <= input_3_axis_tdest_reg; - output_14_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_14_axis_tdata_reg <= input_4_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_4_axis_tlast_reg; - output_14_axis_tid_reg <= input_4_axis_tid_reg; - output_14_axis_tdest_reg <= input_4_axis_tdest_reg; - output_14_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_14_axis_tdata_reg <= input_5_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_5_axis_tlast_reg; - output_14_axis_tid_reg <= input_5_axis_tid_reg; - output_14_axis_tdest_reg <= input_5_axis_tdest_reg; - output_14_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_14_axis_tdata_reg <= input_6_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_6_axis_tlast_reg; - output_14_axis_tid_reg <= input_6_axis_tid_reg; - output_14_axis_tdest_reg <= input_6_axis_tdest_reg; - output_14_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_14_axis_tdata_reg <= input_7_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_7_axis_tlast_reg; - output_14_axis_tid_reg <= input_7_axis_tid_reg; - output_14_axis_tdest_reg <= input_7_axis_tdest_reg; - output_14_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_14_axis_tdata_reg <= input_8_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_8_axis_tlast_reg; - output_14_axis_tid_reg <= input_8_axis_tid_reg; - output_14_axis_tdest_reg <= input_8_axis_tdest_reg; - output_14_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_14_axis_tdata_reg <= input_9_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_9_axis_tlast_reg; - output_14_axis_tid_reg <= input_9_axis_tid_reg; - output_14_axis_tdest_reg <= input_9_axis_tdest_reg; - output_14_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_14_axis_tdata_reg <= input_10_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_10_axis_tlast_reg; - output_14_axis_tid_reg <= input_10_axis_tid_reg; - output_14_axis_tdest_reg <= input_10_axis_tdest_reg; - output_14_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_14_axis_tdata_reg <= input_11_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_11_axis_tlast_reg; - output_14_axis_tid_reg <= input_11_axis_tid_reg; - output_14_axis_tdest_reg <= input_11_axis_tdest_reg; - output_14_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_14_axis_tdata_reg <= input_12_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_12_axis_tlast_reg; - output_14_axis_tid_reg <= input_12_axis_tid_reg; - output_14_axis_tdest_reg <= input_12_axis_tdest_reg; - output_14_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_14_axis_tdata_reg <= input_13_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_13_axis_tlast_reg; - output_14_axis_tid_reg <= input_13_axis_tid_reg; - output_14_axis_tdest_reg <= input_13_axis_tdest_reg; - output_14_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_14_axis_tdata_reg <= input_14_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_14_axis_tlast_reg; - output_14_axis_tid_reg <= input_14_axis_tid_reg; - output_14_axis_tdest_reg <= input_14_axis_tdest_reg; - output_14_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_14_axis_tdata_reg <= input_15_axis_tdata_reg; - output_14_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_14_axis_tlast_reg <= input_15_axis_tlast_reg; - output_14_axis_tid_reg <= input_15_axis_tid_reg; - output_14_axis_tdest_reg <= input_15_axis_tdest_reg; - output_14_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase - - case (output_15_select_reg) - 4'd0: begin - output_15_axis_tdata_reg <= input_0_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_0_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_0_axis_tlast_reg; - output_15_axis_tid_reg <= input_0_axis_tid_reg; - output_15_axis_tdest_reg <= input_0_axis_tdest_reg; - output_15_axis_tuser_reg <= input_0_axis_tuser_reg; - end - 4'd1: begin - output_15_axis_tdata_reg <= input_1_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_1_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_1_axis_tlast_reg; - output_15_axis_tid_reg <= input_1_axis_tid_reg; - output_15_axis_tdest_reg <= input_1_axis_tdest_reg; - output_15_axis_tuser_reg <= input_1_axis_tuser_reg; - end - 4'd2: begin - output_15_axis_tdata_reg <= input_2_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_2_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_2_axis_tlast_reg; - output_15_axis_tid_reg <= input_2_axis_tid_reg; - output_15_axis_tdest_reg <= input_2_axis_tdest_reg; - output_15_axis_tuser_reg <= input_2_axis_tuser_reg; - end - 4'd3: begin - output_15_axis_tdata_reg <= input_3_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_3_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_3_axis_tlast_reg; - output_15_axis_tid_reg <= input_3_axis_tid_reg; - output_15_axis_tdest_reg <= input_3_axis_tdest_reg; - output_15_axis_tuser_reg <= input_3_axis_tuser_reg; - end - 4'd4: begin - output_15_axis_tdata_reg <= input_4_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_4_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_4_axis_tlast_reg; - output_15_axis_tid_reg <= input_4_axis_tid_reg; - output_15_axis_tdest_reg <= input_4_axis_tdest_reg; - output_15_axis_tuser_reg <= input_4_axis_tuser_reg; - end - 4'd5: begin - output_15_axis_tdata_reg <= input_5_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_5_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_5_axis_tlast_reg; - output_15_axis_tid_reg <= input_5_axis_tid_reg; - output_15_axis_tdest_reg <= input_5_axis_tdest_reg; - output_15_axis_tuser_reg <= input_5_axis_tuser_reg; - end - 4'd6: begin - output_15_axis_tdata_reg <= input_6_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_6_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_6_axis_tlast_reg; - output_15_axis_tid_reg <= input_6_axis_tid_reg; - output_15_axis_tdest_reg <= input_6_axis_tdest_reg; - output_15_axis_tuser_reg <= input_6_axis_tuser_reg; - end - 4'd7: begin - output_15_axis_tdata_reg <= input_7_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_7_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_7_axis_tlast_reg; - output_15_axis_tid_reg <= input_7_axis_tid_reg; - output_15_axis_tdest_reg <= input_7_axis_tdest_reg; - output_15_axis_tuser_reg <= input_7_axis_tuser_reg; - end - 4'd8: begin - output_15_axis_tdata_reg <= input_8_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_8_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_8_axis_tlast_reg; - output_15_axis_tid_reg <= input_8_axis_tid_reg; - output_15_axis_tdest_reg <= input_8_axis_tdest_reg; - output_15_axis_tuser_reg <= input_8_axis_tuser_reg; - end - 4'd9: begin - output_15_axis_tdata_reg <= input_9_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_9_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_9_axis_tlast_reg; - output_15_axis_tid_reg <= input_9_axis_tid_reg; - output_15_axis_tdest_reg <= input_9_axis_tdest_reg; - output_15_axis_tuser_reg <= input_9_axis_tuser_reg; - end - 4'd10: begin - output_15_axis_tdata_reg <= input_10_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_10_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_10_axis_tlast_reg; - output_15_axis_tid_reg <= input_10_axis_tid_reg; - output_15_axis_tdest_reg <= input_10_axis_tdest_reg; - output_15_axis_tuser_reg <= input_10_axis_tuser_reg; - end - 4'd11: begin - output_15_axis_tdata_reg <= input_11_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_11_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_11_axis_tlast_reg; - output_15_axis_tid_reg <= input_11_axis_tid_reg; - output_15_axis_tdest_reg <= input_11_axis_tdest_reg; - output_15_axis_tuser_reg <= input_11_axis_tuser_reg; - end - 4'd12: begin - output_15_axis_tdata_reg <= input_12_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_12_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_12_axis_tlast_reg; - output_15_axis_tid_reg <= input_12_axis_tid_reg; - output_15_axis_tdest_reg <= input_12_axis_tdest_reg; - output_15_axis_tuser_reg <= input_12_axis_tuser_reg; - end - 4'd13: begin - output_15_axis_tdata_reg <= input_13_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_13_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_13_axis_tlast_reg; - output_15_axis_tid_reg <= input_13_axis_tid_reg; - output_15_axis_tdest_reg <= input_13_axis_tdest_reg; - output_15_axis_tuser_reg <= input_13_axis_tuser_reg; - end - 4'd14: begin - output_15_axis_tdata_reg <= input_14_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_14_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_14_axis_tlast_reg; - output_15_axis_tid_reg <= input_14_axis_tid_reg; - output_15_axis_tdest_reg <= input_14_axis_tdest_reg; - output_15_axis_tuser_reg <= input_14_axis_tuser_reg; - end - 4'd15: begin - output_15_axis_tdata_reg <= input_15_axis_tdata_reg; - output_15_axis_tkeep_reg <= input_15_axis_tkeep_reg; - output_15_axis_tlast_reg <= input_15_axis_tlast_reg; - output_15_axis_tid_reg <= input_15_axis_tid_reg; - output_15_axis_tdest_reg <= input_15_axis_tdest_reg; - output_15_axis_tuser_reg <= input_15_axis_tuser_reg; - end - endcase -end - -endmodule diff --git a/example/HXT100G/fpga_cxpt16/rtl/fpga_core.v b/example/HXT100G/fpga_cxpt16/rtl/fpga_core.v index 661271db5..489938126 100644 --- a/example/HXT100G/fpga_cxpt16/rtl/fpga_core.v +++ b/example/HXT100G/fpga_cxpt16/rtl/fpga_core.v @@ -213,7 +213,9 @@ reg [7:0] select_reg_14 = 14; reg [7:0] select_reg_15 = 15; -axis_crosspoint_16x16 #( +axis_crosspoint #( + .S_COUNT(16), + .M_COUNT(16), .DATA_WIDTH(64), .KEEP_ENABLE(1), .KEEP_WIDTH(8), @@ -226,120 +228,23 @@ axis_crosspoint_inst ( .clk(clk), .rst(rst), - .input_0_axis_tdata(eth_l0_rxd), - .input_0_axis_tkeep(eth_l0_rxc), - .input_0_axis_tvalid(1'b1), - .input_1_axis_tdata(eth_l1_rxd), - .input_1_axis_tkeep(eth_l1_rxc), - .input_1_axis_tvalid(1'b1), - .input_2_axis_tdata(eth_l2_rxd), - .input_2_axis_tkeep(eth_l2_rxc), - .input_2_axis_tvalid(1'b1), - .input_3_axis_tdata(eth_l3_rxd), - .input_3_axis_tkeep(eth_l3_rxc), - .input_3_axis_tvalid(1'b1), - .input_4_axis_tdata(eth_l4_rxd), - .input_4_axis_tkeep(eth_l4_rxc), - .input_4_axis_tvalid(1'b1), - .input_5_axis_tdata(eth_l5_rxd), - .input_5_axis_tkeep(eth_l5_rxc), - .input_5_axis_tvalid(1'b1), - .input_6_axis_tdata(eth_l6_rxd), - .input_6_axis_tkeep(eth_l6_rxc), - .input_6_axis_tvalid(1'b1), - .input_7_axis_tdata(eth_l7_rxd), - .input_7_axis_tkeep(eth_l7_rxc), - .input_7_axis_tvalid(1'b1), - .input_8_axis_tdata(eth_r0_rxd), - .input_8_axis_tkeep(eth_r0_rxc), - .input_8_axis_tvalid(1'b1), - .input_9_axis_tdata(eth_r1_rxd), - .input_9_axis_tkeep(eth_r1_rxc), - .input_9_axis_tvalid(1'b1), - .input_10_axis_tdata(eth_r2_rxd), - .input_10_axis_tkeep(eth_r2_rxc), - .input_10_axis_tvalid(1'b1), - .input_11_axis_tdata(eth_r3_rxd), - .input_11_axis_tkeep(eth_r3_rxc), - .input_11_axis_tvalid(1'b1), - .input_12_axis_tdata(eth_r4_rxd), - .input_12_axis_tkeep(eth_r4_rxc), - .input_12_axis_tvalid(1'b1), - .input_13_axis_tdata(eth_r5_rxd), - .input_13_axis_tkeep(eth_r5_rxc), - .input_13_axis_tvalid(1'b1), - .input_14_axis_tdata(eth_r6_rxd), - .input_14_axis_tkeep(eth_r6_rxc), - .input_14_axis_tvalid(1'b1), - .input_15_axis_tdata(eth_r7_rxd), - .input_15_axis_tkeep(eth_r7_rxc), - .input_15_axis_tvalid(1'b1), + .s_axis_tdata({eth_r7_rxd, eth_r6_rxd, eth_r5_rxd, eth_r4_rxd, eth_r3_rxd, eth_r2_rxd, eth_r1_rxd, eth_r0_rxd, eth_l7_rxd, eth_l6_rxd, eth_l5_rxd, eth_l4_rxd, eth_l3_rxd, eth_l2_rxd, eth_l1_rxd, eth_l0_rxd}), + .s_axis_tkeep({eth_r7_rxc, eth_r6_rxc, eth_r5_rxc, eth_r4_rxc, eth_r3_rxc, eth_r2_rxc, eth_r1_rxc, eth_r0_rxc, eth_l7_rxc, eth_l6_rxc, eth_l5_rxc, eth_l4_rxc, eth_l3_rxc, eth_l2_rxc, eth_l1_rxc, eth_l0_rxc}), + .s_axis_tvalid(16'hffff), + .s_axis_tlast(0), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(0), - .output_0_axis_tdata(eth_l0_txd), - .output_0_axis_tkeep(eth_l0_txc), - .output_0_axis_tvalid(), - .output_1_axis_tdata(eth_l1_txd), - .output_1_axis_tkeep(eth_l1_txc), - .output_1_axis_tvalid(), - .output_2_axis_tdata(eth_l2_txd), - .output_2_axis_tkeep(eth_l2_txc), - .output_2_axis_tvalid(), - .output_3_axis_tdata(eth_l3_txd), - .output_3_axis_tkeep(eth_l3_txc), - .output_3_axis_tvalid(), - .output_4_axis_tdata(eth_l4_txd), - .output_4_axis_tkeep(eth_l4_txc), - .output_4_axis_tvalid(), - .output_5_axis_tdata(eth_l5_txd), - .output_5_axis_tkeep(eth_l5_txc), - .output_5_axis_tvalid(), - .output_6_axis_tdata(eth_l6_txd), - .output_6_axis_tkeep(eth_l6_txc), - .output_6_axis_tvalid(), - .output_7_axis_tdata(eth_l7_txd), - .output_7_axis_tkeep(eth_l7_txc), - .output_7_axis_tvalid(), - .output_8_axis_tdata(eth_r0_txd), - .output_8_axis_tkeep(eth_r0_txc), - .output_8_axis_tvalid(), - .output_9_axis_tdata(eth_r1_txd), - .output_9_axis_tkeep(eth_r1_txc), - .output_9_axis_tvalid(), - .output_10_axis_tdata(eth_r2_txd), - .output_10_axis_tkeep(eth_r2_txc), - .output_10_axis_tvalid(), - .output_11_axis_tdata(eth_r3_txd), - .output_11_axis_tkeep(eth_r3_txc), - .output_11_axis_tvalid(), - .output_12_axis_tdata(eth_r4_txd), - .output_12_axis_tkeep(eth_r4_txc), - .output_12_axis_tvalid(), - .output_13_axis_tdata(eth_r5_txd), - .output_13_axis_tkeep(eth_r5_txc), - .output_13_axis_tvalid(), - .output_14_axis_tdata(eth_r6_txd), - .output_14_axis_tkeep(eth_r6_txc), - .output_14_axis_tvalid(), - .output_15_axis_tdata(eth_r7_txd), - .output_15_axis_tkeep(eth_r7_txc), - .output_15_axis_tvalid(), + .m_axis_tdata({eth_r7_txd, eth_r6_txd, eth_r5_txd, eth_r4_txd, eth_r3_txd, eth_r2_txd, eth_r1_txd, eth_r0_txd, eth_l7_txd, eth_l6_txd, eth_l5_txd, eth_l4_txd, eth_l3_txd, eth_l2_txd, eth_l1_txd, eth_l0_txd}), + .m_axis_tkeep({eth_r7_txc, eth_r6_txc, eth_r5_txc, eth_r4_txc, eth_r3_txc, eth_r2_txc, eth_r1_txc, eth_r0_txc, eth_l7_txc, eth_l6_txc, eth_l5_txc, eth_l4_txc, eth_l3_txc, eth_l2_txc, eth_l1_txc, eth_l0_txc}), + .m_axis_tvalid(), + .m_axis_tlast(), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(), - .output_0_select(select_reg_0), - .output_1_select(select_reg_1), - .output_2_select(select_reg_2), - .output_3_select(select_reg_3), - .output_4_select(select_reg_4), - .output_5_select(select_reg_5), - .output_6_select(select_reg_6), - .output_7_select(select_reg_7), - .output_8_select(select_reg_8), - .output_9_select(select_reg_9), - .output_10_select(select_reg_10), - .output_11_select(select_reg_11), - .output_12_select(select_reg_12), - .output_13_select(select_reg_13), - .output_14_select(select_reg_14), - .output_15_select(select_reg_15) + .select({select_reg_15[3:0], select_reg_14[3:0], select_reg_13[3:0], select_reg_12[3:0], select_reg_11[3:0], select_reg_10[3:0], select_reg_9[3:0], select_reg_8[3:0], select_reg_7[3:0], select_reg_6[3:0], select_reg_5[3:0], select_reg_4[3:0], select_reg_3[3:0], select_reg_2[3:0], select_reg_1[3:0], select_reg_0[3:0]}) ); wire [63:0] eth_rx_axis_tdata; @@ -364,7 +269,11 @@ wire eth_rx_payload_tuser; eth_mac_10g_fifo #( .ENABLE_PADDING(1), .ENABLE_DIC(1), - .MIN_FRAME_LENGTH(64) + .MIN_FRAME_LENGTH(64), + .TX_FIFO_ADDR_WIDTH(9), + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(9), + .RX_FRAME_FIFO(1) ) eth_mac_fifo_inst ( .rx_clk(clk), diff --git a/example/HXT100G/fpga_cxpt16/tb/test_fpga_core.py b/example/HXT100G/fpga_cxpt16/tb/test_fpga_core.py index b2ac78167..5957dc951 100755 --- a/example/HXT100G/fpga_cxpt16/tb/test_fpga_core.py +++ b/example/HXT100G/fpga_cxpt16/tb/test_fpga_core.py @@ -35,7 +35,6 @@ testbench = 'test_%s' % module srcs = [] srcs.append("../rtl/%s.v" % module) -srcs.append("../rtl/axis_crosspoint_16x16.v") srcs.append("../lib/eth/rtl/eth_mac_10g_fifo.v") srcs.append("../lib/eth/rtl/eth_mac_10g.v") srcs.append("../lib/eth/rtl/axis_xgmii_rx_64.v") @@ -43,7 +42,8 @@ srcs.append("../lib/eth/rtl/axis_xgmii_tx_64.v") srcs.append("../lib/eth/rtl/lfsr.v") srcs.append("../lib/eth/rtl/eth_axis_rx_64.v") srcs.append("../lib/eth/rtl/eth_axis_tx_64.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_crosspoint.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/ML605/fpga_gmii/fpga_130t/Makefile b/example/ML605/fpga_gmii/fpga_130t/Makefile index 3fb95b4da..887f1c88a 100644 --- a/example/ML605/fpga_gmii/fpga_130t/Makefile +++ b/example/ML605/fpga_gmii/fpga_130t/Makefile @@ -47,7 +47,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v #SYN_FILES += coregen/dcm_i100_o125/dcm_i100_o125.v # UCF files diff --git a/example/ML605/fpga_gmii/fpga_240t/Makefile b/example/ML605/fpga_gmii/fpga_240t/Makefile index ab73d9bbf..a7afe00c5 100644 --- a/example/ML605/fpga_gmii/fpga_240t/Makefile +++ b/example/ML605/fpga_gmii/fpga_240t/Makefile @@ -47,7 +47,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v #SYN_FILES += coregen/dcm_i100_o125/dcm_i100_o125.v # UCF files diff --git a/example/ML605/fpga_gmii/rtl/fpga_core.v b/example/ML605/fpga_gmii/rtl/fpga_core.v index 401a36595..40e262819 100644 --- a/example/ML605/fpga_gmii/rtl/fpga_core.v +++ b/example/ML605/fpga_gmii/rtl/fpga_core.v @@ -330,7 +330,9 @@ eth_mac_1g_gmii_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .gtx_clk(clk_125mhz), @@ -563,31 +565,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk_125mhz), .rst(rst_125mhz), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/ML605/fpga_gmii/tb/test_fpga_core.py b/example/ML605/fpga_gmii/tb/test_fpga_core.py index b4c0cf27b..7eb64d5fc 100755 --- a/example/ML605/fpga_gmii/tb/test_fpga_core.py +++ b/example/ML605/fpga_gmii/tb/test_fpga_core.py @@ -70,7 +70,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/ML605/fpga_rgmii/fpga_130t/Makefile b/example/ML605/fpga_rgmii/fpga_130t/Makefile index a601f5990..7213586b0 100644 --- a/example/ML605/fpga_rgmii/fpga_130t/Makefile +++ b/example/ML605/fpga_rgmii/fpga_130t/Makefile @@ -47,7 +47,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v #SYN_FILES += coregen/dcm_i100_o125/dcm_i100_o125.v # UCF files diff --git a/example/ML605/fpga_rgmii/fpga_240t/Makefile b/example/ML605/fpga_rgmii/fpga_240t/Makefile index e46f861a8..09396893e 100644 --- a/example/ML605/fpga_rgmii/fpga_240t/Makefile +++ b/example/ML605/fpga_rgmii/fpga_240t/Makefile @@ -47,7 +47,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v #SYN_FILES += coregen/dcm_i100_o125/dcm_i100_o125.v # UCF files diff --git a/example/ML605/fpga_rgmii/rtl/fpga_core.v b/example/ML605/fpga_rgmii/rtl/fpga_core.v index 107b83052..daf922d50 100644 --- a/example/ML605/fpga_rgmii/rtl/fpga_core.v +++ b/example/ML605/fpga_rgmii/rtl/fpga_core.v @@ -329,7 +329,9 @@ eth_mac_1g_rgmii_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .gtx_clk(clk_125mhz), @@ -560,31 +562,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk_125mhz), .rst(rst_125mhz), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/ML605/fpga_rgmii/tb/test_fpga_core.py b/example/ML605/fpga_rgmii/tb/test_fpga_core.py index 4847fe10e..d5d531aae 100755 --- a/example/ML605/fpga_rgmii/tb/test_fpga_core.py +++ b/example/ML605/fpga_rgmii/tb/test_fpga_core.py @@ -70,7 +70,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/ML605/fpga_sgmii/fpga_130t/Makefile b/example/ML605/fpga_sgmii/fpga_130t/Makefile index dc4fb229e..904197fa3 100644 --- a/example/ML605/fpga_sgmii/fpga_130t/Makefile +++ b/example/ML605/fpga_sgmii/fpga_130t/Makefile @@ -41,7 +41,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_clk_gen.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_johnson_cntr.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_rx_rate_adapt.v diff --git a/example/ML605/fpga_sgmii/fpga_240t/Makefile b/example/ML605/fpga_sgmii/fpga_240t/Makefile index ac9178695..07d08b056 100644 --- a/example/ML605/fpga_sgmii/fpga_240t/Makefile +++ b/example/ML605/fpga_sgmii/fpga_240t/Makefile @@ -41,7 +41,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_clk_gen.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_johnson_cntr.v SYN_FILES += coregen/gig_eth_pcs_pma_v11_5/gig_eth_pcs_pma_v11_5/example_design/sgmii_adapt/gig_eth_pcs_pma_v11_5_rx_rate_adapt.v diff --git a/example/ML605/fpga_sgmii/rtl/fpga_core.v b/example/ML605/fpga_sgmii/rtl/fpga_core.v index ef00064ca..57285c5ee 100644 --- a/example/ML605/fpga_sgmii/rtl/fpga_core.v +++ b/example/ML605/fpga_sgmii/rtl/fpga_core.v @@ -324,7 +324,9 @@ eth_mac_1g_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .rx_clk(phy_gmii_clk), @@ -560,31 +562,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk_125mhz), .rst(rst_125mhz), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/ML605/fpga_sgmii/tb/test_fpga_core.py b/example/ML605/fpga_sgmii/tb/test_fpga_core.py index 32db62f37..ddf35e258 100755 --- a/example/ML605/fpga_sgmii/tb/test_fpga_core.py +++ b/example/ML605/fpga_sgmii/tb/test_fpga_core.py @@ -64,7 +64,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/NexysVideo/fpga/fpga/Makefile b/example/NexysVideo/fpga/fpga/Makefile index 3c4d634dd..7fc84a388 100644 --- a/example/NexysVideo/fpga/fpga/Makefile +++ b/example/NexysVideo/fpga/fpga/Makefile @@ -43,7 +43,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v # XDC files XDC_FILES = fpga.xdc diff --git a/example/NexysVideo/fpga/rtl/fpga_core.v b/example/NexysVideo/fpga/rtl/fpga_core.v index 06a6bdb5a..029b5a39c 100644 --- a/example/NexysVideo/fpga/rtl/fpga_core.v +++ b/example/NexysVideo/fpga/rtl/fpga_core.v @@ -318,7 +318,9 @@ eth_mac_1g_rgmii_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .gtx_clk(clk), @@ -549,31 +551,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/NexysVideo/fpga/tb/test_fpga_core.py b/example/NexysVideo/fpga/tb/test_fpga_core.py index b42e78d2f..a4569af8b 100755 --- a/example/NexysVideo/fpga/tb/test_fpga_core.py +++ b/example/NexysVideo/fpga/tb/test_fpga_core.py @@ -70,7 +70,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/VCU108/fpga_10g/fpga/Makefile b/example/VCU108/fpga_10g/fpga/Makefile index 8715ba573..998fb7f8f 100644 --- a/example/VCU108/fpga_10g/fpga/Makefile +++ b/example/VCU108/fpga_10g/fpga/Makefile @@ -44,8 +44,9 @@ SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_adapter.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_switch_4x4.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_switch.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_register.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v # XDC files XDC_FILES = fpga.xdc diff --git a/example/VCU108/fpga_10g/rtl/fpga_core.v b/example/VCU108/fpga_10g/rtl/fpga_core.v index 667ddabb4..aad908db8 100644 --- a/example/VCU108/fpga_10g/rtl/fpga_core.v +++ b/example/VCU108/fpga_10g/rtl/fpga_core.v @@ -366,7 +366,9 @@ eth_mac_10g_fifo #( .ENABLE_DIC(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(9), - .RX_FIFO_ADDR_WIDTH(9) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(9), + .RX_FRAME_FIFO(1) ) eth_mac_10g_fifo_inst ( .rx_clk(clk), @@ -438,7 +440,9 @@ eth_mac_1g_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_1g_inst ( .rx_clk(phy_gmii_clk), @@ -485,8 +489,8 @@ eth_mac_1g_inst ( ); axis_adapter #( - .INPUT_DATA_WIDTH(8), - .OUTPUT_DATA_WIDTH(64), + .S_DATA_WIDTH(8), + .M_DATA_WIDTH(64), .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), @@ -496,24 +500,24 @@ gig_rx_axis_adapter_inst ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(gig_rx_axis_tdata), - .input_axis_tkeep(1'b1), - .input_axis_tvalid(gig_rx_axis_tvalid), - .input_axis_tready(gig_rx_axis_tready), - .input_axis_tlast(gig_rx_axis_tlast), - .input_axis_tuser(gig_rx_axis_tuser), + .s_axis_tdata(gig_rx_axis_tdata), + .s_axis_tkeep(1'b1), + .s_axis_tvalid(gig_rx_axis_tvalid), + .s_axis_tready(gig_rx_axis_tready), + .s_axis_tlast(gig_rx_axis_tlast), + .s_axis_tuser(gig_rx_axis_tuser), // AXI output - .output_axis_tdata(gig_rx_axis_tdata_64), - .output_axis_tkeep(gig_rx_axis_tkeep_64), - .output_axis_tvalid(gig_rx_axis_tvalid_64), - .output_axis_tready(gig_rx_axis_tready_64), - .output_axis_tlast(gig_rx_axis_tlast_64), - .output_axis_tuser(gig_rx_axis_tuser_64) + .m_axis_tdata(gig_rx_axis_tdata_64), + .m_axis_tkeep(gig_rx_axis_tkeep_64), + .m_axis_tvalid(gig_rx_axis_tvalid_64), + .m_axis_tready(gig_rx_axis_tready_64), + .m_axis_tlast(gig_rx_axis_tlast_64), + .m_axis_tuser(gig_rx_axis_tuser_64) ); axis_adapter #( - .INPUT_DATA_WIDTH(64), - .OUTPUT_DATA_WIDTH(8), + .S_DATA_WIDTH(64), + .M_DATA_WIDTH(8), .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), @@ -523,19 +527,19 @@ gig_tx_axis_adapter_inst ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(gig_tx_axis_tdata_64), - .input_axis_tkeep(gig_tx_axis_tkeep_64), - .input_axis_tvalid(gig_tx_axis_tvalid_64), - .input_axis_tready(gig_tx_axis_tready_64), - .input_axis_tlast(gig_tx_axis_tlast_64), - .input_axis_tuser(gig_tx_axis_tuser_64), + .s_axis_tdata(gig_tx_axis_tdata_64), + .s_axis_tkeep(gig_tx_axis_tkeep_64), + .s_axis_tvalid(gig_tx_axis_tvalid_64), + .s_axis_tready(gig_tx_axis_tready_64), + .s_axis_tlast(gig_tx_axis_tlast_64), + .s_axis_tuser(gig_tx_axis_tuser_64), // AXI output - .output_axis_tdata(gig_tx_axis_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(gig_tx_axis_tvalid), - .output_axis_tready(gig_tx_axis_tready), - .output_axis_tlast(gig_tx_axis_tlast), - .output_axis_tuser(gig_tx_axis_tuser) + .m_axis_tdata(gig_tx_axis_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(gig_tx_axis_tvalid), + .m_axis_tready(gig_tx_axis_tready), + .m_axis_tlast(gig_tx_axis_tlast), + .m_axis_tuser(gig_tx_axis_tuser) ); // tap port mux logic @@ -576,25 +580,20 @@ always @* begin end end -axis_switch_4x4 #( +axis_switch #( + .S_COUNT(3), + .M_COUNT(3), .DATA_WIDTH(64), .KEEP_WIDTH(8), .ID_ENABLE(0), .DEST_WIDTH(2), .USER_ENABLE(1), .USER_WIDTH(1), - .OUT_0_BASE(0), - .OUT_0_TOP(0), - .OUT_0_CONNECT(4'b1111), - .OUT_1_BASE(1), - .OUT_1_TOP(1), - .OUT_1_CONNECT(4'b1111), - .OUT_2_BASE(2), - .OUT_2_TOP(2), - .OUT_2_CONNECT(4'b1111), - .OUT_3_BASE(3), - .OUT_3_TOP(3), - .OUT_3_CONNECT(4'b1111), + .M_BASE({32'd2, 32'd1, 32'd0}), + .M_TOP({32'd2, 32'd1, 32'd0}), + .M_CONNECT({3{3'b111}}), + .S_REG_TYPE(0), + .M_REG_TYPE(1), .ARB_TYPE("PRIORITY"), .LSB_PRIORITY("HIGH") ) @@ -602,71 +601,23 @@ axis_switch_inst ( .clk(clk), .rst(rst), // AXI inputs - .input_0_axis_tdata(mac_rx_axis_tdata), - .input_0_axis_tkeep(mac_rx_axis_tkeep), - .input_0_axis_tvalid(mac_rx_axis_tvalid), - .input_0_axis_tready(mac_rx_axis_tready), - .input_0_axis_tlast(mac_rx_axis_tlast), - .input_0_axis_tid(0), - .input_0_axis_tdest(mac_rx_tdest), - .input_0_axis_tuser(mac_rx_axis_tuser), - .input_1_axis_tdata(tx_axis_tdata), - .input_1_axis_tkeep(tx_axis_tkeep), - .input_1_axis_tvalid(tx_axis_tvalid), - .input_1_axis_tready(tx_axis_tready), - .input_1_axis_tlast(tx_axis_tlast), - .input_1_axis_tid(0), - .input_1_axis_tdest(tx_tdest), - .input_1_axis_tuser(tx_axis_tuser), - .input_2_axis_tdata(gig_rx_axis_tdata_64), - .input_2_axis_tkeep(gig_rx_axis_tkeep_64), - .input_2_axis_tvalid(gig_rx_axis_tvalid_64), - .input_2_axis_tready(gig_rx_axis_tready_64), - .input_2_axis_tlast(gig_rx_axis_tlast_64), - .input_2_axis_tid(0), - .input_2_axis_tdest(gig_rx_tdest), - .input_2_axis_tuser(gig_rx_axis_tuser_64), - .input_3_axis_tdata(64'd0), - .input_3_axis_tkeep(8'd0), - .input_3_axis_tvalid(1'b0), - .input_3_axis_tready(), - .input_3_axis_tlast(1'b0), - .input_3_axis_tid(0), - .input_3_axis_tdest(2'd0), - .input_3_axis_tuser(1'b0), + .s_axis_tdata({ gig_rx_axis_tdata_64, tx_axis_tdata, mac_rx_axis_tdata}), + .s_axis_tkeep({ gig_rx_axis_tkeep_64, tx_axis_tkeep, mac_rx_axis_tkeep}), + .s_axis_tvalid({gig_rx_axis_tvalid_64, tx_axis_tvalid, mac_rx_axis_tvalid}), + .s_axis_tready({gig_rx_axis_tready_64, tx_axis_tready, mac_rx_axis_tready}), + .s_axis_tlast({ gig_rx_axis_tlast_64, tx_axis_tlast, mac_rx_axis_tlast}), + .s_axis_tid(0), + .s_axis_tdest({ gig_rx_tdest, tx_tdest, mac_rx_tdest}), + .s_axis_tuser({ gig_rx_axis_tuser_64, tx_axis_tuser, mac_rx_axis_tuser}), // AXI outputs - .output_0_axis_tdata(mac_tx_axis_tdata), - .output_0_axis_tkeep(mac_tx_axis_tkeep), - .output_0_axis_tvalid(mac_tx_axis_tvalid), - .output_0_axis_tready(mac_tx_axis_tready), - .output_0_axis_tlast(mac_tx_axis_tlast), - .output_0_axis_tid(), - .output_0_axis_tdest(), - .output_0_axis_tuser(mac_tx_axis_tuser), - .output_1_axis_tdata(rx_axis_tdata), - .output_1_axis_tkeep(rx_axis_tkeep), - .output_1_axis_tvalid(rx_axis_tvalid), - .output_1_axis_tready(rx_axis_tready), - .output_1_axis_tlast(rx_axis_tlast), - .output_1_axis_tid(), - .output_1_axis_tdest(), - .output_1_axis_tuser(rx_axis_tuser), - .output_2_axis_tdata(gig_tx_axis_tdata_64), - .output_2_axis_tkeep(gig_tx_axis_tkeep_64), - .output_2_axis_tvalid(gig_tx_axis_tvalid_64), - .output_2_axis_tready(gig_tx_axis_tready_64), - .output_2_axis_tlast(gig_tx_axis_tlast_64), - .output_2_axis_tid(), - .output_2_axis_tdest(), - .output_2_axis_tuser(gig_tx_axis_tuser_64), - .output_3_axis_tdata(), - .output_3_axis_tkeep(), - .output_3_axis_tvalid(), - .output_3_axis_tready(1'b1), - .output_3_axis_tlast(), - .output_3_axis_tid(), - .output_3_axis_tdest(), - .output_3_axis_tuser() + .m_axis_tdata({ gig_tx_axis_tdata_64, rx_axis_tdata, mac_tx_axis_tdata}), + .m_axis_tkeep({ gig_tx_axis_tkeep_64, rx_axis_tkeep, mac_tx_axis_tkeep}), + .m_axis_tvalid({gig_tx_axis_tvalid_64, rx_axis_tvalid, mac_tx_axis_tvalid}), + .m_axis_tready({gig_tx_axis_tready_64, rx_axis_tready, mac_tx_axis_tready}), + .m_axis_tlast({ gig_tx_axis_tlast_64, rx_axis_tlast, mac_tx_axis_tlast}), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser({ gig_tx_axis_tuser_64, rx_axis_tuser, mac_tx_axis_tuser}) ); eth_axis_rx_64 @@ -870,31 +821,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(rx_fifo_udp_payload_tkeep), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(rx_fifo_udp_payload_tkeep), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(tx_fifo_udp_payload_tkeep), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(tx_fifo_udp_payload_tkeep), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/VCU108/fpga_10g/tb/test_fpga_core.py b/example/VCU108/fpga_10g/tb/test_fpga_core.py index b1dc4cfef..329c744a4 100755 --- a/example/VCU108/fpga_10g/tb/test_fpga_core.py +++ b/example/VCU108/fpga_10g/tb/test_fpga_core.py @@ -72,8 +72,9 @@ srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_adapter.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_switch_4x4.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_switch.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_register.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/VCU108/fpga_1g/fpga/Makefile b/example/VCU108/fpga_1g/fpga/Makefile index 06fa804e2..0813b174f 100644 --- a/example/VCU108/fpga_1g/fpga/Makefile +++ b/example/VCU108/fpga_1g/fpga/Makefile @@ -37,7 +37,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v # XDC files XDC_FILES = fpga.xdc diff --git a/example/VCU108/fpga_1g/rtl/fpga_core.v b/example/VCU108/fpga_1g/rtl/fpga_core.v index f43f65acf..a04cf559f 100644 --- a/example/VCU108/fpga_1g/rtl/fpga_core.v +++ b/example/VCU108/fpga_1g/rtl/fpga_core.v @@ -315,7 +315,9 @@ eth_mac_1g_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .rx_clk(phy_gmii_clk), @@ -551,31 +553,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/VCU108/fpga_1g/tb/test_fpga_core.py b/example/VCU108/fpga_1g/tb/test_fpga_core.py index 91a778681..11e9347d0 100755 --- a/example/VCU108/fpga_1g/tb/test_fpga_core.py +++ b/example/VCU108/fpga_1g/tb/test_fpga_core.py @@ -64,7 +64,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/VCU118/fpga_10g/fpga/Makefile b/example/VCU118/fpga_10g/fpga/Makefile index ffd94c3b9..e3519532f 100644 --- a/example/VCU118/fpga_10g/fpga/Makefile +++ b/example/VCU118/fpga_10g/fpga/Makefile @@ -43,8 +43,9 @@ SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_adapter.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_switch_4x4.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_switch.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_register.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v # XDC files XDC_FILES = fpga.xdc diff --git a/example/VCU118/fpga_10g/rtl/fpga_core.v b/example/VCU118/fpga_10g/rtl/fpga_core.v index ec0e84300..21bca8105 100644 --- a/example/VCU118/fpga_10g/rtl/fpga_core.v +++ b/example/VCU118/fpga_10g/rtl/fpga_core.v @@ -423,7 +423,9 @@ eth_mac_10g_fifo #( .ENABLE_DIC(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(9), - .RX_FIFO_ADDR_WIDTH(9) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(9), + .RX_FRAME_FIFO(1) ) eth_mac_10g_fifo_inst ( .rx_clk(qsfp1_rx_clk_1), @@ -495,7 +497,9 @@ eth_mac_1g_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_1g_inst ( .rx_clk(phy_gmii_clk), @@ -542,8 +546,8 @@ eth_mac_1g_inst ( ); axis_adapter #( - .INPUT_DATA_WIDTH(8), - .OUTPUT_DATA_WIDTH(64), + .S_DATA_WIDTH(8), + .M_DATA_WIDTH(64), .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), @@ -553,24 +557,24 @@ gig_rx_axis_adapter_inst ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(gig_rx_axis_tdata), - .input_axis_tkeep(1'b1), - .input_axis_tvalid(gig_rx_axis_tvalid), - .input_axis_tready(gig_rx_axis_tready), - .input_axis_tlast(gig_rx_axis_tlast), - .input_axis_tuser(gig_rx_axis_tuser), + .s_axis_tdata(gig_rx_axis_tdata), + .s_axis_tkeep(1'b1), + .s_axis_tvalid(gig_rx_axis_tvalid), + .s_axis_tready(gig_rx_axis_tready), + .s_axis_tlast(gig_rx_axis_tlast), + .s_axis_tuser(gig_rx_axis_tuser), // AXI output - .output_axis_tdata(gig_rx_axis_tdata_64), - .output_axis_tkeep(gig_rx_axis_tkeep_64), - .output_axis_tvalid(gig_rx_axis_tvalid_64), - .output_axis_tready(gig_rx_axis_tready_64), - .output_axis_tlast(gig_rx_axis_tlast_64), - .output_axis_tuser(gig_rx_axis_tuser_64) + .m_axis_tdata(gig_rx_axis_tdata_64), + .m_axis_tkeep(gig_rx_axis_tkeep_64), + .m_axis_tvalid(gig_rx_axis_tvalid_64), + .m_axis_tready(gig_rx_axis_tready_64), + .m_axis_tlast(gig_rx_axis_tlast_64), + .m_axis_tuser(gig_rx_axis_tuser_64) ); axis_adapter #( - .INPUT_DATA_WIDTH(64), - .OUTPUT_DATA_WIDTH(8), + .S_DATA_WIDTH(64), + .M_DATA_WIDTH(8), .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), @@ -580,19 +584,19 @@ gig_tx_axis_adapter_inst ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(gig_tx_axis_tdata_64), - .input_axis_tkeep(gig_tx_axis_tkeep_64), - .input_axis_tvalid(gig_tx_axis_tvalid_64), - .input_axis_tready(gig_tx_axis_tready_64), - .input_axis_tlast(gig_tx_axis_tlast_64), - .input_axis_tuser(gig_tx_axis_tuser_64), + .s_axis_tdata(gig_tx_axis_tdata_64), + .s_axis_tkeep(gig_tx_axis_tkeep_64), + .s_axis_tvalid(gig_tx_axis_tvalid_64), + .s_axis_tready(gig_tx_axis_tready_64), + .s_axis_tlast(gig_tx_axis_tlast_64), + .s_axis_tuser(gig_tx_axis_tuser_64), // AXI output - .output_axis_tdata(gig_tx_axis_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(gig_tx_axis_tvalid), - .output_axis_tready(gig_tx_axis_tready), - .output_axis_tlast(gig_tx_axis_tlast), - .output_axis_tuser(gig_tx_axis_tuser) + .m_axis_tdata(gig_tx_axis_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(gig_tx_axis_tvalid), + .m_axis_tready(gig_tx_axis_tready), + .m_axis_tlast(gig_tx_axis_tlast), + .m_axis_tuser(gig_tx_axis_tuser) ); // tap port mux logic @@ -633,25 +637,20 @@ always @* begin end end -axis_switch_4x4 #( +axis_switch #( + .S_COUNT(3), + .M_COUNT(3), .DATA_WIDTH(64), .KEEP_WIDTH(8), .ID_ENABLE(0), .DEST_WIDTH(2), .USER_ENABLE(1), .USER_WIDTH(1), - .OUT_0_BASE(0), - .OUT_0_TOP(0), - .OUT_0_CONNECT(4'b1111), - .OUT_1_BASE(1), - .OUT_1_TOP(1), - .OUT_1_CONNECT(4'b1111), - .OUT_2_BASE(2), - .OUT_2_TOP(2), - .OUT_2_CONNECT(4'b1111), - .OUT_3_BASE(3), - .OUT_3_TOP(3), - .OUT_3_CONNECT(4'b1111), + .M_BASE({32'd2, 32'd1, 32'd0}), + .M_TOP({32'd2, 32'd1, 32'd0}), + .M_CONNECT({3{3'b111}}), + .S_REG_TYPE(0), + .M_REG_TYPE(1), .ARB_TYPE("PRIORITY"), .LSB_PRIORITY("HIGH") ) @@ -659,71 +658,23 @@ axis_switch_inst ( .clk(clk), .rst(rst), // AXI inputs - .input_0_axis_tdata(mac_rx_axis_tdata), - .input_0_axis_tkeep(mac_rx_axis_tkeep), - .input_0_axis_tvalid(mac_rx_axis_tvalid), - .input_0_axis_tready(mac_rx_axis_tready), - .input_0_axis_tlast(mac_rx_axis_tlast), - .input_0_axis_tid(0), - .input_0_axis_tdest(mac_rx_tdest), - .input_0_axis_tuser(mac_rx_axis_tuser), - .input_1_axis_tdata(tx_axis_tdata), - .input_1_axis_tkeep(tx_axis_tkeep), - .input_1_axis_tvalid(tx_axis_tvalid), - .input_1_axis_tready(tx_axis_tready), - .input_1_axis_tlast(tx_axis_tlast), - .input_1_axis_tid(0), - .input_1_axis_tdest(tx_tdest), - .input_1_axis_tuser(tx_axis_tuser), - .input_2_axis_tdata(gig_rx_axis_tdata_64), - .input_2_axis_tkeep(gig_rx_axis_tkeep_64), - .input_2_axis_tvalid(gig_rx_axis_tvalid_64), - .input_2_axis_tready(gig_rx_axis_tready_64), - .input_2_axis_tlast(gig_rx_axis_tlast_64), - .input_2_axis_tid(0), - .input_2_axis_tdest(gig_rx_tdest), - .input_2_axis_tuser(gig_rx_axis_tuser_64), - .input_3_axis_tdata(64'd0), - .input_3_axis_tkeep(8'd0), - .input_3_axis_tvalid(1'b0), - .input_3_axis_tready(), - .input_3_axis_tlast(1'b0), - .input_3_axis_tid(0), - .input_3_axis_tdest(2'd0), - .input_3_axis_tuser(1'b0), + .s_axis_tdata({ gig_rx_axis_tdata_64, tx_axis_tdata, mac_rx_axis_tdata}), + .s_axis_tkeep({ gig_rx_axis_tkeep_64, tx_axis_tkeep, mac_rx_axis_tkeep}), + .s_axis_tvalid({gig_rx_axis_tvalid_64, tx_axis_tvalid, mac_rx_axis_tvalid}), + .s_axis_tready({gig_rx_axis_tready_64, tx_axis_tready, mac_rx_axis_tready}), + .s_axis_tlast({ gig_rx_axis_tlast_64, tx_axis_tlast, mac_rx_axis_tlast}), + .s_axis_tid(0), + .s_axis_tdest({ gig_rx_tdest, tx_tdest, mac_rx_tdest}), + .s_axis_tuser({ gig_rx_axis_tuser_64, tx_axis_tuser, mac_rx_axis_tuser}), // AXI outputs - .output_0_axis_tdata(mac_tx_axis_tdata), - .output_0_axis_tkeep(mac_tx_axis_tkeep), - .output_0_axis_tvalid(mac_tx_axis_tvalid), - .output_0_axis_tready(mac_tx_axis_tready), - .output_0_axis_tlast(mac_tx_axis_tlast), - .output_0_axis_tid(), - .output_0_axis_tdest(), - .output_0_axis_tuser(mac_tx_axis_tuser), - .output_1_axis_tdata(rx_axis_tdata), - .output_1_axis_tkeep(rx_axis_tkeep), - .output_1_axis_tvalid(rx_axis_tvalid), - .output_1_axis_tready(rx_axis_tready), - .output_1_axis_tlast(rx_axis_tlast), - .output_1_axis_tid(), - .output_1_axis_tdest(), - .output_1_axis_tuser(rx_axis_tuser), - .output_2_axis_tdata(gig_tx_axis_tdata_64), - .output_2_axis_tkeep(gig_tx_axis_tkeep_64), - .output_2_axis_tvalid(gig_tx_axis_tvalid_64), - .output_2_axis_tready(gig_tx_axis_tready_64), - .output_2_axis_tlast(gig_tx_axis_tlast_64), - .output_2_axis_tid(), - .output_2_axis_tdest(), - .output_2_axis_tuser(gig_tx_axis_tuser_64), - .output_3_axis_tdata(), - .output_3_axis_tkeep(), - .output_3_axis_tvalid(), - .output_3_axis_tready(1'b1), - .output_3_axis_tlast(), - .output_3_axis_tid(), - .output_3_axis_tdest(), - .output_3_axis_tuser() + .m_axis_tdata({ gig_tx_axis_tdata_64, rx_axis_tdata, mac_tx_axis_tdata}), + .m_axis_tkeep({ gig_tx_axis_tkeep_64, rx_axis_tkeep, mac_tx_axis_tkeep}), + .m_axis_tvalid({gig_tx_axis_tvalid_64, rx_axis_tvalid, mac_tx_axis_tvalid}), + .m_axis_tready({gig_tx_axis_tready_64, rx_axis_tready, mac_tx_axis_tready}), + .m_axis_tlast({ gig_tx_axis_tlast_64, rx_axis_tlast, mac_tx_axis_tlast}), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser({ gig_tx_axis_tuser_64, rx_axis_tuser, mac_tx_axis_tuser}) ); eth_axis_rx_64 @@ -927,31 +878,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(rx_fifo_udp_payload_tkeep), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(rx_fifo_udp_payload_tkeep), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(tx_fifo_udp_payload_tkeep), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(tx_fifo_udp_payload_tkeep), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/VCU118/fpga_10g/tb/test_fpga_core.py b/example/VCU118/fpga_10g/tb/test_fpga_core.py index 87f8c3db5..b692d2b32 100755 --- a/example/VCU118/fpga_10g/tb/test_fpga_core.py +++ b/example/VCU118/fpga_10g/tb/test_fpga_core.py @@ -72,8 +72,9 @@ srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_adapter.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_switch_4x4.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_switch.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_register.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs) diff --git a/example/VCU118/fpga_1g/fpga/Makefile b/example/VCU118/fpga_1g/fpga/Makefile index d97bfee7a..ce1fcc41f 100644 --- a/example/VCU118/fpga_1g/fpga/Makefile +++ b/example/VCU118/fpga_1g/fpga/Makefile @@ -38,7 +38,7 @@ SYN_FILES += lib/eth/rtl/eth_mux_2.v SYN_FILES += lib/eth/lib/axis/rtl/arbiter.v SYN_FILES += lib/eth/lib/axis/rtl/priority_encoder.v SYN_FILES += lib/eth/lib/axis/rtl/axis_fifo.v -SYN_FILES += lib/eth/lib/axis/rtl/axis_async_frame_fifo.v +SYN_FILES += lib/eth/lib/axis/rtl/axis_async_fifo.v # XDC files XDC_FILES = fpga.xdc diff --git a/example/VCU118/fpga_1g/rtl/fpga_core.v b/example/VCU118/fpga_1g/rtl/fpga_core.v index f43f65acf..a04cf559f 100644 --- a/example/VCU118/fpga_1g/rtl/fpga_core.v +++ b/example/VCU118/fpga_1g/rtl/fpga_core.v @@ -315,7 +315,9 @@ eth_mac_1g_fifo #( .ENABLE_PADDING(1), .MIN_FRAME_LENGTH(64), .TX_FIFO_ADDR_WIDTH(12), - .RX_FIFO_ADDR_WIDTH(12) + .TX_FRAME_FIFO(1), + .RX_FIFO_ADDR_WIDTH(12), + .RX_FRAME_FIFO(1) ) eth_mac_inst ( .rx_clk(phy_gmii_clk), @@ -551,31 +553,37 @@ axis_fifo #( .ID_ENABLE(0), .DEST_ENABLE(0), .USER_ENABLE(1), - .USER_WIDTH(1) + .USER_WIDTH(1), + .FRAME_FIFO(0) ) udp_payload_fifo ( .clk(clk), .rst(rst), // AXI input - .input_axis_tdata(rx_fifo_udp_payload_tdata), - .input_axis_tkeep(0), - .input_axis_tvalid(rx_fifo_udp_payload_tvalid), - .input_axis_tready(rx_fifo_udp_payload_tready), - .input_axis_tlast(rx_fifo_udp_payload_tlast), - .input_axis_tid(0), - .input_axis_tdest(0), - .input_axis_tuser(rx_fifo_udp_payload_tuser), + .s_axis_tdata(rx_fifo_udp_payload_tdata), + .s_axis_tkeep(0), + .s_axis_tvalid(rx_fifo_udp_payload_tvalid), + .s_axis_tready(rx_fifo_udp_payload_tready), + .s_axis_tlast(rx_fifo_udp_payload_tlast), + .s_axis_tid(0), + .s_axis_tdest(0), + .s_axis_tuser(rx_fifo_udp_payload_tuser), // AXI output - .output_axis_tdata(tx_fifo_udp_payload_tdata), - .output_axis_tkeep(), - .output_axis_tvalid(tx_fifo_udp_payload_tvalid), - .output_axis_tready(tx_fifo_udp_payload_tready), - .output_axis_tlast(tx_fifo_udp_payload_tlast), - .output_axis_tid(), - .output_axis_tdest(), - .output_axis_tuser(tx_fifo_udp_payload_tuser) + .m_axis_tdata(tx_fifo_udp_payload_tdata), + .m_axis_tkeep(), + .m_axis_tvalid(tx_fifo_udp_payload_tvalid), + .m_axis_tready(tx_fifo_udp_payload_tready), + .m_axis_tlast(tx_fifo_udp_payload_tlast), + .m_axis_tid(), + .m_axis_tdest(), + .m_axis_tuser(tx_fifo_udp_payload_tuser), + + // Status + .status_overflow(), + .status_bad_frame(), + .status_good_frame() ); endmodule diff --git a/example/VCU118/fpga_1g/tb/test_fpga_core.py b/example/VCU118/fpga_1g/tb/test_fpga_core.py index 91a778681..11e9347d0 100755 --- a/example/VCU118/fpga_1g/tb/test_fpga_core.py +++ b/example/VCU118/fpga_1g/tb/test_fpga_core.py @@ -64,7 +64,7 @@ srcs.append("../lib/eth/rtl/eth_mux_2.v") srcs.append("../lib/eth/lib/axis/rtl/arbiter.v") srcs.append("../lib/eth/lib/axis/rtl/priority_encoder.v") srcs.append("../lib/eth/lib/axis/rtl/axis_fifo.v") -srcs.append("../lib/eth/lib/axis/rtl/axis_async_frame_fifo.v") +srcs.append("../lib/eth/lib/axis/rtl/axis_async_fifo.v") srcs.append("%s.v" % testbench) src = ' '.join(srcs)