From 7f8bbe30de23a44ebd51dc677998a2b8298988a4 Mon Sep 17 00:00:00 2001
From: Alex Forencich <alex@alexforencich.com>
Date: Thu, 21 Apr 2022 13:15:45 -0700
Subject: [PATCH] Add application ID

Signed-off-by: Alex Forencich <alex@alexforencich.com>
---
 docs/source/modules/mqnic_app_block.rst       |  4 +++
 docs/source/modules/mqnic_core.rst            |  4 +++
 docs/source/rb/index.rst                      |  3 ++-
 fpga/app/template/rtl/mqnic_app_block.v       |  9 +++++++
 .../template/tb/mqnic_core_pcie_us/Makefile   |  3 +++
 .../test_mqnic_core_pcie_us.py                |  1 +
 fpga/common/rtl/mqnic_core.v                  | 25 ++++++++++++-------
 fpga/common/rtl/mqnic_core_axi.v              |  2 ++
 fpga/common/rtl/mqnic_core_pcie.v             |  2 ++
 fpga/common/rtl/mqnic_core_pcie_s10.v         |  2 ++
 fpga/common/rtl/mqnic_core_pcie_us.v          |  2 ++
 fpga/common/tb/mqnic.py                       | 12 +++++++++
 fpga/common/tb/mqnic_core_axi/Makefile        |  3 +++
 .../tb/mqnic_core_axi/test_mqnic_core_axi.py  |  1 +
 fpga/common/tb/mqnic_core_pcie_s10/Makefile   |  3 +++
 .../test_mqnic_core_pcie_s10.py               |  1 +
 fpga/common/tb/mqnic_core_pcie_us/Makefile    |  3 +++
 .../test_mqnic_core_pcie_us.py                |  1 +
 .../tb/mqnic_core_pcie_us_tdma/Makefile       |  3 +++
 .../test_mqnic_core_pcie_us.py                |  1 +
 .../ADM_PCIE_9V3/fpga_100g/fpga/config.tcl    |  1 +
 .../fpga_100g/fpga_tdma/config.tcl            |  1 +
 fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v  |  2 ++
 .../ADM_PCIE_9V3/fpga_100g/rtl/fpga_core.v    |  2 ++
 .../fpga_100g/tb/fpga_core/Makefile           |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 .../ADM_PCIE_9V3/fpga_25g/fpga/config.tcl     |  1 +
 .../ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl |  1 +
 .../fpga_25g/fpga_tdma/config.tcl             |  1 +
 fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v   |  2 ++
 .../ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v     |  2 ++
 .../fpga_25g/tb/fpga_core/Makefile            |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/AU200/fpga_100g/fpga/config.tcl    |  1 +
 fpga/mqnic/AU200/fpga_100g/rtl/fpga.v         |  2 ++
 fpga/mqnic/AU200/fpga_100g/rtl/fpga_core.v    |  2 ++
 .../AU200/fpga_100g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/AU200/fpga_25g/fpga/config.tcl     |  1 +
 fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl |  1 +
 fpga/mqnic/AU200/fpga_25g/rtl/fpga.v          |  2 ++
 fpga/mqnic/AU200/fpga_25g/rtl/fpga_core.v     |  2 ++
 .../AU200/fpga_25g/tb/fpga_core/Makefile      |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/AU250/fpga_100g/fpga/config.tcl    |  1 +
 fpga/mqnic/AU250/fpga_100g/rtl/fpga.v         |  2 ++
 fpga/mqnic/AU250/fpga_100g/rtl/fpga_core.v    |  2 ++
 .../AU250/fpga_100g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/AU250/fpga_25g/fpga/config.tcl     |  1 +
 fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl |  1 +
 fpga/mqnic/AU250/fpga_25g/rtl/fpga.v          |  2 ++
 fpga/mqnic/AU250/fpga_25g/rtl/fpga_core.v     |  2 ++
 .../AU250/fpga_25g/tb/fpga_core/Makefile      |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/AU280/fpga_100g/fpga/config.tcl    |  1 +
 fpga/mqnic/AU280/fpga_100g/rtl/fpga.v         |  2 ++
 fpga/mqnic/AU280/fpga_100g/rtl/fpga_core.v    |  2 ++
 .../AU280/fpga_100g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/AU280/fpga_25g/fpga/config.tcl     |  1 +
 fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl |  1 +
 fpga/mqnic/AU280/fpga_25g/rtl/fpga.v          |  2 ++
 fpga/mqnic/AU280/fpga_25g/rtl/fpga_core.v     |  2 ++
 .../AU280/fpga_25g/tb/fpga_core/Makefile      |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/AU50/fpga_100g/fpga/config.tcl     |  1 +
 fpga/mqnic/AU50/fpga_100g/rtl/fpga.v          |  2 ++
 fpga/mqnic/AU50/fpga_100g/rtl/fpga_core.v     |  2 ++
 .../AU50/fpga_100g/tb/fpga_core/Makefile      |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/AU50/fpga_25g/fpga/config.tcl      |  1 +
 fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl  |  1 +
 fpga/mqnic/AU50/fpga_25g/rtl/fpga.v           |  2 ++
 fpga/mqnic/AU50/fpga_25g/rtl/fpga_core.v      |  2 ++
 .../mqnic/AU50/fpga_25g/tb/fpga_core/Makefile |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 .../fpga/fpga_ku040/config.tcl                |  1 +
 .../fpga/fpga_ku060/config.tcl                |  1 +
 .../DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v    |  2 ++
 .../fpga/rtl/fpga_core.v                      |  2 ++
 .../fpga/tb/fpga_core/Makefile                |  3 +++
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 fpga/mqnic/ExaNIC_X10/fpga/fpga/config.tcl    |  1 +
 fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v         |  2 ++
 fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v    |  2 ++
 .../ExaNIC_X10/fpga/tb/fpga_core/Makefile     |  3 +++
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 .../mqnic/ExaNIC_X25/fpga_25g/fpga/config.tcl |  1 +
 .../ExaNIC_X25/fpga_25g/fpga_10g/config.tcl   |  1 +
 fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga.v     |  2 ++
 .../mqnic/ExaNIC_X25/fpga_25g/rtl/fpga_core.v |  2 ++
 .../ExaNIC_X25/fpga_25g/tb/fpga_core/Makefile |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl  |  1 +
 fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v       |  2 ++
 fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v  |  2 ++
 .../NetFPGA_SUME/fpga/tb/fpga_core/Makefile   |  3 +++
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 .../S10MX_DK/fpga_10g/fpga_1sm21b/config.tcl  |  1 +
 .../S10MX_DK/fpga_10g/fpga_1sm21c/config.tcl  |  1 +
 fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga.v       |  2 ++
 fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga_core.v  |  2 ++
 .../S10MX_DK/fpga_10g/tb/fpga_core/Makefile   |  3 +++
 .../fpga_10g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/VCU108/fpga_10g/fpga/config.tcl    |  1 +
 fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v         |  2 ++
 fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v    |  2 ++
 .../VCU108/fpga_10g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_10g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl   |  1 +
 fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v        |  2 ++
 fpga/mqnic/VCU118/fpga_100g/rtl/fpga_core.v   |  2 ++
 .../VCU118/fpga_100g/tb/fpga_core/Makefile    |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl    |  1 +
 .../mqnic/VCU118/fpga_25g/fpga_10g/config.tcl |  1 +
 fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v         |  2 ++
 fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v    |  2 ++
 .../VCU118/fpga_25g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl  |  1 +
 fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v       |  2 ++
 fpga/mqnic/VCU1525/fpga_100g/rtl/fpga_core.v  |  2 ++
 .../VCU1525/fpga_100g/tb/fpga_core/Makefile   |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl   |  1 +
 .../VCU1525/fpga_25g/fpga_10g/config.tcl      |  1 +
 fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v        |  2 ++
 fpga/mqnic/VCU1525/fpga_25g/rtl/fpga_core.v   |  2 ++
 .../VCU1525/fpga_25g/tb/fpga_core/Makefile    |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl   |  1 +
 fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga.v        |  2 ++
 fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga_core.v   |  2 ++
 .../XUPP3R/fpga_100g/tb/fpga_core/Makefile    |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl    |  1 +
 .../mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl |  1 +
 fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga.v         |  2 ++
 fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v    |  2 ++
 .../XUPP3R/fpga_25g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl   |  1 +
 fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v        |  2 ++
 fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v   |  2 ++
 .../ZCU106/fpga_pcie/tb/fpga_core/Makefile    |  3 +++
 .../fpga_pcie/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl |  1 +
 fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v      |  2 ++
 fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v |  2 ++
 .../ZCU106/fpga_zynqmp/tb/fpga_core/Makefile  |  3 +++
 .../tb/fpga_core/test_fpga_core.py            |  1 +
 fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl    |  1 +
 .../fb2CG/fpga_100g/fpga_tdma/config.tcl      |  1 +
 fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v         |  2 ++
 fpga/mqnic/fb2CG/fpga_100g/rtl/fpga_core.v    |  2 ++
 .../fb2CG/fpga_100g/tb/fpga_core/Makefile     |  3 +++
 .../fpga_100g/tb/fpga_core/test_fpga_core.py  |  1 +
 fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl     |  1 +
 fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl |  1 +
 .../mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl |  1 +
 fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v          |  2 ++
 fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v     |  2 ++
 .../fb2CG/fpga_25g/tb/fpga_core/Makefile      |  3 +++
 .../fpga_25g/tb/fpga_core/test_fpga_core.py   |  1 +
 lib/mqnic/mqnic.c                             |  9 +++++++
 lib/mqnic/mqnic.h                             |  2 ++
 modules/mqnic/mqnic.h                         |  2 ++
 modules/mqnic/mqnic_hw.h                      |  4 +++
 modules/mqnic/mqnic_main.c                    |  7 ++++++
 171 files changed, 349 insertions(+), 10 deletions(-)

diff --git a/docs/source/modules/mqnic_app_block.rst b/docs/source/modules/mqnic_app_block.rst
index 379d542e4..b2b94b0dd 100644
--- a/docs/source/modules/mqnic_app_block.rst
+++ b/docs/source/modules/mqnic_app_block.rst
@@ -122,6 +122,10 @@ Parameters
 
     Enable PTP timestamping, default ``1``.
 
+.. object:: APP_ID
+
+    Application ID, default ``0``.
+
 .. object:: APP_CTRL_ENABLE
 
     Enable application section control connection to core NIC registers, default ``1``.
diff --git a/docs/source/modules/mqnic_core.rst b/docs/source/modules/mqnic_core.rst
index f21a170f5..693f3f400 100644
--- a/docs/source/modules/mqnic_core.rst
+++ b/docs/source/modules/mqnic_core.rst
@@ -253,6 +253,10 @@ Parameters
 
     Receive scratchpad RAM size per interface, default ``32768``.
 
+.. object:: APP_ID
+
+    Application ID, default ``0``.
+
 .. object:: APP_ENABLE
 
     Enable application section, default ``0``.
diff --git a/docs/source/rb/index.rst b/docs/source/rb/index.rst
index 046d5c413..162d71930 100644
--- a/docs/source/rb/index.rst
+++ b/docs/source/rb/index.rst
@@ -66,7 +66,8 @@ The NIC register space is constructed from a linked list of register blocks.  Ea
     0x0000C001  0x00000300  :ref:`rb_if_ctrl`
     0x0000C002  0x00000200  port
     0x0000C003  0x00000100  :ref:`rb_sched_block`
-    0x0000C004  0x00000100  stats
+    0x0000C004  0x00000200  application
+    0x0000C005  0x00000100  stats
     0x0000C010  0x00000100  :ref:`rb_cqm_event`
     0x0000C020  0x00000100  :ref:`rb_qm_tx`
     0x0000C021  0x00000100  :ref:`rb_qm_rx`
diff --git a/fpga/app/template/rtl/mqnic_app_block.v b/fpga/app/template/rtl/mqnic_app_block.v
index 271e02960..bfe981d8e 100644
--- a/fpga/app/template/rtl/mqnic_app_block.v
+++ b/fpga/app/template/rtl/mqnic_app_block.v
@@ -64,6 +64,7 @@ module mqnic_app_block #
     parameter PTP_TS_ENABLE = 1,
 
     // Application configuration
+    parameter APP_ID = 32'h12340001,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
     parameter APP_AXIS_DIRECT_ENABLE = 1,
@@ -458,6 +459,14 @@ module mqnic_app_block #
     input  wire                                           jtag_tck
 );
 
+// check configuration
+initial begin
+    if (APP_ID != 32'h12340001) begin
+        $error("Error: Invalid APP_ID (expected 32'h12340001, got 32'h%x) (instance %m)", APP_ID);
+        $finish;
+    end
+end
+
 /*
  * AXI-Lite slave interface (control from host)
  */
diff --git a/fpga/app/template/tb/mqnic_core_pcie_us/Makefile b/fpga/app/template/tb/mqnic_core_pcie_us/Makefile
index 419ce52e7..88809e51b 100644
--- a/fpga/app/template/tb/mqnic_core_pcie_us/Makefile
+++ b/fpga/app/template/tb/mqnic_core_pcie_us/Makefile
@@ -183,6 +183,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#12340001)) )
 export PARAM_APP_ENABLE ?= 1
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -283,6 +284,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -375,6 +377,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py b/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
index c06157993..99609ae40 100644
--- a/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
+++ b/fpga/app/template/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
@@ -736,6 +736,7 @@ def test_mqnic_core_pcie_us(request, if_count, ports_per_if, axis_pcie_data_widt
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x12340001
     parameters['APP_ENABLE'] = 1
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/common/rtl/mqnic_core.v b/fpga/common/rtl/mqnic_core.v
index eaff89d5e..d998f3490 100644
--- a/fpga/common/rtl/mqnic_core.v
+++ b/fpga/common/rtl/mqnic_core.v
@@ -118,6 +118,7 @@ module mqnic_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -596,19 +597,24 @@ always @(posedge clk) begin
             // Interface
             8'h40: ctrl_reg_rd_data_reg <= 32'h0000C000;  // Interface: Type
             8'h44: ctrl_reg_rd_data_reg <= 32'h00000100;  // Interface: Version
-            8'h48: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h60 : PHC_RB_BASE_ADDR;  // Interface: Next header
+            8'h48: ctrl_reg_rd_data_reg <= 32'h60;        // Interface: Next header
             8'h4C: ctrl_reg_rd_data_reg <= 32'h0;         // Interface: Offset
             8'h50: ctrl_reg_rd_data_reg <= IF_COUNT;      // Interface: Count
             8'h54: ctrl_reg_rd_data_reg <= 2**AXIL_IF_CTRL_ADDR_WIDTH;  // Interface: Stride
-            8'h58: ctrl_reg_rd_data_reg <= 2**AXIL_CSR_ADDR_WIDTH;  // Interface: CSR offset
+            8'h58: ctrl_reg_rd_data_reg <= 2**AXIL_CSR_ADDR_WIDTH;      // Interface: CSR offset
+            // App info
+            8'h60: ctrl_reg_rd_data_reg <= APP_ENABLE ? 32'h0000C004 : 0;  // App info: Type
+            8'h64: ctrl_reg_rd_data_reg <= APP_ENABLE ? 32'h00000200 : 0;  // App info: Version
+            8'h68: ctrl_reg_rd_data_reg <= 32'h80;                         // App info: Next header
+            8'h6C: ctrl_reg_rd_data_reg <= APP_ENABLE ? APP_ID : 0;        // App info: ID
             // Stats
-            8'h60: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h0000C004 : 0;  // Stats: Type
-            8'h64: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h00000100 : 0;  // Stats: Version
-            8'h68: ctrl_reg_rd_data_reg <= STAT_ENABLE ? PHC_RB_BASE_ADDR : 0;  // Stats: Next header
-            8'h6C: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 2**16 : 0;         // Stats: Offset
-            8'h70: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 2**STAT_ID_WIDTH : 0;  // Stats: Count
-            8'h74: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 8 : 0;             // Stats: Stride
-            8'h78: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h00000000 : 0;  // Stats: Flags
+            8'h80: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h0000C005 : 0;      // Stats: Type
+            8'h84: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h00000100 : 0;      // Stats: Version
+            8'h88: ctrl_reg_rd_data_reg <= PHC_RB_BASE_ADDR;                    // Stats: Next header
+            8'h8C: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 2**16 : 0;             // Stats: Offset
+            8'h90: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 2**STAT_ID_WIDTH : 0;  // Stats: Count
+            8'h94: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 8 : 0;                 // Stats: Stride
+            8'h98: ctrl_reg_rd_data_reg <= STAT_ENABLE ? 32'h00000000 : 0;      // Stats: Flags
             default: ctrl_reg_rd_ack_reg <= 1'b0;
         endcase
     end
@@ -3588,6 +3594,7 @@ if (APP_ENABLE) begin : app
         .PTP_TS_ENABLE(PTP_TS_ENABLE),
 
         // Application configuration
+        .APP_ID(APP_ID),
         .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
         .APP_DMA_ENABLE(APP_DMA_ENABLE),
         .APP_AXIS_DIRECT_ENABLE(APP_AXIS_DIRECT_ENABLE),
diff --git a/fpga/common/rtl/mqnic_core_axi.v b/fpga/common/rtl/mqnic_core_axi.v
index cbc5e387b..f4811f341 100644
--- a/fpga/common/rtl/mqnic_core_axi.v
+++ b/fpga/common/rtl/mqnic_core_axi.v
@@ -118,6 +118,7 @@ module mqnic_core_axi #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -645,6 +646,7 @@ mqnic_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/common/rtl/mqnic_core_pcie.v b/fpga/common/rtl/mqnic_core_pcie.v
index 396deed18..069274fde 100644
--- a/fpga/common/rtl/mqnic_core_pcie.v
+++ b/fpga/common/rtl/mqnic_core_pcie.v
@@ -118,6 +118,7 @@ module mqnic_core_pcie #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1399,6 +1400,7 @@ mqnic_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/common/rtl/mqnic_core_pcie_s10.v b/fpga/common/rtl/mqnic_core_pcie_s10.v
index 8800268f1..ee4cb821e 100644
--- a/fpga/common/rtl/mqnic_core_pcie_s10.v
+++ b/fpga/common/rtl/mqnic_core_pcie_s10.v
@@ -118,6 +118,7 @@ module mqnic_core_pcie_s10 #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -663,6 +664,7 @@ mqnic_core_pcie #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/common/rtl/mqnic_core_pcie_us.v b/fpga/common/rtl/mqnic_core_pcie_us.v
index 3ed94f40a..39aa169b1 100644
--- a/fpga/common/rtl/mqnic_core_pcie_us.v
+++ b/fpga/common/rtl/mqnic_core_pcie_us.v
@@ -118,6 +118,7 @@ module mqnic_core_pcie_us #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -753,6 +754,7 @@ mqnic_core_pcie #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/common/tb/mqnic.py b/fpga/common/tb/mqnic.py
index 7c031af33..87de3a17f 100644
--- a/fpga/common/tb/mqnic.py
+++ b/fpga/common/tb/mqnic.py
@@ -241,6 +241,10 @@ MQNIC_RB_TDMA_SCH_REG_ACTIVE_PERIOD_NS     = 0x54
 MQNIC_RB_TDMA_SCH_REG_ACTIVE_PERIOD_SEC_L  = 0x58
 MQNIC_RB_TDMA_SCH_REG_ACTIVE_PERIOD_SEC_H  = 0x5C
 
+MQNIC_RB_APP_INFO_TYPE    = 0x0000C004
+MQNIC_RB_APP_INFO_VER     = 0x00000200
+MQNIC_RB_APP_INFO_REG_ID  = 0x0C
+
 MQNIC_QUEUE_BASE_ADDR_REG       = 0x00
 MQNIC_QUEUE_ACTIVE_LOG_SIZE_REG = 0x08
 MQNIC_QUEUE_CPL_QUEUE_INDEX_REG = 0x0C
@@ -1300,6 +1304,8 @@ class Driver:
         self.git_hash = None
         self.rel_info = None
 
+        self.app_id = None
+
         self.if_offset = None
         self.if_count = None
         self.if_stride = None
@@ -1384,6 +1390,12 @@ class Driver:
         self.rel_info = await self.fw_id_rb.read_dword(MQNIC_RB_FW_ID_REG_REL_INFO)
         self.log.info("Release info: %d", self.rel_info)
 
+        rb = self.reg_blocks.find(MQNIC_RB_APP_INFO_TYPE, MQNIC_RB_APP_INFO_VER)
+
+        if rb:
+            self.app_id = await rb.read_dword(MQNIC_RB_APP_INFO_REG_ID)
+            self.log.info("Application ID: 0x%08x", self.app_id)
+
         self.phc_rb = self.reg_blocks.find(MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER)
 
         # Enumerate interfaces
diff --git a/fpga/common/tb/mqnic_core_axi/Makefile b/fpga/common/tb/mqnic_core_axi/Makefile
index c8e929c0e..e38df27cf 100644
--- a/fpga/common/tb/mqnic_core_axi/Makefile
+++ b/fpga/common/tb/mqnic_core_axi/Makefile
@@ -169,6 +169,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -269,6 +270,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -359,6 +361,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py b/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py
index 483714385..07c58df0a 100644
--- a/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py
+++ b/fpga/common/tb/mqnic_core_axi/test_mqnic_core_axi.py
@@ -527,6 +527,7 @@ def test_mqnic_core_pcie_axi(request, if_count, ports_per_if, axi_data_width,
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/common/tb/mqnic_core_pcie_s10/Makefile b/fpga/common/tb/mqnic_core_pcie_s10/Makefile
index 4b0fa1751..11f3438cc 100644
--- a/fpga/common/tb/mqnic_core_pcie_s10/Makefile
+++ b/fpga/common/tb/mqnic_core_pcie_s10/Makefile
@@ -179,6 +179,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -284,6 +285,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -381,6 +383,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py b/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py
index 6ef597242..8b7696000 100644
--- a/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py
+++ b/fpga/common/tb/mqnic_core_pcie_s10/test_mqnic_core_pcie_s10.py
@@ -651,6 +651,7 @@ def test_mqnic_core_pcie_s10(request, if_count, ports_per_if, pcie_data_width,
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/common/tb/mqnic_core_pcie_us/Makefile b/fpga/common/tb/mqnic_core_pcie_us/Makefile
index b280aeece..210f2648b 100644
--- a/fpga/common/tb/mqnic_core_pcie_us/Makefile
+++ b/fpga/common/tb/mqnic_core_pcie_us/Makefile
@@ -181,6 +181,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -373,6 +375,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py b/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
index 9e9c74c9f..6f33e0e89 100644
--- a/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
+++ b/fpga/common/tb/mqnic_core_pcie_us/test_mqnic_core_pcie_us.py
@@ -728,6 +728,7 @@ def test_mqnic_core_pcie_us(request, if_count, ports_per_if, axis_pcie_data_widt
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile b/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile
index 7b0c12922..b8eaad7b1 100644
--- a/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile
+++ b/fpga/common/tb/mqnic_core_pcie_us_tdma/Makefile
@@ -183,6 +183,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -283,6 +284,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -375,6 +377,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py b/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py
index 9ed101a54..1a0be2aff 100644
--- a/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py
+++ b/fpga/common/tb/mqnic_core_pcie_us_tdma/test_mqnic_core_pcie_us.py
@@ -783,6 +783,7 @@ def test_mqnic_core_pcie_us(request, if_count, ports_per_if, axis_pcie_data_widt
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga/config.tcl b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga/config.tcl
index 942d91c95..13fb3b4e0 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga_tdma/config.tcl b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga_tdma/config.tcl
index f02695fca..ecf46730c 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga_tdma/config.tcl
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/fpga_tdma/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v
index af3b8130a..f0795ec27 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1744,6 +1745,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga_core.v
index 5ccd51f9b..1eff69d1d 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -875,6 +876,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/Makefile
index 3084ee424..17679d545 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/test_fpga_core.py
index e4d2e4de8..8dd22d3db 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -666,6 +666,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga/config.tcl b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga/config.tcl
index 8ba27d3a9..6680566f5 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl
index c657687f5..f296fd084 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_tdma/config.tcl b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_tdma/config.tcl
index eae3ce267..d342a834e 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_tdma/config.tcl
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/fpga_tdma/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v
index 94a59e9d8..802925dc9 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1406,6 +1407,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v
index b231efa37..dd18717cc 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1117,6 +1118,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/Makefile
index 7e13f6437..adc49db3a 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py
index 4334c067e..aae97c531 100644
--- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -725,6 +725,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU200/fpga_100g/fpga/config.tcl b/fpga/mqnic/AU200/fpga_100g/fpga/config.tcl
index 996b5c727..a0e279ae6 100644
--- a/fpga/mqnic/AU200/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/AU200/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v
index 12f5dbde1..54011f7f8 100644
--- a/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/AU200/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1878,6 +1879,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU200/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/AU200/fpga_100g/rtl/fpga_core.v
index 9b3e85ddc..3f92b8341 100644
--- a/fpga/mqnic/AU200/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU200/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -883,6 +884,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/Makefile
index 35297458d..a050cea0e 100644
--- a/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/test_fpga_core.py
index 93880f907..f75309a54 100644
--- a/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU200/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -666,6 +666,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU200/fpga_25g/fpga/config.tcl b/fpga/mqnic/AU200/fpga_25g/fpga/config.tcl
index 535a18a79..8b066140c 100644
--- a/fpga/mqnic/AU200/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/AU200/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl
index bcf6233d5..b95a354d2 100644
--- a/fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/AU200/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU200/fpga_25g/rtl/fpga.v b/fpga/mqnic/AU200/fpga_25g/rtl/fpga.v
index 5757852b4..ad25bfe50 100644
--- a/fpga/mqnic/AU200/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/AU200/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1539,6 +1540,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU200/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/AU200/fpga_25g/rtl/fpga_core.v
index 37b0f29bd..337b58996 100644
--- a/fpga/mqnic/AU200/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU200/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1126,6 +1127,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/Makefile
index aaba9db9d..b28ec4948 100644
--- a/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/test_fpga_core.py
index 622f08851..2bcfed2d5 100644
--- a/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU200/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -725,6 +725,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU250/fpga_100g/fpga/config.tcl b/fpga/mqnic/AU250/fpga_100g/fpga/config.tcl
index e3df037dd..d9b7ef9a8 100644
--- a/fpga/mqnic/AU250/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/AU250/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v
index 4377d44eb..20ac15acb 100644
--- a/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/AU250/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1878,6 +1879,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU250/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/AU250/fpga_100g/rtl/fpga_core.v
index 07c854c8f..b25b393f6 100644
--- a/fpga/mqnic/AU250/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU250/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -883,6 +884,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/Makefile
index 35297458d..a050cea0e 100644
--- a/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/test_fpga_core.py
index 93880f907..f75309a54 100644
--- a/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU250/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -666,6 +666,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU250/fpga_25g/fpga/config.tcl b/fpga/mqnic/AU250/fpga_25g/fpga/config.tcl
index 82fbfc911..7157a0fd0 100644
--- a/fpga/mqnic/AU250/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/AU250/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl
index 20a1321bd..fbb2a9b21 100644
--- a/fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/AU250/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU250/fpga_25g/rtl/fpga.v b/fpga/mqnic/AU250/fpga_25g/rtl/fpga.v
index eb3f7a8be..c41e87b7c 100644
--- a/fpga/mqnic/AU250/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/AU250/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1539,6 +1540,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU250/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/AU250/fpga_25g/rtl/fpga_core.v
index a9b374e7c..74b1a11af 100644
--- a/fpga/mqnic/AU250/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU250/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1126,6 +1127,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/Makefile
index aaba9db9d..b28ec4948 100644
--- a/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/test_fpga_core.py
index 622f08851..2bcfed2d5 100644
--- a/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU250/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -725,6 +725,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU280/fpga_100g/fpga/config.tcl b/fpga/mqnic/AU280/fpga_100g/fpga/config.tcl
index 240780803..f4f292267 100644
--- a/fpga/mqnic/AU280/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/AU280/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v
index 3964eb22b..b24874f1b 100644
--- a/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/AU280/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1775,6 +1776,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU280/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/AU280/fpga_100g/rtl/fpga_core.v
index 75d824c19..c882866ce 100644
--- a/fpga/mqnic/AU280/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU280/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -759,6 +760,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/Makefile
index f7812030b..9ead163c3 100644
--- a/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/test_fpga_core.py
index 1a13096d6..03396e688 100644
--- a/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU280/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -655,6 +655,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU280/fpga_25g/fpga/config.tcl b/fpga/mqnic/AU280/fpga_25g/fpga/config.tcl
index ba41f7c3f..c067f9919 100644
--- a/fpga/mqnic/AU280/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/AU280/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl
index 53d0ca44f..074425a38 100644
--- a/fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/AU280/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU280/fpga_25g/rtl/fpga.v b/fpga/mqnic/AU280/fpga_25g/rtl/fpga.v
index 5d0dce4a5..791b34195 100644
--- a/fpga/mqnic/AU280/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/AU280/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1444,6 +1445,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU280/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/AU280/fpga_25g/rtl/fpga_core.v
index d7e853c87..13d2f8b41 100644
--- a/fpga/mqnic/AU280/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU280/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1002,6 +1003,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/Makefile
index 0d17427b2..baac1b5e1 100644
--- a/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/test_fpga_core.py
index f7c9beecb..7805994b8 100644
--- a/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU280/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -714,6 +714,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU50/fpga_100g/fpga/config.tcl b/fpga/mqnic/AU50/fpga_100g/fpga/config.tcl
index 3473441b2..bed8c60dc 100644
--- a/fpga/mqnic/AU50/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/AU50/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v b/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v
index b68406a29..80150f2d5 100644
--- a/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/AU50/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1377,6 +1378,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU50/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/AU50/fpga_100g/rtl/fpga_core.v
index d29292044..88e8dfb9a 100644
--- a/fpga/mqnic/AU50/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU50/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -751,6 +752,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/Makefile
index 8d50570f7..79b42f997 100644
--- a/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/test_fpga_core.py
index 596a76e33..a9e09d14f 100644
--- a/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU50/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -616,6 +616,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/AU50/fpga_25g/fpga/config.tcl b/fpga/mqnic/AU50/fpga_25g/fpga/config.tcl
index 0fd4449b3..a888655c3 100644
--- a/fpga/mqnic/AU50/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/AU50/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl
index 1ad96409d..9c646f0ce 100644
--- a/fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/AU50/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/AU50/fpga_25g/rtl/fpga.v b/fpga/mqnic/AU50/fpga_25g/rtl/fpga.v
index 9e449e090..7b77ad898 100644
--- a/fpga/mqnic/AU50/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/AU50/fpga_25g/rtl/fpga.v
@@ -111,6 +111,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1212,6 +1213,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU50/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/AU50/fpga_25g/rtl/fpga_core.v
index 7d87521ce..d64f55214 100644
--- a/fpga/mqnic/AU50/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/AU50/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -923,6 +924,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/Makefile
index 3f020f0f1..065764139 100644
--- a/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/test_fpga_core.py
index b78ddfda2..ae2936441 100644
--- a/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/AU50/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -639,6 +639,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku040/config.tcl b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku040/config.tcl
index 2080661cf..2e672b17d 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku040/config.tcl
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku040/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku060/config.tcl b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku060/config.tcl
index 35947716e..c52e2e5ab 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku060/config.tcl
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/fpga_ku060/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v
index faf23be3e..db5c75a86 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1398,6 +1399,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v
index ea8a08cd7..2d0ab5bfb 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1148,6 +1149,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/Makefile b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/Makefile
index a7d5d30ca..3ac4eba50 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/Makefile
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/test_fpga_core.py
index 6938b2e0f..e88f7e38f 100644
--- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/tb/fpga_core/test_fpga_core.py
@@ -709,6 +709,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ExaNIC_X10/fpga/fpga/config.tcl b/fpga/mqnic/ExaNIC_X10/fpga/fpga/config.tcl
index c7c32bf22..e2c1705cc 100644
--- a/fpga/mqnic/ExaNIC_X10/fpga/fpga/config.tcl
+++ b/fpga/mqnic/ExaNIC_X10/fpga/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v
index b2ac00d7f..efb3ce92e 100644
--- a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v
+++ b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1086,6 +1087,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v
index 1a6ed4310..63470b80d 100644
--- a/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v
+++ b/fpga/mqnic/ExaNIC_X10/fpga/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -940,6 +941,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/Makefile b/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/Makefile
index a7d5d30ca..3ac4eba50 100644
--- a/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py
index 22b861bed..f505b15bd 100644
--- a/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ExaNIC_X10/fpga/tb/fpga_core/test_fpga_core.py
@@ -627,6 +627,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga/config.tcl b/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga/config.tcl
index e6c1cc5c0..3e51af105 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga_10g/config.tcl
index dad5724e0..04a621803 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga.v b/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga.v
index 6b008f8f0..6cdf0b8a1 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1115,6 +1116,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga_core.v
index a0057c8f2..345120478 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1017,6 +1018,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/Makefile
index 3f34ad64c..be61c41ea 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/test_fpga_core.py
index a6a13cfb7..5d4dc9add 100644
--- a/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ExaNIC_X25/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -636,6 +636,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl b/fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl
index fc07b6ef2..4c064c2ba 100644
--- a/fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl
+++ b/fpga/mqnic/NetFPGA_SUME/fpga/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v
index bd97ae18a..d11fe2e7e 100644
--- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v
+++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1371,6 +1372,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v
index cd58faf73..2e71d7c59 100644
--- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v
+++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -781,6 +782,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/Makefile b/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
index d3e8fc038..a0530acad 100644
--- a/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
+++ b/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
@@ -191,6 +191,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -286,6 +287,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -373,6 +375,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
index 863cd42ff..040bbbd4d 100644
--- a/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
@@ -636,6 +636,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21b/config.tcl b/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21b/config.tcl
index 5690eef0d..95252a0c2 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21b/config.tcl
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21b/config.tcl
@@ -135,6 +135,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21c/config.tcl b/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21c/config.tcl
index 272440c01..a105643cc 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21c/config.tcl
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/fpga_1sm21c/config.tcl
@@ -135,6 +135,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga.v b/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga.v
index 19481da08..1b1952b0e 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga.v
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -907,6 +908,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga_core.v b/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga_core.v
index ba5ccd54d..5c3409efc 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga_core.v
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -860,6 +861,7 @@ mqnic_core_pcie_s10 #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/Makefile b/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/Makefile
index 7f060e158..9323c5b84 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/Makefile
@@ -189,6 +189,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -377,6 +379,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/test_fpga_core.py
index aeab24d25..d8b6cb96f 100644
--- a/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/S10MX_DK/fpga_10g/tb/fpga_core/test_fpga_core.py
@@ -631,6 +631,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/VCU108/fpga_10g/fpga/config.tcl b/fpga/mqnic/VCU108/fpga_10g/fpga/config.tcl
index 996c3dfb9..db5e671fb 100644
--- a/fpga/mqnic/VCU108/fpga_10g/fpga/config.tcl
+++ b/fpga/mqnic/VCU108/fpga_10g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v
index f884b55af..e1950357b 100644
--- a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v
+++ b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1178,6 +1179,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v
index e850585b8..19c7fefce 100644
--- a/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v
+++ b/fpga/mqnic/VCU108/fpga_10g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -966,6 +967,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/Makefile b/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/Makefile
index 01ecc098c..670d6620a 100644
--- a/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py
index 559a188d3..4f2f25191 100644
--- a/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/VCU108/fpga_10g/tb/fpga_core/test_fpga_core.py
@@ -646,6 +646,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl b/fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl
index 0219a7c4f..2eab9061c 100644
--- a/fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/VCU118/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v
index 3ce908aaf..3f8638327 100644
--- a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1734,6 +1735,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga_core.v
index db82780ea..c831dd43b 100644
--- a/fpga/mqnic/VCU118/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/VCU118/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -851,6 +852,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/Makefile
index 08a7687d9..e5dc3e054 100644
--- a/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/test_fpga_core.py
index d0b630540..4f65b773d 100644
--- a/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/VCU118/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -670,6 +670,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl b/fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl
index 4d1570df3..d4e2ce810 100644
--- a/fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/VCU118/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU118/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/VCU118/fpga_25g/fpga_10g/config.tcl
index c39c06631..18566d5c8 100644
--- a/fpga/mqnic/VCU118/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/VCU118/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v
index ed5b812bf..082d45977 100644
--- a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1392,6 +1393,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v
index 4dd816a62..96fc58be0 100644
--- a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1094,6 +1095,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/Makefile
index 714ab4dc6..9ec70b7c7 100644
--- a/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/test_fpga_core.py
index ea820860c..19b2844df 100644
--- a/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/VCU118/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -729,6 +729,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl b/fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl
index a906fd868..fb40d0a8d 100644
--- a/fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/VCU1525/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v
index ce481e13a..7ee3e10e7 100644
--- a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1723,6 +1724,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga_core.v
index faf2c8b34..e4cb380a0 100644
--- a/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/VCU1525/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -806,6 +807,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/Makefile
index 35297458d..a050cea0e 100644
--- a/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/test_fpga_core.py
index 12436496d..f5eb07d0b 100644
--- a/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/VCU1525/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -664,6 +664,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl b/fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl
index c43c48a15..0f89c29c2 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/VCU1525/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU1525/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/VCU1525/fpga_25g/fpga_10g/config.tcl
index cf87e75f9..feef1ca8c 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/VCU1525/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v b/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v
index c24265f1f..fba849d3b 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1384,6 +1385,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga_core.v
index 5e37bb699..0858bb70d 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/VCU1525/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1049,6 +1050,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/Makefile
index aaba9db9d..b28ec4948 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/test_fpga_core.py
index 99c41c7ce..11833def9 100644
--- a/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/VCU1525/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -723,6 +723,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl b/fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl
index a4e023803..d1756aff0 100644
--- a/fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/XUPP3R/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga.v b/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga.v
index 13181df44..3d58d5b1b 100644
--- a/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -2589,6 +2590,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga_core.v
index bc56f5cd0..12e4416b3 100644
--- a/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/XUPP3R/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1058,6 +1059,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/Makefile
index 1a8a86527..ab6553a1d 100644
--- a/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/Makefile
@@ -185,6 +185,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -281,6 +282,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -369,6 +371,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/test_fpga_core.py
index 7bf81ff2c..4401169c9 100644
--- a/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/XUPP3R/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -732,6 +732,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl b/fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl
index 683fd625e..45052fc83 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/XUPP3R/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl
index 891eb8886..b4f10de1d 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/XUPP3R/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga.v
index bb746e145..1234c7a20 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1903,6 +1904,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v
index aa3898fca..c502064a0 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1444,6 +1445,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/Makefile
index 143865d5c..eaf72193e 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/test_fpga_core.py
index a3662da56..8cda92ad8 100644
--- a/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/XUPP3R/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -863,6 +863,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl b/fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl
index 9e06b719d..463c1350a 100644
--- a/fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl
+++ b/fpga/mqnic/ZCU106/fpga_pcie/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
  
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v
index 03508de08..e164272e4 100644
--- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v
+++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -895,6 +896,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v
index c8d5bd349..c58f61c93 100644
--- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v
+++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -827,6 +828,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile
index a65b7fce7..cdb9fc509 100644
--- a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/Makefile
@@ -192,6 +192,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -287,6 +288,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -374,6 +376,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py
index 39528d6c2..e351f76cc 100644
--- a/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ZCU106/fpga_pcie/tb/fpga_core/test_fpga_core.py
@@ -630,6 +630,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl b/fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl
index 5d140cae7..fb191d4bd 100644
--- a/fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl
+++ b/fpga/mqnic/ZCU106/fpga_zynqmp/fpga/config.tcl
@@ -128,6 +128,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v
index 17e1bc53e..f1be89040 100644
--- a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v
+++ b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -754,6 +755,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v
index 411017d39..ca4c7b200 100644
--- a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v
+++ b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -785,6 +786,7 @@ mqnic_core_axi #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/Makefile b/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/Makefile
index 21c78d1b5..1debd617a 100644
--- a/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/Makefile
+++ b/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/Makefile
@@ -177,6 +177,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -265,6 +266,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -345,6 +347,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/test_fpga_core.py
index ccf5062c8..58b28e46e 100644
--- a/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/ZCU106/fpga_zynqmp/tb/fpga_core/test_fpga_core.py
@@ -425,6 +425,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl b/fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl
index 01f6505e8..dada45c6b 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl
+++ b/fpga/mqnic/fb2CG/fpga_100g/fpga/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/fb2CG/fpga_100g/fpga_tdma/config.tcl b/fpga/mqnic/fb2CG/fpga_100g/fpga_tdma/config.tcl
index 4c6bf46e6..330b0bd68 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/fpga_tdma/config.tcl
+++ b/fpga/mqnic/fb2CG/fpga_100g/fpga_tdma/config.tcl
@@ -136,6 +136,7 @@ dict set params TX_RAM_SIZE "131072"
 dict set params RX_RAM_SIZE "131072"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v
index d0993365a..12a9e5732 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v
+++ b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1763,6 +1764,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga_core.v b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga_core.v
index 049cda0f2..921c98815 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga_core.v
+++ b/fpga/mqnic/fb2CG/fpga_100g/rtl/fpga_core.v
@@ -117,6 +117,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 131072,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -908,6 +909,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/Makefile b/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/Makefile
index 8d9c013d2..e5c96a1fa 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/Makefile
@@ -186,6 +186,7 @@ export PARAM_TX_RAM_SIZE ?= 131072
 export PARAM_RX_RAM_SIZE ?= 131072
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -282,6 +283,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -370,6 +372,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/test_fpga_core.py
index 2f1ce2a1f..469b9f50e 100644
--- a/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/fb2CG/fpga_100g/tb/fpga_core/test_fpga_core.py
@@ -669,6 +669,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 131072
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl b/fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl
index 2148910ff..29cc09f1b 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl
+++ b/fpga/mqnic/fb2CG/fpga_25g/fpga/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl b/fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl
index 10cf60d98..5d65e1ef3 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl
+++ b/fpga/mqnic/fb2CG/fpga_25g/fpga_10g/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl b/fpga/mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl
index ce6810a9f..efa1e8aaa 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl
+++ b/fpga/mqnic/fb2CG/fpga_25g/fpga_tdma/config.tcl
@@ -145,6 +145,7 @@ dict set params TX_RAM_SIZE "32768"
 dict set params RX_RAM_SIZE "32768"
 
 # Application block configuration
+dict set params APP_ID "32'h00000000"
 dict set params APP_ENABLE "0"
 dict set params APP_CTRL_ENABLE "1"
 dict set params APP_DMA_ENABLE "1"
diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v
index 40e30e18e..0d82da8f3 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v
+++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v
@@ -108,6 +108,7 @@ module fpga #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1434,6 +1435,7 @@ fpga_core #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v
index 7a0420f48..85fd5a13d 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v
+++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v
@@ -121,6 +121,7 @@ module fpga_core #
     parameter RX_RAM_SIZE = 32768,
 
     // Application block configuration
+    parameter APP_ID = 32'h00000000,
     parameter APP_ENABLE = 0,
     parameter APP_CTRL_ENABLE = 1,
     parameter APP_DMA_ENABLE = 1,
@@ -1150,6 +1151,7 @@ mqnic_core_pcie_us #(
     .RX_RAM_SIZE(RX_RAM_SIZE),
 
     // Application block configuration
+    .APP_ID(APP_ID),
     .APP_ENABLE(APP_ENABLE),
     .APP_CTRL_ENABLE(APP_CTRL_ENABLE),
     .APP_DMA_ENABLE(APP_DMA_ENABLE),
diff --git a/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/Makefile b/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/Makefile
index d202a8771..11cee53d4 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/Makefile
+++ b/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/Makefile
@@ -193,6 +193,7 @@ export PARAM_TX_RAM_SIZE ?= 32768
 export PARAM_RX_RAM_SIZE ?= 32768
 
 # Application block configuration
+export PARAM_APP_ID ?= $(shell echo $$((16#00000000)) )
 export PARAM_APP_ENABLE ?= 0
 export PARAM_APP_CTRL_ENABLE ?= 1
 export PARAM_APP_DMA_ENABLE ?= 1
@@ -288,6 +289,7 @@ ifeq ($(SIM), icarus)
 	COMPILE_ARGS += -P $(TOPLEVEL).MAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).TX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -P $(TOPLEVEL).RX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -P $(TOPLEVEL).APP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -P $(TOPLEVEL).APP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
@@ -375,6 +377,7 @@ else ifeq ($(SIM), verilator)
 	COMPILE_ARGS += -GMAX_RX_SIZE=$(PARAM_MAX_RX_SIZE)
 	COMPILE_ARGS += -GTX_RAM_SIZE=$(PARAM_TX_RAM_SIZE)
 	COMPILE_ARGS += -GRX_RAM_SIZE=$(PARAM_RX_RAM_SIZE)
+	COMPILE_ARGS += -GAPP_ID=$(PARAM_APP_ID)
 	COMPILE_ARGS += -GAPP_ENABLE=$(PARAM_APP_ENABLE)
 	COMPILE_ARGS += -GAPP_CTRL_ENABLE=$(PARAM_APP_CTRL_ENABLE)
 	COMPILE_ARGS += -GAPP_DMA_ENABLE=$(PARAM_APP_DMA_ENABLE)
diff --git a/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/test_fpga_core.py b/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/test_fpga_core.py
index 7ffd5bb17..8ba896185 100644
--- a/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/test_fpga_core.py
+++ b/fpga/mqnic/fb2CG/fpga_25g/tb/fpga_core/test_fpga_core.py
@@ -728,6 +728,7 @@ def test_fpga_core(request):
     parameters['RX_RAM_SIZE'] = 32768
 
     # Application block configuration
+    parameters['APP_ID'] = 0x00000000
     parameters['APP_ENABLE'] = 0
     parameters['APP_CTRL_ENABLE'] = 1
     parameters['APP_DMA_ENABLE'] = 1
diff --git a/lib/mqnic/mqnic.c b/lib/mqnic/mqnic.c
index 39715deb1..4eafbab51 100644
--- a/lib/mqnic/mqnic.c
+++ b/lib/mqnic/mqnic.c
@@ -360,6 +360,7 @@ static int mqnic_try_open_if_name(struct mqnic *dev, const char *if_name)
 struct mqnic *mqnic_open(const char *dev_name)
 {
     struct mqnic *dev = calloc(1, sizeof(struct mqnic));
+    struct reg_block *rb;
 
     if (!dev)
     {
@@ -413,6 +414,12 @@ open:
     struct tm *tm_info = gmtime(&build_date);
     strftime(dev->build_date_str, sizeof(dev->build_date_str), "%F %T", tm_info);
 
+    rb = find_reg_block(dev->rb_list, MQNIC_RB_APP_INFO_TYPE, MQNIC_RB_APP_INFO_VER, 0);
+
+    if (rb) {
+        dev->app_id = mqnic_reg_read32(rb->regs, MQNIC_RB_APP_INFO_REG_ID);
+    }
+
     dev->phc_rb = find_reg_block(dev->rb_list, MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER, 0);
 
     // Enumerate interfaces
@@ -503,4 +510,6 @@ void mqnic_print_fw_id(struct mqnic *dev)
     printf("Build date: %s UTC (raw 0x%08x)\n", dev->build_date_str, dev->build_date);
     printf("Git hash: %08x\n", dev->git_hash);
     printf("Release info: %08x\n", dev->rel_info);
+    if (dev->app_id)
+        printf("Application ID: 0x%08x\n", dev->app_id);
 }
diff --git a/lib/mqnic/mqnic.h b/lib/mqnic/mqnic.h
index 9b85171cf..05fa692f1 100644
--- a/lib/mqnic/mqnic.h
+++ b/lib/mqnic/mqnic.h
@@ -151,6 +151,8 @@ struct mqnic {
     uint32_t git_hash;
     uint32_t rel_info;
 
+    uint32_t app_id;
+
     uint32_t if_offset;
     uint32_t if_count;
     uint32_t if_stride;
diff --git a/modules/mqnic/mqnic.h b/modules/mqnic/mqnic.h
index cd24eb140..14d839499 100644
--- a/modules/mqnic/mqnic.h
+++ b/modules/mqnic/mqnic.h
@@ -152,6 +152,8 @@ struct mqnic_dev {
 	u32 git_hash;
 	u32 rel_info;
 
+	u32 app_id;
+
 	u32 if_offset;
 	u32 if_count;
 	u32 if_stride;
diff --git a/modules/mqnic/mqnic_hw.h b/modules/mqnic/mqnic_hw.h
index a716b0240..85e90dd66 100644
--- a/modules/mqnic/mqnic_hw.h
+++ b/modules/mqnic/mqnic_hw.h
@@ -275,6 +275,10 @@
 #define MQNIC_RB_TDMA_SCH_REG_ACTIVE_PERIOD_SEC_L  0x58
 #define MQNIC_RB_TDMA_SCH_REG_ACTIVE_PERIOD_SEC_H  0x5C
 
+#define MQNIC_RB_APP_INFO_TYPE    0x0000C004
+#define MQNIC_RB_APP_INFO_VER     0x00000200
+#define MQNIC_RB_APP_INFO_REG_ID  0x0C
+
 #define MQNIC_QUEUE_BASE_ADDR_REG       0x00
 #define MQNIC_QUEUE_ACTIVE_LOG_SIZE_REG 0x08
 #define MQNIC_QUEUE_CPL_QUEUE_INDEX_REG 0x0C
diff --git a/modules/mqnic/mqnic_main.c b/modules/mqnic/mqnic_main.c
index f2f5b9922..48f6331eb 100644
--- a/modules/mqnic/mqnic_main.c
+++ b/modules/mqnic/mqnic_main.c
@@ -308,6 +308,13 @@ static int mqnic_common_probe(struct mqnic_dev *mqnic)
 	dev_info(dev, "Git hash: %08x", mqnic->git_hash);
 	dev_info(dev, "Release info: %08x", mqnic->rel_info);
 
+	rb = find_reg_block(mqnic->rb_list, MQNIC_RB_APP_INFO_TYPE, MQNIC_RB_APP_INFO_VER, 0);
+
+	if (rb) {
+		mqnic->app_id = ioread32(rb->regs + MQNIC_RB_APP_INFO_REG_ID);
+		dev_info(dev, "Application ID: 0x%08x", mqnic->app_id);
+	}
+
 	mqnic->phc_rb = find_reg_block(mqnic->rb_list, MQNIC_RB_PHC_TYPE, MQNIC_RB_PHC_VER, 0);
 
 	// Enumerate interfaces