diff --git a/rtl/eth_arb_mux.v b/rtl/eth_arb_mux.v
index 8e5784f39..8aa662646 100644
--- a/rtl/eth_arb_mux.v
+++ b/rtl/eth_arb_mux.v
@@ -89,7 +89,7 @@ parameter CL_S_COUNT = $clog2(S_COUNT);
 
 reg frame_reg = 1'b0, frame_next;
 
-reg s_eth_hdr_ready_mask_reg = 1'b0, s_eth_hdr_ready_mask_next;
+reg [S_COUNT-1:0] s_eth_hdr_ready_reg = {S_COUNT{1'b0}}, s_eth_hdr_ready_next;
 
 reg m_eth_hdr_valid_reg = 1'b0, m_eth_hdr_valid_next;
 reg [47:0] m_eth_dest_mac_reg = 48'd0, m_eth_dest_mac_next;
@@ -113,7 +113,7 @@ reg  [DEST_WIDTH-1:0] m_eth_payload_axis_tdest_int;
 reg  [USER_WIDTH-1:0] m_eth_payload_axis_tuser_int;
 wire                  m_eth_payload_axis_tready_int_early;
 
-assign s_eth_hdr_ready = (!s_eth_hdr_ready_mask_reg && grant_valid) << grant_encoded;
+assign s_eth_hdr_ready = s_eth_hdr_ready_reg;
 
 assign s_eth_payload_axis_tready = (m_eth_payload_axis_tready_int_reg && grant_valid) << grant_encoded;
 
@@ -155,7 +155,7 @@ assign acknowledge = grant & s_eth_payload_axis_tvalid & s_eth_payload_axis_trea
 always @* begin
     frame_next = frame_reg;
 
-    s_eth_hdr_ready_mask_next = s_eth_hdr_ready_mask_reg;
+    s_eth_hdr_ready_next = {S_COUNT{1'b0}};
 
     m_eth_hdr_valid_next = m_eth_hdr_valid_reg && !m_eth_hdr_ready;
     m_eth_dest_mac_next = m_eth_dest_mac_reg;
@@ -166,15 +166,14 @@ always @* begin
         // end of frame detection
         if (s_eth_payload_axis_tlast[grant_encoded]) begin
             frame_next = 1'b0;
-            s_eth_hdr_ready_mask_next = 1'b0;
         end
     end
 
-    if (!frame_reg && grant_valid) begin
+    if (!frame_reg && grant_valid && (m_eth_hdr_ready || !m_eth_hdr_valid)) begin
         // start of frame
         frame_next = 1'b1;
 
-        s_eth_hdr_ready_mask_next = 1'b1;
+        s_eth_hdr_ready_next = grant;
 
         m_eth_hdr_valid_next = 1'b1;
         m_eth_dest_mac_next = s_eth_dest_mac[grant_encoded*48 +: 48];
@@ -193,19 +192,20 @@ always @* begin
 end
 
 always @(posedge clk) begin
-    if (rst) begin
-        frame_reg <= 1'b0;
-        s_eth_hdr_ready_mask_reg <= 1'b0;
-        m_eth_hdr_valid_reg <= 1'b0;
-    end else begin
-        frame_reg <= frame_next;
-        s_eth_hdr_ready_mask_reg <= s_eth_hdr_ready_mask_next;
-        m_eth_hdr_valid_reg <= m_eth_hdr_valid_next;
-    end
+    frame_reg <= frame_next;
 
+    s_eth_hdr_ready_reg <= s_eth_hdr_ready_next;
+
+    m_eth_hdr_valid_reg <= m_eth_hdr_valid_next;
     m_eth_dest_mac_reg <= m_eth_dest_mac_next;
     m_eth_src_mac_reg <= m_eth_src_mac_next;
     m_eth_type_reg <= m_eth_type_next;
+
+    if (rst) begin
+        frame_reg <= 1'b0;
+        s_eth_hdr_ready_reg <= {S_COUNT{1'b0}};
+        m_eth_hdr_valid_reg <= 1'b0;
+    end
 end
 
 // output datapath logic
diff --git a/rtl/ip_arb_mux.v b/rtl/ip_arb_mux.v
index 7e99ece31..ec88c5262 100644
--- a/rtl/ip_arb_mux.v
+++ b/rtl/ip_arb_mux.v
@@ -115,7 +115,7 @@ parameter CL_S_COUNT = $clog2(S_COUNT);
 
 reg frame_reg = 1'b0, frame_next;
 
-reg s_ip_hdr_ready_mask_reg = 1'b0, s_ip_hdr_ready_mask_next;
+reg [S_COUNT-1:0] s_ip_hdr_ready_reg = {S_COUNT{1'b0}}, s_ip_hdr_ready_next;
 
 reg m_ip_hdr_valid_reg = 1'b0, m_ip_hdr_valid_next;
 reg [47:0] m_eth_dest_mac_reg = 48'd0, m_eth_dest_mac_next;
@@ -152,7 +152,7 @@ reg  [DEST_WIDTH-1:0] m_ip_payload_axis_tdest_int;
 reg  [USER_WIDTH-1:0] m_ip_payload_axis_tuser_int;
 wire                  m_ip_payload_axis_tready_int_early;
 
-assign s_ip_hdr_ready = (!s_ip_hdr_ready_mask_reg && grant_valid) << grant_encoded;
+assign s_ip_hdr_ready = s_ip_hdr_ready_reg;
 
 assign s_ip_payload_axis_tready = (m_ip_payload_axis_tready_int_reg && grant_valid) << grant_encoded;
 
@@ -207,7 +207,7 @@ assign acknowledge = grant & s_ip_payload_axis_tvalid & s_ip_payload_axis_tready
 always @* begin
     frame_next = frame_reg;
 
-    s_ip_hdr_ready_mask_next = s_ip_hdr_ready_mask_reg;
+    s_ip_hdr_ready_next = {S_COUNT{1'b0}};
 
     m_ip_hdr_valid_next = m_ip_hdr_valid_reg && !m_ip_hdr_ready;
     m_eth_dest_mac_next = m_eth_dest_mac_reg;
@@ -231,15 +231,14 @@ always @* begin
         // end of frame detection
         if (s_ip_payload_axis_tlast[grant_encoded]) begin
             frame_next = 1'b0;
-            s_ip_hdr_ready_mask_next = 1'b0;
         end
     end
 
-    if (!frame_reg && grant_valid) begin
+    if (!frame_reg && grant_valid && (m_ip_hdr_ready || !m_ip_hdr_valid)) begin
         // start of frame
         frame_next = 1'b1;
 
-        s_ip_hdr_ready_mask_next = 1'b1;
+        s_ip_hdr_ready_next = grant;
 
         m_ip_hdr_valid_next = 1'b1;
         m_eth_dest_mac_next = s_eth_dest_mac[grant_encoded*48 +: 48];
@@ -271,16 +270,11 @@ always @* begin
 end
 
 always @(posedge clk) begin
-    if (rst) begin
-        frame_reg <= 1'b0;
-        s_ip_hdr_ready_mask_reg <= 1'b0;
-        m_ip_hdr_valid_reg <= 1'b0;
-    end else begin
-        frame_reg <= frame_next;
-        s_ip_hdr_ready_mask_reg <= s_ip_hdr_ready_mask_next;
-        m_ip_hdr_valid_reg <= m_ip_hdr_valid_next;
-    end
+    frame_reg <= frame_next;
 
+    s_ip_hdr_ready_reg <= s_ip_hdr_ready_next;
+
+    m_ip_hdr_valid_reg <= m_ip_hdr_valid_next;
     m_eth_dest_mac_reg <= m_eth_dest_mac_next;
     m_eth_src_mac_reg <= m_eth_src_mac_next;
     m_eth_type_reg <= m_eth_type_next;
@@ -297,6 +291,12 @@ always @(posedge clk) begin
     m_ip_header_checksum_reg <= m_ip_header_checksum_next;
     m_ip_source_ip_reg <= m_ip_source_ip_next;
     m_ip_dest_ip_reg <= m_ip_dest_ip_next;
+
+    if (rst) begin
+        frame_reg <= 1'b0;
+        s_ip_hdr_ready_reg <= {S_COUNT{1'b0}};
+        m_ip_hdr_valid_reg <= 1'b0;
+    end
 end
 
 // output datapath logic
diff --git a/rtl/udp_arb_mux.v b/rtl/udp_arb_mux.v
index 2969b1b4d..9b285ee97 100644
--- a/rtl/udp_arb_mux.v
+++ b/rtl/udp_arb_mux.v
@@ -123,7 +123,7 @@ parameter CL_S_COUNT = $clog2(S_COUNT);
 
 reg frame_reg = 1'b0, frame_next;
 
-reg s_udp_hdr_ready_mask_reg = 1'b0, s_udp_hdr_ready_mask_next;
+reg [S_COUNT-1:0] s_udp_hdr_ready_reg = {S_COUNT{1'b0}}, s_udp_hdr_ready_next;
 
 reg m_udp_hdr_valid_reg = 1'b0, m_udp_hdr_valid_next;
 reg [47:0] m_eth_dest_mac_reg = 48'd0, m_eth_dest_mac_next;
@@ -164,7 +164,7 @@ reg  [DEST_WIDTH-1:0] m_udp_payload_axis_tdest_int;
 reg  [USER_WIDTH-1:0] m_udp_payload_axis_tuser_int;
 wire                  m_udp_payload_axis_tready_int_early;
 
-assign s_udp_hdr_ready = (!s_udp_hdr_ready_mask_reg && grant_valid) << grant_encoded;
+assign s_udp_hdr_ready = s_udp_hdr_ready_reg;
 
 assign s_udp_payload_axis_tready = (m_udp_payload_axis_tready_int_reg && grant_valid) << grant_encoded;
 
@@ -223,7 +223,7 @@ assign acknowledge = grant & s_udp_payload_axis_tvalid & s_udp_payload_axis_trea
 always @* begin
     frame_next = frame_reg;
 
-    s_udp_hdr_ready_mask_next = s_udp_hdr_ready_mask_reg;
+    s_udp_hdr_ready_next = {S_COUNT{1'b0}};
 
     m_udp_hdr_valid_next = m_udp_hdr_valid_reg && !m_udp_hdr_ready;
     m_eth_dest_mac_next = m_eth_dest_mac_reg;
@@ -251,15 +251,14 @@ always @* begin
         // end of frame detection
         if (s_udp_payload_axis_tlast[grant_encoded]) begin
             frame_next = 1'b0;
-            s_udp_hdr_ready_mask_next = 1'b0;
         end
     end
 
-    if (!frame_reg && grant_valid) begin
+    if (!frame_reg && grant_valid && (m_udp_hdr_ready || !m_udp_hdr_valid)) begin
         // start of frame
         frame_next = 1'b1;
 
-        s_udp_hdr_ready_mask_next = 1'b1;
+        s_udp_hdr_ready_next = grant;
 
         m_udp_hdr_valid_next = 1'b1;
         m_eth_dest_mac_next = s_eth_dest_mac[grant_encoded*48 +: 48];
@@ -295,16 +294,11 @@ always @* begin
 end
 
 always @(posedge clk) begin
-    if (rst) begin
-        frame_reg <= 1'b0;
-        s_udp_hdr_ready_mask_reg <= 1'b0;
-        m_udp_hdr_valid_reg <= 1'b0;
-    end else begin
-        frame_reg <= frame_next;
-        s_udp_hdr_ready_mask_reg <= s_udp_hdr_ready_mask_next;
-        m_udp_hdr_valid_reg <= m_udp_hdr_valid_next;
-    end
+    frame_reg <= frame_next;
 
+    s_udp_hdr_ready_reg <= s_udp_hdr_ready_next;
+
+    m_udp_hdr_valid_reg <= m_udp_hdr_valid_next;
     m_eth_dest_mac_reg <= m_eth_dest_mac_next;
     m_eth_src_mac_reg <= m_eth_src_mac_next;
     m_eth_type_reg <= m_eth_type_next;
@@ -325,6 +319,12 @@ always @(posedge clk) begin
     m_udp_dest_port_reg <= m_udp_dest_port_next;
     m_udp_length_reg <= m_udp_length_next;
     m_udp_checksum_reg <= m_udp_checksum_next;
+
+    if (rst) begin
+        frame_reg <= 1'b0;
+        s_udp_hdr_ready_reg <= {S_COUNT{1'b0}};
+        m_udp_hdr_valid_reg <= 1'b0;
+    end
 end
 
 // output datapath logic