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mirror of https://github.com/corundum/corundum.git synced 2025-01-16 08:12:53 +08:00

Properly implement zero-length operations in generic interface model

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich 2022-06-04 14:52:54 -07:00
parent 228d20b3f4
commit 87bf5f2e41

View File

@ -1465,6 +1465,10 @@ class PcieIfTestDevice:
async def dma_io_write(self, addr, data, timeout=0, timeout_unit='ns'): async def dma_io_write(self, addr, data, timeout=0, timeout_unit='ns'):
n = 0 n = 0
zero_len = len(data) == 0
if zero_len:
data = b'\x00'
while True: while True:
tlp = Tlp() tlp = Tlp()
tlp.fmt_type = TlpType.IO_WRITE tlp.fmt_type = TlpType.IO_WRITE
@ -1474,6 +1478,9 @@ class PcieIfTestDevice:
byte_length = min(len(data)-n, 4-first_pad) byte_length = min(len(data)-n, 4-first_pad)
tlp.set_addr_be_data(addr, data[n:n+byte_length]) tlp.set_addr_be_data(addr, data[n:n+byte_length])
if zero_len:
tlp.first_be = 0
tlp.tag = await self.alloc_tag() tlp.tag = await self.alloc_tag()
await self.tx_wr_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr)) await self.tx_wr_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr))
@ -1497,6 +1504,10 @@ class PcieIfTestDevice:
data = b'' data = b''
n = 0 n = 0
zero_len = length <= 0
if zero_len:
length = 1
while True: while True:
tlp = Tlp() tlp = Tlp()
tlp.fmt_type = TlpType.IO_READ tlp.fmt_type = TlpType.IO_READ
@ -1506,6 +1517,9 @@ class PcieIfTestDevice:
byte_length = min(length-n, 4-first_pad) byte_length = min(length-n, 4-first_pad)
tlp.set_addr_be(addr, byte_length) tlp.set_addr_be(addr, byte_length)
if zero_len:
tlp.first_be = 0
tlp.tag = await self.alloc_tag() tlp.tag = await self.alloc_tag()
await self.tx_rd_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr)) await self.tx_rd_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr))
@ -1529,11 +1543,18 @@ class PcieIfTestDevice:
if n >= length: if n >= length:
break break
if zero_len:
return b''
return data[:length] return data[:length]
async def dma_mem_write(self, addr, data, timeout=0, timeout_unit='ns'): async def dma_mem_write(self, addr, data, timeout=0, timeout_unit='ns'):
n = 0 n = 0
zero_len = len(data) == 0
if zero_len:
data = b'\x00'
while True: while True:
tlp = Tlp() tlp = Tlp()
if addr > 0xffffffff: if addr > 0xffffffff:
@ -1550,6 +1571,9 @@ class PcieIfTestDevice:
byte_length = min(byte_length, 0x1000 - (addr & 0xfff)) byte_length = min(byte_length, 0x1000 - (addr & 0xfff))
tlp.set_addr_be_data(addr, data[n:n+byte_length]) tlp.set_addr_be_data(addr, data[n:n+byte_length])
if zero_len:
tlp.first_be = 0
await self.tx_wr_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr)) await self.tx_wr_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr))
n += byte_length n += byte_length
@ -1562,6 +1586,10 @@ class PcieIfTestDevice:
data = b'' data = b''
n = 0 n = 0
zero_len = length <= 0
if zero_len:
length = 1
while True: while True:
tlp = Tlp() tlp = Tlp()
if addr > 0xffffffff: if addr > 0xffffffff:
@ -1578,6 +1606,9 @@ class PcieIfTestDevice:
byte_length = min(byte_length, 0x1000 - (addr & 0xfff)) byte_length = min(byte_length, 0x1000 - (addr & 0xfff))
tlp.set_addr_be(addr, byte_length) tlp.set_addr_be(addr, byte_length)
if zero_len:
tlp.first_be = 0
tlp.tag = await self.alloc_tag() tlp.tag = await self.alloc_tag()
await self.tx_rd_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr)) await self.tx_rd_req_tlp_source.send(PcieIfFrame.from_tlp(tlp, self.force_64bit_addr))
@ -1614,6 +1645,9 @@ class PcieIfTestDevice:
if n >= length: if n >= length:
break break
if zero_len:
return b''
return data[:length] return data[:length]
async def issue_msi_interrupt(self, addr, data): async def issue_msi_interrupt(self, addr, data):