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Parametrization update

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This commit is contained in:
Alex Forencich 2022-03-04 15:37:49 -08:00
parent 8e2e6c6026
commit 8fc832bbd2
1 changed files with 3 additions and 3 deletions
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6
fpga/app/template/rtl/mqnic_app_block.v
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@ -75,12 +75,12 @@ module mqnic_app_block #
parameter DMA_ADDR_WIDTH = 64,
parameter DMA_LEN_WIDTH = 16,
parameter DMA_TAG_WIDTH = 16,
parameter RAM_SEL_WIDTH = 4,
parameter RAM_ADDR_WIDTH = 16,
parameter RAM_SEG_COUNT = 2,
parameter RAM_SEG_DATA_WIDTH = 256*2/RAM_SEG_COUNT,
parameter RAM_SEG_ADDR_WIDTH = 12,
parameter RAM_SEG_BE_WIDTH = RAM_SEG_DATA_WIDTH/8,
parameter RAM_SEL_WIDTH = 4,
parameter RAM_ADDR_WIDTH = RAM_SEG_ADDR_WIDTH+$clog2(RAM_SEG_COUNT)+$clog2(RAM_SEG_BE_WIDTH),
parameter RAM_SEG_ADDR_WIDTH = RAM_ADDR_WIDTH-$clog2(RAM_SEG_COUNT*RAM_SEG_BE_WIDTH),
parameter RAM_PIPELINE = 2,
// AXI lite interface (application control from host)