From 28916a56cd3c688549f9c104ad42e8dbeb613e43 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 26 Jan 2023 16:41:36 -0800 Subject: [PATCH 1/5] Update CI configuration Signed-off-by: Alex Forencich --- .github/workflows/regression-tests.yml | 8 ++++---- tox.ini | 16 ++++++++-------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/.github/workflows/regression-tests.yml b/.github/workflows/regression-tests.yml index aacbb31af..dc6a60e32 100644 --- a/.github/workflows/regression-tests.yml +++ b/.github/workflows/regression-tests.yml @@ -9,14 +9,14 @@ jobs: strategy: matrix: - python-version: [3.9] + python-version: ["3.10"] group: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20] steps: - - uses: actions/checkout@v1 + - uses: actions/checkout@v3 - name: Set up Python ${{ matrix.python-version }} - uses: actions/setup-python@v2 + uses: actions/setup-python@v4 with: python-version: ${{ matrix.python-version }} @@ -30,4 +30,4 @@ jobs: pip install tox tox-gh-actions - name: Test with tox - run: tox -- --splits 20 --group ${{ matrix.group }} --splitting-algorithm least_duration + run: tox -- -n auto --verbose --splits 20 --group ${{ matrix.group }} --splitting-algorithm least_duration diff --git a/tox.ini b/tox.ini index 13f3a1b55..d82b140e5 100644 --- a/tox.ini +++ b/tox.ini @@ -7,22 +7,22 @@ requires = virtualenv >= 16.1 [gh-actions] python = - 3.9: py3 + 3.10: py3 [testenv] deps = - pytest == 7.1.3 - pytest-xdist == 2.5.0 + pytest == 7.2.1 + pytest-xdist == 3.1.0 pytest-split == 0.8.0 - cocotb == 1.7.0 + cocotb == 1.7.2 cocotb-bus == 0.2.1 - cocotb-test == 0.2.2 - cocotbext-axi == 0.1.18 - cocotbext-pcie == 0.2.10 + cocotb-test == 0.2.4 + cocotbext-axi == 0.1.20 + cocotbext-pcie == 0.2.12 jinja2 == 3.1.2 commands = - pytest -n auto {posargs} + pytest {posargs:-n auto --verbose} # pytest configuration [pytest] From 73728d1994ae3668541e0d146304de85107d1d45 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 26 Jan 2023 18:47:15 -0800 Subject: [PATCH 2/5] Adjust testbench timeouts Signed-off-by: Alex Forencich --- tb/pcie_axi_master/test_pcie_axi_master.py | 2 +- tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py | 2 +- tb/pcie_us_axi_master/test_pcie_us_axi_master.py | 2 +- tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tb/pcie_axi_master/test_pcie_axi_master.py b/tb/pcie_axi_master/test_pcie_axi_master.py index 22f3de235..15e864ca1 100644 --- a/tb/pcie_axi_master/test_pcie_axi_master.py +++ b/tb/pcie_axi_master/test_pcie_axi_master.py @@ -215,7 +215,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.log.debug("%s", tb.axi_ram.hexdump_str((pcie_addr & ~0xf)-16, (((pcie_addr & 0xf)+length-1) & ~0xf)+48, prefix="AXI ")) - val = await dev_bar0.read(pcie_addr, len(test_data), timeout=1000, timeout_unit='ns') + val = await dev_bar0.read(pcie_addr, len(test_data), timeout=10000, timeout_unit='ns') tb.log.debug("read data: %s", val) diff --git a/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py b/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py index 70dc93609..c07fc6c08 100644 --- a/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py +++ b/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py @@ -172,7 +172,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.log.debug("%s", tb.axi_ram.hexdump_str((pcie_addr & ~0xf)-16, (((pcie_addr & 0xf)+length-1) & ~0xf)+48, prefix="AXI ")) - val = await dev_bar0.read(pcie_addr, len(test_data), timeout=1000, timeout_unit='ns') + val = await dev_bar0.read(pcie_addr, len(test_data), timeout=10000, timeout_unit='ns') tb.log.debug("read data: %s", val) diff --git a/tb/pcie_us_axi_master/test_pcie_us_axi_master.py b/tb/pcie_us_axi_master/test_pcie_us_axi_master.py index 7b3b48536..cf0da7258 100644 --- a/tb/pcie_us_axi_master/test_pcie_us_axi_master.py +++ b/tb/pcie_us_axi_master/test_pcie_us_axi_master.py @@ -246,7 +246,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.log.debug("%s", tb.axi_ram.hexdump_str((pcie_addr & ~0xf)-16, (((pcie_addr & 0xf)+length-1) & ~0xf)+48, prefix="AXI ")) - val = await dev_bar0.read(pcie_addr, len(test_data), timeout=1000, timeout_unit='ns') + val = await dev_bar0.read(pcie_addr, len(test_data), timeout=10000, timeout_unit='ns') tb.log.debug("read data: %s", val) diff --git a/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py b/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py index c6702e39c..8f2c43ebc 100644 --- a/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py +++ b/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py @@ -201,7 +201,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.log.debug("%s", tb.axi_ram.hexdump_str((pcie_addr & ~0xf)-16, (((pcie_addr & 0xf)+length-1) & ~0xf)+48, prefix="AXI ")) - val = await dev_bar0.read(pcie_addr, len(test_data), timeout=1000, timeout_unit='ns') + val = await dev_bar0.read(pcie_addr, len(test_data), timeout=10000, timeout_unit='ns') tb.log.debug("read data: %s", val) From 0c951a4e5a696b681f9c6a213b282ff73da92378 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 26 Jan 2023 21:55:58 -0800 Subject: [PATCH 3/5] Split some long-running tests Signed-off-by: Alex Forencich --- tb/dma_if_axi/test_dma_if_axi.py | 26 ++++++++++++++++--- tb/dma_if_axi_rd/test_dma_if_axi_rd.py | 12 +++++++-- tb/dma_if_axi_wr/test_dma_if_axi_wr.py | 19 +++++++++++--- tb/pcie_axi_master/test_pcie_axi_master.py | 16 ++++++++++-- .../test_pcie_axi_master_rd.py | 11 ++++++-- .../test_pcie_axi_master_wr.py | 11 ++++++-- .../test_pcie_us_axi_master.py | 18 ++++++++++--- .../test_pcie_us_axi_master_rd.py | 11 ++++++-- .../test_pcie_us_axi_master_wr.py | 11 ++++++-- 9 files changed, 113 insertions(+), 22 deletions(-) diff --git a/tb/dma_if_axi/test_dma_if_axi.py b/tb/dma_if_axi/test_dma_if_axi.py index c104d54e1..6ed1f5f03 100644 --- a/tb/dma_if_axi/test_dma_if_axi.py +++ b/tb/dma_if_axi/test_dma_if_axi.py @@ -117,6 +117,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): ram_byte_lanes = tb.dma_ram.write_if.byte_lanes tag_count = 2**len(tb.write_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -127,7 +132,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.write_enable.value = 1 for length in list(range(1, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]: - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: for ram_offset in range(1): tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset) axi_addr = axi_offset+0x1000 @@ -168,6 +173,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): ram_byte_lanes = tb.dma_ram.write_if.byte_lanes tag_count = 2**len(tb.read_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -178,7 +188,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.read_enable.value = 1 for length in list(range(1, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]: - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: for ram_offset in range(1): tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset) axi_addr = axi_offset+0x1000 @@ -218,6 +228,11 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None axi_byte_lanes = tb.axi_ram.write_if.byte_lanes tag_count = 2**len(tb.write_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -228,7 +243,7 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None tb.dut.write_enable.value = 1 for length in list(range(1, len(dut.s_axis_write_desc_imm) // 8)): - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: tb.log.info("length %d, axi_offset %d", length, axi_offset) axi_addr = axi_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -278,8 +293,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axi_data_width", [64, 128]) -def test_dma_if_axi(request, axi_data_width): +def test_dma_if_axi(request, axi_data_width, offset_group): dut = "dma_if_axi" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -313,6 +329,8 @@ def test_dma_if_axi(request, axi_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) + sim_build = os.path.join(tests_dir, "sim_build", request.node.name.replace('[', '-').replace(']', '')) diff --git a/tb/dma_if_axi_rd/test_dma_if_axi_rd.py b/tb/dma_if_axi_rd/test_dma_if_axi_rd.py index 8a91fb1e2..17075905d 100644 --- a/tb/dma_if_axi_rd/test_dma_if_axi_rd.py +++ b/tb/dma_if_axi_rd/test_dma_if_axi_rd.py @@ -109,6 +109,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): ram_byte_lanes = tb.dma_ram.byte_lanes tag_count = 2**len(tb.read_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -119,7 +124,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.enable.value = 1 for length in list(range(0, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]: - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: for ram_offset in range(ram_byte_lanes+1): tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset) axi_addr = axi_offset+0x1000 @@ -170,8 +175,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axi_data_width", [64, 128]) -def test_dma_if_axi_rd(request, axi_data_width): +def test_dma_if_axi_rd(request, axi_data_width, offset_group): dut = "dma_if_axi_rd" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -199,6 +205,8 @@ def test_dma_if_axi_rd(request, axi_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) + sim_build = os.path.join(tests_dir, "sim_build", request.node.name.replace('[', '-').replace(']', '')) diff --git a/tb/dma_if_axi_wr/test_dma_if_axi_wr.py b/tb/dma_if_axi_wr/test_dma_if_axi_wr.py index 73a618bfa..322ea5ab5 100644 --- a/tb/dma_if_axi_wr/test_dma_if_axi_wr.py +++ b/tb/dma_if_axi_wr/test_dma_if_axi_wr.py @@ -110,6 +110,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): ram_byte_lanes = tb.dma_ram.byte_lanes tag_count = 2**len(tb.write_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -120,7 +125,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.enable.value = 1 for length in list(range(0, ram_byte_lanes+3))+list(range(128-4, 128+4))+[1024]: - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: for ram_offset in range(ram_byte_lanes+1): tb.log.info("length %d, axi_offset %d, ram_offset %d", length, axi_offset, ram_offset) axi_addr = axi_offset+0x1000 @@ -160,6 +165,11 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None axi_byte_lanes = tb.axi_ram.byte_lanes tag_count = 2**len(tb.write_desc_source.bus.tag) + axi_offsets = list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + axi_offsets = axi_offsets[group::8] + cur_tag = 1 tb.set_idle_generator(idle_inserter) @@ -170,7 +180,7 @@ async def run_test_write_imm(dut, idle_inserter=None, backpressure_inserter=None tb.dut.enable.value = 1 for length in list(range(1, len(dut.s_axis_write_desc_imm) // 8)): - for axi_offset in list(range(axi_byte_lanes+1))+list(range(4096-axi_byte_lanes, 4096)): + for axi_offset in axi_offsets: tb.log.info("length %d, axi_offset %d", length, axi_offset) axi_addr = axi_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -220,8 +230,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axi_data_width", [64, 128]) -def test_dma_if_axi_wr(request, axi_data_width): +def test_dma_if_axi_wr(request, axi_data_width, offset_group): dut = "dma_if_axi_wr" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -251,6 +262,8 @@ def test_dma_if_axi_wr(request, axi_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) + sim_build = os.path.join(tests_dir, "sim_build", request.node.name.replace('[', '-').replace(']', '')) diff --git a/tb/pcie_axi_master/test_pcie_axi_master.py b/tb/pcie_axi_master/test_pcie_axi_master.py index 15e864ca1..e32ec7fe3 100644 --- a/tb/pcie_axi_master/test_pcie_axi_master.py +++ b/tb/pcie_axi_master/test_pcie_axi_master.py @@ -147,6 +147,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.write_if.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -162,7 +167,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.completer_id.value = int(tb.dev.functions[0].pcie_id) for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -190,6 +195,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.read_if.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -314,8 +324,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("pcie_data_width", [64, 128]) -def test_pcie_axi_master(request, pcie_data_width): +def test_pcie_axi_master(request, pcie_data_width, offset_group): dut = "pcie_axi_master" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -343,6 +354,7 @@ def test_pcie_axi_master(request, pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", diff --git a/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py b/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py index c07fc6c08..cc5d6dc7d 100644 --- a/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py +++ b/tb/pcie_axi_master_rd/test_pcie_axi_master_rd.py @@ -147,6 +147,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -162,7 +167,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): tb.dut.completer_id.value = int(tb.dev.functions[0].pcie_id) for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -292,8 +297,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("pcie_data_width", [64, 128]) -def test_pcie_axi_master_rd(request, pcie_data_width): +def test_pcie_axi_master_rd(request, pcie_data_width, offset_group): dut = "pcie_axi_master_rd" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -317,6 +323,7 @@ def test_pcie_axi_master_rd(request, pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", diff --git a/tb/pcie_axi_master_wr/test_pcie_axi_master_wr.py b/tb/pcie_axi_master_wr/test_pcie_axi_master_wr.py index 31071457a..f67fec837 100644 --- a/tb/pcie_axi_master_wr/test_pcie_axi_master_wr.py +++ b/tb/pcie_axi_master_wr/test_pcie_axi_master_wr.py @@ -133,6 +133,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -146,7 +151,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): dev_bar0 = dev.bar_window[0] for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -265,8 +270,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("pcie_data_width", [64, 128]) -def test_pcie_axi_master_wr(request, pcie_data_width): +def test_pcie_axi_master_wr(request, pcie_data_width, offset_group): dut = "pcie_axi_master_wr" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -289,6 +295,7 @@ def test_pcie_axi_master_wr(request, pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", diff --git a/tb/pcie_us_axi_master/test_pcie_us_axi_master.py b/tb/pcie_us_axi_master/test_pcie_us_axi_master.py index cf0da7258..6580e988d 100644 --- a/tb/pcie_us_axi_master/test_pcie_us_axi_master.py +++ b/tb/pcie_us_axi_master/test_pcie_us_axi_master.py @@ -180,6 +180,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.write_if.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -194,7 +199,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): dev_bar0 = dev.bar_window[0] for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in range(byte_lanes): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -222,6 +227,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.read_if.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -236,7 +246,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): dev_bar0 = dev.bar_window[0] for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in range(byte_lanes): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -340,8 +350,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512]) -def test_pcie_us_axi_master(request, axis_pcie_data_width): +def test_pcie_us_axi_master(request, axis_pcie_data_width, offset_group): dut = "pcie_us_axi_master" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -368,6 +379,7 @@ def test_pcie_us_axi_master(request, axis_pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", diff --git a/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py b/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py index 8f2c43ebc..7c040bb1c 100644 --- a/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py +++ b/tb/pcie_us_axi_master_rd/test_pcie_us_axi_master_rd.py @@ -177,6 +177,11 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -191,7 +196,7 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None): dev_bar0 = dev.bar_window[0] for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -317,8 +322,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512]) -def test_pcie_us_axi_master_rd(request, axis_pcie_data_width): +def test_pcie_us_axi_master_rd(request, axis_pcie_data_width, offset_group): dut = "pcie_us_axi_master_rd" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -341,6 +347,7 @@ def test_pcie_us_axi_master_rd(request, axis_pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", diff --git a/tb/pcie_us_axi_master_wr/test_pcie_us_axi_master_wr.py b/tb/pcie_us_axi_master_wr/test_pcie_us_axi_master_wr.py index 024d72bd3..dc1ee94e0 100644 --- a/tb/pcie_us_axi_master_wr/test_pcie_us_axi_master_wr.py +++ b/tb/pcie_us_axi_master_wr/test_pcie_us_axi_master_wr.py @@ -162,6 +162,11 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): byte_lanes = tb.axi_ram.byte_lanes + pcie_offsets = list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)) + if os.getenv("OFFSET_GROUP") is not None: + group = int(os.getenv("OFFSET_GROUP")) + pcie_offsets = pcie_offsets[group::8] + tb.set_idle_generator(idle_inserter) tb.set_backpressure_generator(backpressure_inserter) @@ -176,7 +181,7 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None): dev_bar0 = dev.bar_window[0] for length in list(range(0, byte_lanes*2))+[1024]: - for pcie_offset in list(range(byte_lanes))+list(range(4096-byte_lanes, 4096)): + for pcie_offset in pcie_offsets: tb.log.info("length %d, pcie_offset %d", length, pcie_offset) pcie_addr = pcie_offset+0x1000 test_data = bytearray([x % 256 for x in range(length)]) @@ -293,8 +298,9 @@ tests_dir = os.path.dirname(__file__) rtl_dir = os.path.abspath(os.path.join(tests_dir, '..', '..', 'rtl')) +@pytest.mark.parametrize("offset_group", list(range(8))) @pytest.mark.parametrize("axis_pcie_data_width", [64, 128, 256, 512]) -def test_pcie_us_axi_master_wr(request, axis_pcie_data_width): +def test_pcie_us_axi_master_wr(request, axis_pcie_data_width, offset_group): dut = "pcie_us_axi_master_wr" module = os.path.splitext(os.path.basename(__file__))[0] toplevel = dut @@ -316,6 +322,7 @@ def test_pcie_us_axi_master_wr(request, axis_pcie_data_width): extra_env = {f'PARAM_{k}': str(v) for k, v in parameters.items()} + extra_env['OFFSET_GROUP'] = str(offset_group) extra_env['COCOTB_RESOLVE_X'] = 'RANDOM' sim_build = os.path.join(tests_dir, "sim_build", From 5de1bc0df13bd8a963c26bba8e8a17053be4b7aa Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 29 Jan 2023 22:31:21 -0800 Subject: [PATCH 4/5] Rework parameter handling in testbench makefiles Signed-off-by: Alex Forencich --- tb/dma_client_axis_sink/Makefile | 38 ++------------------ tb/dma_client_axis_source/Makefile | 38 ++------------------ tb/dma_if_axi/Makefile | 38 ++------------------ tb/dma_if_axi_rd/Makefile | 30 ++-------------- tb/dma_if_axi_wr/Makefile | 34 ++---------------- tb/dma_if_pcie_rd/Makefile | 42 ++-------------------- tb/dma_if_pcie_us/Makefile | 46 ++---------------------- tb/dma_if_pcie_us_rd/Makefile | 40 ++------------------- tb/dma_if_pcie_us_wr/Makefile | 36 ++----------------- tb/dma_if_pcie_wr/Makefile | 44 ++--------------------- tb/irq_rate_limit/Makefile | 4 +-- tb/pcie_axi_master/Makefile | 22 ++---------- tb/pcie_axi_master_rd/Makefile | 22 ++---------- tb/pcie_axi_master_wr/Makefile | 20 ++--------- tb/pcie_axil_master/Makefile | 18 ++-------- tb/pcie_axil_master_minimal/Makefile | 18 ++-------- tb/pcie_msix/Makefile | 20 ++--------- tb/pcie_ptile_if/Makefile | 30 ++-------------- tb/pcie_ptile_if_rx/Makefile | 22 ++---------- tb/pcie_ptile_if_tx/Makefile | 20 ++--------- tb/pcie_s10_if/Makefile | 32 ++--------------- tb/pcie_s10_if_rx/Makefile | 18 ++-------- tb/pcie_s10_if_tx/Makefile | 16 ++------- tb/pcie_tlp_demux/Makefile | 20 ++--------- tb/pcie_tlp_demux_bar/Makefile | 26 ++------------ tb/pcie_tlp_fifo/Makefile | 14 ++------ tb/pcie_tlp_fifo_mux/Makefile | 22 ++---------- tb/pcie_tlp_mux/Makefile | 16 ++------- tb/pcie_us_axi_dma/Makefile | 44 ++--------------------- tb/pcie_us_axi_dma_rd/Makefile | 38 ++------------------ tb/pcie_us_axi_dma_wr/Makefile | 34 ++---------------- tb/pcie_us_axi_master/Makefile | 20 ++--------- tb/pcie_us_axi_master_rd/Makefile | 20 ++--------- tb/pcie_us_axi_master_wr/Makefile | 18 ++-------- tb/pcie_us_axil_master/Makefile | 18 ++-------- tb/pcie_us_if/Makefile | 54 ++-------------------------- tb/pcie_us_if_cc/Makefile | 18 ++-------- tb/pcie_us_if_cq/Makefile | 18 ++-------- tb/pcie_us_if_rc/Makefile | 18 ++-------- tb/pcie_us_if_rq/Makefile | 24 ++----------- 40 files changed, 80 insertions(+), 990 deletions(-) diff --git a/tb/dma_client_axis_sink/Makefile b/tb/dma_client_axis_sink/Makefile index 6e2888aa0..6594cff8b 100644 --- a/tb/dma_client_axis_sink/Makefile +++ b/tb/dma_client_axis_sink/Makefile @@ -54,24 +54,7 @@ export PARAM_TAG_WIDTH ?= 8 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).RAM_DATA_WIDTH=$(PARAM_RAM_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DATA_WIDTH=$(PARAM_AXIS_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_KEEP_ENABLE=$(PARAM_AXIS_KEEP_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_KEEP_WIDTH=$(PARAM_AXIS_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_LAST_ENABLE=$(PARAM_AXIS_LAST_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_ID_ENABLE=$(PARAM_AXIS_ID_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_ID_WIDTH=$(PARAM_AXIS_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DEST_ENABLE=$(PARAM_AXIS_DEST_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DEST_WIDTH=$(PARAM_AXIS_DEST_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_USER_ENABLE=$(PARAM_AXIS_USER_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_USER_WIDTH=$(PARAM_AXIS_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -80,24 +63,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GRAM_DATA_WIDTH=$(PARAM_RAM_DATA_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GSEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GAXIS_DATA_WIDTH=$(PARAM_AXIS_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_KEEP_ENABLE=$(PARAM_AXIS_KEEP_ENABLE) - COMPILE_ARGS += -GAXIS_KEEP_WIDTH=$(PARAM_AXIS_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_LAST_ENABLE=$(PARAM_AXIS_LAST_ENABLE) - COMPILE_ARGS += -GAXIS_ID_ENABLE=$(PARAM_AXIS_ID_ENABLE) - COMPILE_ARGS += -GAXIS_ID_WIDTH=$(PARAM_AXIS_ID_WIDTH) - COMPILE_ARGS += -GAXIS_DEST_ENABLE=$(PARAM_AXIS_DEST_ENABLE) - COMPILE_ARGS += -GAXIS_DEST_WIDTH=$(PARAM_AXIS_DEST_WIDTH) - COMPILE_ARGS += -GAXIS_USER_ENABLE=$(PARAM_AXIS_USER_ENABLE) - COMPILE_ARGS += -GAXIS_USER_WIDTH=$(PARAM_AXIS_USER_WIDTH) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_client_axis_source/Makefile b/tb/dma_client_axis_source/Makefile index f64b35f1a..459ae62e6 100644 --- a/tb/dma_client_axis_source/Makefile +++ b/tb/dma_client_axis_source/Makefile @@ -54,24 +54,7 @@ export PARAM_TAG_WIDTH ?= 8 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).RAM_DATA_WIDTH=$(PARAM_RAM_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DATA_WIDTH=$(PARAM_AXIS_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_KEEP_ENABLE=$(PARAM_AXIS_KEEP_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_KEEP_WIDTH=$(PARAM_AXIS_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_LAST_ENABLE=$(PARAM_AXIS_LAST_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_ID_ENABLE=$(PARAM_AXIS_ID_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_ID_WIDTH=$(PARAM_AXIS_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DEST_ENABLE=$(PARAM_AXIS_DEST_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_DEST_WIDTH=$(PARAM_AXIS_DEST_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_USER_ENABLE=$(PARAM_AXIS_USER_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_USER_WIDTH=$(PARAM_AXIS_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -80,24 +63,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GRAM_DATA_WIDTH=$(PARAM_RAM_DATA_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GSEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GAXIS_DATA_WIDTH=$(PARAM_AXIS_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_KEEP_ENABLE=$(PARAM_AXIS_KEEP_ENABLE) - COMPILE_ARGS += -GAXIS_KEEP_WIDTH=$(PARAM_AXIS_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_LAST_ENABLE=$(PARAM_AXIS_LAST_ENABLE) - COMPILE_ARGS += -GAXIS_ID_ENABLE=$(PARAM_AXIS_ID_ENABLE) - COMPILE_ARGS += -GAXIS_ID_WIDTH=$(PARAM_AXIS_ID_WIDTH) - COMPILE_ARGS += -GAXIS_DEST_ENABLE=$(PARAM_AXIS_DEST_ENABLE) - COMPILE_ARGS += -GAXIS_DEST_WIDTH=$(PARAM_AXIS_DEST_WIDTH) - COMPILE_ARGS += -GAXIS_USER_ENABLE=$(PARAM_AXIS_USER_ENABLE) - COMPILE_ARGS += -GAXIS_USER_WIDTH=$(PARAM_AXIS_USER_WIDTH) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_axi/Makefile b/tb/dma_if_axi/Makefile index 266f281ea..e239c58f7 100644 --- a/tb/dma_if_axi/Makefile +++ b/tb/dma_if_axi/Makefile @@ -56,24 +56,7 @@ export PARAM_WRITE_USE_AXI_ID ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_USE_AXI_ID=$(PARAM_READ_USE_AXI_ID) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_USE_AXI_ID=$(PARAM_WRITE_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -82,24 +65,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GRAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -GRAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GRAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GRAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_USE_AXI_ID=$(PARAM_READ_USE_AXI_ID) - COMPILE_ARGS += -GWRITE_USE_AXI_ID=$(PARAM_WRITE_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_axi_rd/Makefile b/tb/dma_if_axi_rd/Makefile index 35b743a76..eb6757c33 100644 --- a/tb/dma_if_axi_rd/Makefile +++ b/tb/dma_if_axi_rd/Makefile @@ -50,20 +50,7 @@ export PARAM_USE_AXI_ID ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).USE_AXI_ID=$(PARAM_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -72,20 +59,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GRAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -GRAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GRAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GRAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GUSE_AXI_ID=$(PARAM_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_axi_wr/Makefile b/tb/dma_if_axi_wr/Makefile index 8bccb276a..0eddba394 100644 --- a/tb/dma_if_axi_wr/Makefile +++ b/tb/dma_if_axi_wr/Makefile @@ -52,22 +52,7 @@ export PARAM_USE_AXI_ID ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).USE_AXI_ID=$(PARAM_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -76,22 +61,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GRAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -GRAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GRAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GRAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GUSE_AXI_ID=$(PARAM_USE_AXI_ID) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_pcie_rd/Makefile b/tb/dma_if_pcie_rd/Makefile index a86800005..506e506fa 100644 --- a/tb/dma_if_pcie_rd/Makefile +++ b/tb/dma_if_pcie_rd/Makefile @@ -56,26 +56,7 @@ export PARAM_CHECK_BUS_NUMBER ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) - COMPILE_ARGS += -P $(TOPLEVEL).CHECK_BUS_NUMBER=$(PARAM_CHECK_BUS_NUMBER) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -84,26 +65,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GRAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -GRAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GRAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GRAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) - COMPILE_ARGS += -GCHECK_BUS_NUMBER=$(PARAM_CHECK_BUS_NUMBER) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_pcie_us/Makefile b/tb/dma_if_pcie_us/Makefile index 789622648..6031b63b7 100644 --- a/tb/dma_if_pcie_us/Makefile +++ b/tb/dma_if_pcie_us/Makefile @@ -60,28 +60,7 @@ export PARAM_WRITE_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_FC_ENABLE=$(PARAM_READ_TX_FC_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_FC_ENABLE=$(PARAM_WRITE_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -90,28 +69,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GSEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GREAD_TX_FC_ENABLE=$(PARAM_READ_TX_FC_ENABLE) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GWRITE_TX_FC_ENABLE=$(PARAM_WRITE_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_pcie_us_rd/Makefile b/tb/dma_if_pcie_us_rd/Makefile index d72504a62..6d3ddd8b7 100644 --- a/tb/dma_if_pcie_us_rd/Makefile +++ b/tb/dma_if_pcie_us_rd/Makefile @@ -55,25 +55,7 @@ export PARAM_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -82,25 +64,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GSEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_pcie_us_wr/Makefile b/tb/dma_if_pcie_us_wr/Makefile index fb75ef7ca..ec0988213 100644 --- a/tb/dma_if_pcie_us_wr/Makefile +++ b/tb/dma_if_pcie_us_wr/Makefile @@ -53,23 +53,7 @@ export PARAM_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -78,23 +62,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_BE_WIDTH=$(PARAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GSEG_ADDR_WIDTH=$(PARAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/dma_if_pcie_wr/Makefile b/tb/dma_if_pcie_wr/Makefile index 4b3a292b6..15c04e40f 100644 --- a/tb/dma_if_pcie_wr/Makefile +++ b/tb/dma_if_pcie_wr/Makefile @@ -57,27 +57,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -86,27 +66,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GRAM_SEL_WIDTH=$(PARAM_RAM_SEL_WIDTH) - COMPILE_ARGS += -GRAM_ADDR_WIDTH=$(PARAM_RAM_ADDR_WIDTH) - COMPILE_ARGS += -GRAM_SEG_COUNT=$(PARAM_RAM_SEG_COUNT) - COMPILE_ARGS += -GRAM_SEG_DATA_WIDTH=$(PARAM_RAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GRAM_SEG_BE_WIDTH=$(PARAM_RAM_SEG_BE_WIDTH) - COMPILE_ARGS += -GRAM_SEG_ADDR_WIDTH=$(PARAM_RAM_SEG_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/irq_rate_limit/Makefile b/tb/irq_rate_limit/Makefile index 1b80fe0d1..02c2a97c5 100644 --- a/tb/irq_rate_limit/Makefile +++ b/tb/irq_rate_limit/Makefile @@ -37,7 +37,7 @@ export PARAM_IRQ_INDEX_WIDTH ?= 11 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).IRQ_INDEX_WIDTH=$(PARAM_IRQ_INDEX_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -46,7 +46,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GIRQ_INDEX_WIDTH=$(PARAM_IRQ_INDEX_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_axi_master/Makefile b/tb/pcie_axi_master/Makefile index 178462e2a..93af99288 100644 --- a/tb/pcie_axi_master/Makefile +++ b/tb/pcie_axi_master/Makefile @@ -51,16 +51,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -69,16 +60,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_axi_master_rd/Makefile b/tb/pcie_axi_master_rd/Makefile index b4dbe18ab..b8540619d 100644 --- a/tb/pcie_axi_master_rd/Makefile +++ b/tb/pcie_axi_master_rd/Makefile @@ -47,16 +47,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -65,16 +56,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_axi_master_wr/Makefile b/tb/pcie_axi_master_wr/Makefile index 138720c60..ae6df3c31 100644 --- a/tb/pcie_axi_master_wr/Makefile +++ b/tb/pcie_axi_master_wr/Makefile @@ -46,15 +46,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -63,15 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_axil_master/Makefile b/tb/pcie_axil_master/Makefile index 6effe54de..466cef93f 100644 --- a/tb/pcie_axil_master/Makefile +++ b/tb/pcie_axil_master/Makefile @@ -45,14 +45,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -61,14 +54,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GAXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -GAXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -GAXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_axil_master_minimal/Makefile b/tb/pcie_axil_master_minimal/Makefile index 753f94dce..72fb1a671 100644 --- a/tb/pcie_axil_master_minimal/Makefile +++ b/tb/pcie_axil_master_minimal/Makefile @@ -45,14 +45,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -61,14 +54,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GAXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -GAXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -GAXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_msix/Makefile b/tb/pcie_msix/Makefile index 4ff2926ac..4c8186547 100644 --- a/tb/pcie_msix/Makefile +++ b/tb/pcie_msix/Makefile @@ -45,15 +45,7 @@ export PARAM_TLP_FORCE_64_BIT_ADDR ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).IRQ_INDEX_WIDTH=$(PARAM_IRQ_INDEX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -62,15 +54,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GIRQ_INDEX_WIDTH=$(PARAM_IRQ_INDEX_WIDTH) - COMPILE_ARGS += -GAXIL_DATA_WIDTH=$(PARAM_AXIL_DATA_WIDTH) - COMPILE_ARGS += -GAXIL_ADDR_WIDTH=$(PARAM_AXIL_ADDR_WIDTH) - COMPILE_ARGS += -GAXIL_STRB_WIDTH=$(PARAM_AXIL_STRB_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_ptile_if/Makefile b/tb/pcie_ptile_if/Makefile index 7a51817e7..a6f377f8a 100644 --- a/tb/pcie_ptile_if/Makefile +++ b/tb/pcie_ptile_if/Makefile @@ -59,20 +59,7 @@ export PARAM_IO_BAR_INDEX ?= 3 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).VF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).F_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -81,20 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -GVF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -GF_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -GIO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_ptile_if_rx/Makefile b/tb/pcie_ptile_if_rx/Makefile index 8de92fabc..66f38bd1b 100644 --- a/tb/pcie_ptile_if_rx/Makefile +++ b/tb/pcie_ptile_if_rx/Makefile @@ -49,16 +49,7 @@ export PARAM_IO_BAR_INDEX ?= 3 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -67,16 +58,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GIO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_ptile_if_tx/Makefile b/tb/pcie_ptile_if_tx/Makefile index 0e087847a..9c1d22817 100644 --- a/tb/pcie_ptile_if_tx/Makefile +++ b/tb/pcie_ptile_if_tx/Makefile @@ -49,15 +49,7 @@ export PARAM_TX_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -66,15 +58,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_s10_if/Makefile b/tb/pcie_s10_if/Makefile index afca88272..65990edb8 100644 --- a/tb/pcie_s10_if/Makefile +++ b/tb/pcie_s10_if/Makefile @@ -62,21 +62,7 @@ export PARAM_MSI_COUNT ?= 32 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).L_TILE=$(PARAM_L_TILE) - COMPILE_ARGS += -P $(TOPLEVEL).PF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).VF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).F_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) - COMPILE_ARGS += -P $(TOPLEVEL).MSI_ENABLE=$(PARAM_MSI_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).MSI_COUNT=$(PARAM_MSI_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -85,21 +71,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GL_TILE=$(PARAM_L_TILE) - COMPILE_ARGS += -GPF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -GVF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -GF_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -GIO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) - COMPILE_ARGS += -GMSI_ENABLE=$(PARAM_MSI_ENABLE) - COMPILE_ARGS += -GMSI_COUNT=$(PARAM_MSI_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_s10_if_rx/Makefile b/tb/pcie_s10_if_rx/Makefile index 89a0e8bd1..c482190cf 100644 --- a/tb/pcie_s10_if_rx/Makefile +++ b/tb/pcie_s10_if_rx/Makefile @@ -47,14 +47,7 @@ export PARAM_IO_BAR_INDEX ?= 3 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -63,14 +56,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GIO_BAR_INDEX=$(PARAM_IO_BAR_INDEX) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_s10_if_tx/Makefile b/tb/pcie_s10_if_tx/Makefile index 267c3b04c..508e7cf50 100644 --- a/tb/pcie_s10_if_tx/Makefile +++ b/tb/pcie_s10_if_tx/Makefile @@ -46,13 +46,7 @@ export PARAM_TX_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -61,13 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_tlp_demux/Makefile b/tb/pcie_tlp_demux/Makefile index e4c217b66..22f9fdb1b 100644 --- a/tb/pcie_tlp_demux/Makefile +++ b/tb/pcie_tlp_demux/Makefile @@ -51,15 +51,7 @@ export PARAM_FIFO_WATERMARK ?= $(shell expr $(PARAM_FIFO_DEPTH) / 2 ) ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).OUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_ENABLE=$(PARAM_FIFO_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -68,15 +60,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GSEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GIN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -GOUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -GFIFO_ENABLE=$(PARAM_FIFO_ENABLE) - COMPILE_ARGS += -GFIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -GFIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_tlp_demux_bar/Makefile b/tb/pcie_tlp_demux_bar/Makefile index 7cccc48f6..e1f23ef17 100644 --- a/tb/pcie_tlp_demux_bar/Makefile +++ b/tb/pcie_tlp_demux_bar/Makefile @@ -55,18 +55,7 @@ export PARAM_BAR_IDS ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).OUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_ENABLE=$(PARAM_FIFO_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) - COMPILE_ARGS += -P $(TOPLEVEL).BAR_BASE=$(PARAM_BAR_BASE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR_STRIDE=$(PARAM_BAR_STRIDE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR_IDS=$(PARAM_BAR_IDS) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -75,18 +64,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GSEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GIN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -GOUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -GFIFO_ENABLE=$(PARAM_FIFO_ENABLE) - COMPILE_ARGS += -GFIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -GFIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) - COMPILE_ARGS += -GBAR_BASE=$(PARAM_BAR_BASE) - COMPILE_ARGS += -GBAR_STRIDE=$(PARAM_BAR_STRIDE) - COMPILE_ARGS += -GBAR_IDS=$(PARAM_BAR_IDS) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_tlp_fifo/Makefile b/tb/pcie_tlp_fifo/Makefile index e20602e9e..848a4be87 100644 --- a/tb/pcie_tlp_fifo/Makefile +++ b/tb/pcie_tlp_fifo/Makefile @@ -43,12 +43,7 @@ export PARAM_OUT_TLP_SEG_COUNT ?= $(PARAM_IN_TLP_SEG_COUNT) ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).DEPTH=$(PARAM_DEPTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).OUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -57,12 +52,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GDEPTH=$(PARAM_DEPTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GIN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -GOUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_tlp_fifo_mux/Makefile b/tb/pcie_tlp_fifo_mux/Makefile index b12bbdca2..a3491acb4 100644 --- a/tb/pcie_tlp_fifo_mux/Makefile +++ b/tb/pcie_tlp_fifo_mux/Makefile @@ -52,16 +52,7 @@ export PARAM_FIFO_WATERMARK ?= $(shell expr $(PARAM_FIFO_DEPTH) / 2 ) ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).IN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).OUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).ARB_TYPE_ROUND_ROBIN=$(PARAM_ARB_TYPE_ROUND_ROBIN) - COMPILE_ARGS += -P $(TOPLEVEL).ARB_LSB_HIGH_PRIORITY=$(PARAM_ARB_LSB_HIGH_PRIORITY) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -P $(TOPLEVEL).FIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -70,16 +61,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GSEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GIN_TLP_SEG_COUNT=$(PARAM_IN_TLP_SEG_COUNT) - COMPILE_ARGS += -GOUT_TLP_SEG_COUNT=$(PARAM_OUT_TLP_SEG_COUNT) - COMPILE_ARGS += -GARB_TYPE_ROUND_ROBIN=$(PARAM_ARB_TYPE_ROUND_ROBIN) - COMPILE_ARGS += -GARB_LSB_HIGH_PRIORITY=$(PARAM_ARB_LSB_HIGH_PRIORITY) - COMPILE_ARGS += -GFIFO_DEPTH=$(PARAM_FIFO_DEPTH) - COMPILE_ARGS += -GFIFO_WATERMARK=$(PARAM_FIFO_WATERMARK) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_tlp_mux/Makefile b/tb/pcie_tlp_mux/Makefile index 69c5fa582..0485b5b49 100644 --- a/tb/pcie_tlp_mux/Makefile +++ b/tb/pcie_tlp_mux/Makefile @@ -47,13 +47,7 @@ export PARAM_ARB_LSB_HIGH_PRIORITY ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).ARB_TYPE_ROUND_ROBIN=$(PARAM_ARB_TYPE_ROUND_ROBIN) - COMPILE_ARGS += -P $(TOPLEVEL).ARB_LSB_HIGH_PRIORITY=$(PARAM_ARB_LSB_HIGH_PRIORITY) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -62,13 +56,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GSEQ_NUM_WIDTH=$(PARAM_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GARB_TYPE_ROUND_ROBIN=$(PARAM_ARB_TYPE_ROUND_ROBIN) - COMPILE_ARGS += -GARB_LSB_HIGH_PRIORITY=$(PARAM_ARB_LSB_HIGH_PRIORITY) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_dma/Makefile b/tb/pcie_us_axi_dma/Makefile index 152ee67e2..ebc9beda9 100644 --- a/tb/pcie_us_axi_dma/Makefile +++ b/tb/pcie_us_axi_dma/Makefile @@ -59,27 +59,7 @@ export PARAM_WRITE_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_FC_ENABLE=$(PARAM_READ_TX_FC_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_FC_ENABLE=$(PARAM_WRITE_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -88,27 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GREAD_TX_FC_ENABLE=$(PARAM_READ_TX_FC_ENABLE) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GWRITE_TX_FC_ENABLE=$(PARAM_WRITE_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_dma_rd/Makefile b/tb/pcie_us_axi_dma_rd/Makefile index 50960c9de..cf49a5079 100644 --- a/tb/pcie_us_axi_dma_rd/Makefile +++ b/tb/pcie_us_axi_dma_rd/Makefile @@ -54,24 +54,7 @@ export PARAM_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -80,24 +63,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_dma_wr/Makefile b/tb/pcie_us_axi_dma_wr/Makefile index fb314a2a4..27f0f00e5 100644 --- a/tb/pcie_us_axi_dma_wr/Makefile +++ b/tb/pcie_us_axi_dma_wr/Makefile @@ -52,22 +52,7 @@ export PARAM_TX_FC_ENABLE ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).LEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).OP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).TX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -76,22 +61,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GAXIS_RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) - COMPILE_ARGS += -GPCIE_ADDR_WIDTH=$(PARAM_PCIE_ADDR_WIDTH) - COMPILE_ARGS += -GLEN_WIDTH=$(PARAM_LEN_WIDTH) - COMPILE_ARGS += -GTAG_WIDTH=$(PARAM_TAG_WIDTH) - COMPILE_ARGS += -GOP_TABLE_SIZE=$(PARAM_OP_TABLE_SIZE) - COMPILE_ARGS += -GTX_LIMIT=$(PARAM_TX_LIMIT) - COMPILE_ARGS += -GTX_FC_ENABLE=$(PARAM_TX_FC_ENABLE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_master/Makefile b/tb/pcie_us_axi_master/Makefile index 1f41d4278..33e47f09c 100644 --- a/tb/pcie_us_axi_master/Makefile +++ b/tb/pcie_us_axi_master/Makefile @@ -50,15 +50,7 @@ export PARAM_AXI_MAX_BURST_LEN ?= 256 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -67,15 +59,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_master_rd/Makefile b/tb/pcie_us_axi_master_rd/Makefile index c02218dcd..e1e26b18a 100644 --- a/tb/pcie_us_axi_master_rd/Makefile +++ b/tb/pcie_us_axi_master_rd/Makefile @@ -46,15 +46,7 @@ export PARAM_AXI_MAX_BURST_LEN ?= 256 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -63,15 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axi_master_wr/Makefile b/tb/pcie_us_axi_master_wr/Makefile index e20cbd09d..8a3199bc0 100644 --- a/tb/pcie_us_axi_master_wr/Makefile +++ b/tb/pcie_us_axi_master_wr/Makefile @@ -45,14 +45,7 @@ export PARAM_AXI_MAX_BURST_LEN ?= 256 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -61,14 +54,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH -Wno-CASEINCOMPLETE -Wno-UNOPT - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GAXI_ID_WIDTH=$(PARAM_AXI_ID_WIDTH) - COMPILE_ARGS += -GAXI_MAX_BURST_LEN=$(PARAM_AXI_MAX_BURST_LEN) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_axil_master/Makefile b/tb/pcie_us_axil_master/Makefile index e44298b85..466339c4e 100644 --- a/tb/pcie_us_axil_master/Makefile +++ b/tb/pcie_us_axil_master/Makefile @@ -45,14 +45,7 @@ export PARAM_ENABLE_PARITY ?= 0 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).ENABLE_PARITY=$(PARAM_ENABLE_PARITY) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -61,14 +54,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GAXI_DATA_WIDTH=$(PARAM_AXI_DATA_WIDTH) - COMPILE_ARGS += -GAXI_ADDR_WIDTH=$(PARAM_AXI_ADDR_WIDTH) - COMPILE_ARGS += -GAXI_STRB_WIDTH=$(PARAM_AXI_STRB_WIDTH) - COMPILE_ARGS += -GENABLE_PARITY=$(PARAM_ENABLE_PARITY) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_if/Makefile b/tb/pcie_us_if/Makefile index ed0b7dc26..3dceac9c6 100644 --- a/tb/pcie_us_if/Makefile +++ b/tb/pcie_us_if/Makefile @@ -72,32 +72,7 @@ export PARAM_MSI_COUNT ?= 32 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).VF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).F_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).READ_EXT_TAG_ENABLE=$(PARAM_READ_EXT_TAG_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_MAX_READ_REQ_SIZE=$(PARAM_READ_MAX_READ_REQ_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_MAX_PAYLOAD_SIZE=$(PARAM_READ_MAX_PAYLOAD_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).MSIX_ENABLE=$(PARAM_MSIX_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).MSI_ENABLE=$(PARAM_MSI_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).MSI_COUNT=$(PARAM_MSI_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -106,32 +81,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPF_COUNT=$(PARAM_PF_COUNT) - COMPILE_ARGS += -GVF_COUNT=$(PARAM_VF_COUNT) - COMPILE_ARGS += -GF_COUNT=$(PARAM_F_COUNT) - COMPILE_ARGS += -GREAD_EXT_TAG_ENABLE=$(PARAM_READ_EXT_TAG_ENABLE) - COMPILE_ARGS += -GREAD_MAX_READ_REQ_SIZE=$(PARAM_READ_MAX_READ_REQ_SIZE) - COMPILE_ARGS += -GREAD_MAX_PAYLOAD_SIZE=$(PARAM_READ_MAX_PAYLOAD_SIZE) - COMPILE_ARGS += -GMSIX_ENABLE=$(PARAM_MSIX_ENABLE) - COMPILE_ARGS += -GMSI_ENABLE=$(PARAM_MSI_ENABLE) - COMPILE_ARGS += -GMSI_COUNT=$(PARAM_MSI_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_if_cc/Makefile b/tb/pcie_us_if_cc/Makefile index 9f28f5594..19219cac5 100644 --- a/tb/pcie_us_if_cc/Makefile +++ b/tb/pcie_us_if_cc/Makefile @@ -46,14 +46,7 @@ export PARAM_TLP_SEG_COUNT ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -62,14 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_if_cq/Makefile b/tb/pcie_us_if_cq/Makefile index 65fc1f66f..77a987056 100644 --- a/tb/pcie_us_if_cq/Makefile +++ b/tb/pcie_us_if_cq/Makefile @@ -46,14 +46,7 @@ export PARAM_TLP_SEG_COUNT ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -62,14 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_if_rc/Makefile b/tb/pcie_us_if_rc/Makefile index 08d4a3d3b..61ecf35f7 100644 --- a/tb/pcie_us_if_rc/Makefile +++ b/tb/pcie_us_if_rc/Makefile @@ -46,14 +46,7 @@ export PARAM_TLP_SEG_COUNT ?= 1 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -62,14 +55,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/tb/pcie_us_if_rq/Makefile b/tb/pcie_us_if_rq/Makefile index b06d15425..80f0780d6 100644 --- a/tb/pcie_us_if_rq/Makefile +++ b/tb/pcie_us_if_rq/Makefile @@ -49,17 +49,7 @@ export PARAM_TX_SEQ_NUM_WIDTH ?= $(shell expr $(PARAM_RQ_SEQ_NUM_WIDTH) - 1 ) ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -68,17 +58,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst From 9c5c6e6edfb9af256203cd759cd4c7aea371b1a4 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 29 Jan 2023 22:56:53 -0800 Subject: [PATCH 5/5] Rework parameter handling in example design makefiles Signed-off-by: Alex Forencich --- example/520N_MX/fpga/tb/fpga_core/Makefile | 18 +------- .../ADM_PCIE_9V3/fpga/tb/fpga_core/Makefile | 34 +------------- .../fpga_axi/tb/fpga_core/Makefile | 16 +------ example/AU200/fpga/tb/fpga_core/Makefile | 34 +------------- example/AU200/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/AU250/fpga/tb/fpga_core/Makefile | 34 +------------- example/AU250/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/AU280/fpga/tb/fpga_core/Makefile | 34 +------------- example/AU280/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/AU50/fpga/tb/fpga_core/Makefile | 34 +------------- example/AU50/fpga_axi/tb/fpga_core/Makefile | 16 +------ .../DE10_Agilex/fpga/tb/fpga_core/Makefile | 22 +-------- example/ExaNIC_X10/fpga/tb/fpga_core/Makefile | 34 +------------- .../ExaNIC_X10/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/ExaNIC_X25/fpga/tb/fpga_core/Makefile | 34 +------------- .../ExaNIC_X25/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/S10DX_DK/fpga/tb/fpga_core/Makefile | 22 +-------- example/S10MX_DK/fpga/tb/fpga_core/Makefile | 18 +------- example/VCU108/fpga/tb/fpga_core/Makefile | 34 +------------- example/VCU108/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/VCU118/fpga/tb/fpga_core/Makefile | 34 +------------- example/VCU118/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/VCU1525/fpga/tb/fpga_core/Makefile | 34 +------------- .../VCU1525/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/ZCU106/fpga/tb/fpga_core/Makefile | 34 +------------- example/ZCU106/fpga_axi/tb/fpga_core/Makefile | 16 +------ example/common/tb/example_core_pcie/Makefile | 40 +--------------- .../tb/example_core_pcie_ptile/Makefile | 36 +-------------- .../common/tb/example_core_pcie_s10/Makefile | 34 +------------- .../common/tb/example_core_pcie_us/Makefile | 46 +------------------ example/fb2CG/fpga/tb/fpga_core/Makefile | 34 +------------- example/fb2CG/fpga_axi/tb/fpga_core/Makefile | 16 +------ 32 files changed, 64 insertions(+), 772 deletions(-) diff --git a/example/520N_MX/fpga/tb/fpga_core/Makefile b/example/520N_MX/fpga/tb/fpga_core/Makefile index bc24999c8..2bc1b9daa 100644 --- a/example/520N_MX/fpga/tb/fpga_core/Makefile +++ b/example/520N_MX/fpga/tb/fpga_core/Makefile @@ -70,14 +70,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -86,14 +79,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ADM_PCIE_9V3/fpga/tb/fpga_core/Makefile b/example/ADM_PCIE_9V3/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/ADM_PCIE_9V3/fpga/tb/fpga_core/Makefile +++ b/example/ADM_PCIE_9V3/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ADM_PCIE_9V3/fpga_axi/tb/fpga_core/Makefile b/example/ADM_PCIE_9V3/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/ADM_PCIE_9V3/fpga_axi/tb/fpga_core/Makefile +++ b/example/ADM_PCIE_9V3/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU200/fpga/tb/fpga_core/Makefile b/example/AU200/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/AU200/fpga/tb/fpga_core/Makefile +++ b/example/AU200/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU200/fpga_axi/tb/fpga_core/Makefile b/example/AU200/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/AU200/fpga_axi/tb/fpga_core/Makefile +++ b/example/AU200/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU250/fpga/tb/fpga_core/Makefile b/example/AU250/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/AU250/fpga/tb/fpga_core/Makefile +++ b/example/AU250/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU250/fpga_axi/tb/fpga_core/Makefile b/example/AU250/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/AU250/fpga_axi/tb/fpga_core/Makefile +++ b/example/AU250/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU280/fpga/tb/fpga_core/Makefile b/example/AU280/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/AU280/fpga/tb/fpga_core/Makefile +++ b/example/AU280/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU280/fpga_axi/tb/fpga_core/Makefile b/example/AU280/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/AU280/fpga_axi/tb/fpga_core/Makefile +++ b/example/AU280/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU50/fpga/tb/fpga_core/Makefile b/example/AU50/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/AU50/fpga/tb/fpga_core/Makefile +++ b/example/AU50/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/AU50/fpga_axi/tb/fpga_core/Makefile b/example/AU50/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/AU50/fpga_axi/tb/fpga_core/Makefile +++ b/example/AU50/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/DE10_Agilex/fpga/tb/fpga_core/Makefile b/example/DE10_Agilex/fpga/tb/fpga_core/Makefile index 75db1b738..20d9dc13a 100644 --- a/example/DE10_Agilex/fpga/tb/fpga_core/Makefile +++ b/example/DE10_Agilex/fpga/tb/fpga_core/Makefile @@ -73,16 +73,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -91,16 +82,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ExaNIC_X10/fpga/tb/fpga_core/Makefile b/example/ExaNIC_X10/fpga/tb/fpga_core/Makefile index e79f744fd..2a79fa692 100644 --- a/example/ExaNIC_X10/fpga/tb/fpga_core/Makefile +++ b/example/ExaNIC_X10/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ExaNIC_X10/fpga_axi/tb/fpga_core/Makefile b/example/ExaNIC_X10/fpga_axi/tb/fpga_core/Makefile index 0ab57e878..34789c492 100644 --- a/example/ExaNIC_X10/fpga_axi/tb/fpga_core/Makefile +++ b/example/ExaNIC_X10/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 4 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ExaNIC_X25/fpga/tb/fpga_core/Makefile b/example/ExaNIC_X25/fpga/tb/fpga_core/Makefile index bab91809c..8997ffca8 100644 --- a/example/ExaNIC_X25/fpga/tb/fpga_core/Makefile +++ b/example/ExaNIC_X25/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ExaNIC_X25/fpga_axi/tb/fpga_core/Makefile b/example/ExaNIC_X25/fpga_axi/tb/fpga_core/Makefile index c0f37fcea..c34cf28f9 100644 --- a/example/ExaNIC_X25/fpga_axi/tb/fpga_core/Makefile +++ b/example/ExaNIC_X25/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/S10DX_DK/fpga/tb/fpga_core/Makefile b/example/S10DX_DK/fpga/tb/fpga_core/Makefile index 75db1b738..20d9dc13a 100644 --- a/example/S10DX_DK/fpga/tb/fpga_core/Makefile +++ b/example/S10DX_DK/fpga/tb/fpga_core/Makefile @@ -73,16 +73,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -91,16 +82,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/S10MX_DK/fpga/tb/fpga_core/Makefile b/example/S10MX_DK/fpga/tb/fpga_core/Makefile index bc24999c8..2bc1b9daa 100644 --- a/example/S10MX_DK/fpga/tb/fpga_core/Makefile +++ b/example/S10MX_DK/fpga/tb/fpga_core/Makefile @@ -70,14 +70,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -86,14 +79,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU108/fpga/tb/fpga_core/Makefile b/example/VCU108/fpga/tb/fpga_core/Makefile index e79f744fd..2a79fa692 100644 --- a/example/VCU108/fpga/tb/fpga_core/Makefile +++ b/example/VCU108/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU108/fpga_axi/tb/fpga_core/Makefile b/example/VCU108/fpga_axi/tb/fpga_core/Makefile index 0ab57e878..34789c492 100644 --- a/example/VCU108/fpga_axi/tb/fpga_core/Makefile +++ b/example/VCU108/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 4 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU118/fpga/tb/fpga_core/Makefile b/example/VCU118/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/VCU118/fpga/tb/fpga_core/Makefile +++ b/example/VCU118/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU118/fpga_axi/tb/fpga_core/Makefile b/example/VCU118/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/VCU118/fpga_axi/tb/fpga_core/Makefile +++ b/example/VCU118/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU1525/fpga/tb/fpga_core/Makefile b/example/VCU1525/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/VCU1525/fpga/tb/fpga_core/Makefile +++ b/example/VCU1525/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/VCU1525/fpga_axi/tb/fpga_core/Makefile b/example/VCU1525/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/VCU1525/fpga_axi/tb/fpga_core/Makefile +++ b/example/VCU1525/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ZCU106/fpga/tb/fpga_core/Makefile b/example/ZCU106/fpga/tb/fpga_core/Makefile index e510da0ef..3261dc678 100644 --- a/example/ZCU106/fpga/tb/fpga_core/Makefile +++ b/example/ZCU106/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/ZCU106/fpga_axi/tb/fpga_core/Makefile b/example/ZCU106/fpga_axi/tb/fpga_core/Makefile index 37ae2d970..255624fd4 100644 --- a/example/ZCU106/fpga_axi/tb/fpga_core/Makefile +++ b/example/ZCU106/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/common/tb/example_core_pcie/Makefile b/example/common/tb/example_core_pcie/Makefile index 55242c742..aff109460 100644 --- a/example/common/tb/example_core_pcie/Makefile +++ b/example/common/tb/example_core_pcie/Makefile @@ -71,25 +71,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).TLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).TLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) - COMPILE_ARGS += -P $(TOPLEVEL).CHECK_BUS_NUMBER=$(PARAM_CHECK_BUS_NUMBER) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -98,25 +80,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GTLP_DATA_WIDTH=$(PARAM_TLP_DATA_WIDTH) - COMPILE_ARGS += -GTLP_STRB_WIDTH=$(PARAM_TLP_STRB_WIDTH) - COMPILE_ARGS += -GTLP_HDR_WIDTH=$(PARAM_TLP_HDR_WIDTH) - COMPILE_ARGS += -GTLP_SEG_COUNT=$(PARAM_TLP_SEG_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_COUNT=$(PARAM_TX_SEQ_NUM_COUNT) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GTLP_FORCE_64_BIT_ADDR=$(PARAM_TLP_FORCE_64_BIT_ADDR) - COMPILE_ARGS += -GCHECK_BUS_NUMBER=$(PARAM_CHECK_BUS_NUMBER) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/common/tb/example_core_pcie_ptile/Makefile b/example/common/tb/example_core_pcie_ptile/Makefile index 364e7d63f..514e9d63f 100644 --- a/example/common/tb/example_core_pcie_ptile/Makefile +++ b/example/common/tb/example_core_pcie_ptile/Makefile @@ -79,23 +79,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -104,23 +88,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GSEG_HDR_WIDTH=$(PARAM_SEG_HDR_WIDTH) - COMPILE_ARGS += -GSEG_PRFX_WIDTH=$(PARAM_SEG_PRFX_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/common/tb/example_core_pcie_s10/Makefile b/example/common/tb/example_core_pcie_s10/Makefile index 8e58bbef7..367cc8338 100644 --- a/example/common/tb/example_core_pcie_s10/Makefile +++ b/example/common/tb/example_core_pcie_s10/Makefile @@ -77,22 +77,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).SEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).SEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).TX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).L_TILE=$(PARAM_L_TILE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -101,22 +86,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GSEG_COUNT=$(PARAM_SEG_COUNT) - COMPILE_ARGS += -GSEG_DATA_WIDTH=$(PARAM_SEG_DATA_WIDTH) - COMPILE_ARGS += -GSEG_EMPTY_WIDTH=$(PARAM_SEG_EMPTY_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_WIDTH=$(PARAM_TX_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GTX_SEQ_NUM_ENABLE=$(PARAM_TX_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GL_TILE=$(PARAM_L_TILE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/common/tb/example_core_pcie_us/Makefile b/example/common/tb/example_core_pcie_us/Makefile index 2133a0c18..b1e686cbb 100644 --- a/example/common/tb/example_core_pcie_us/Makefile +++ b/example/common/tb/example_core_pcie_us/Makefile @@ -83,28 +83,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).IMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).READ_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).READ_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -P $(TOPLEVEL).WRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -113,28 +92,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GIMM_ENABLE=$(PARAM_IMM_ENABLE) - COMPILE_ARGS += -GIMM_WIDTH=$(PARAM_IMM_WIDTH) - COMPILE_ARGS += -GREAD_OP_TABLE_SIZE=$(PARAM_READ_OP_TABLE_SIZE) - COMPILE_ARGS += -GREAD_TX_LIMIT=$(PARAM_READ_TX_LIMIT) - COMPILE_ARGS += -GWRITE_OP_TABLE_SIZE=$(PARAM_WRITE_OP_TABLE_SIZE) - COMPILE_ARGS += -GWRITE_TX_LIMIT=$(PARAM_WRITE_TX_LIMIT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/fb2CG/fpga/tb/fpga_core/Makefile b/example/fb2CG/fpga/tb/fpga_core/Makefile index 0b43bd705..b825a9cbe 100644 --- a/example/fb2CG/fpga/tb/fpga_core/Makefile +++ b/example/fb2CG/fpga/tb/fpga_core/Makefile @@ -78,22 +78,7 @@ export PARAM_BAR4_APERTURE ?= 16 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).CC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -P $(TOPLEVEL).PCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -P $(TOPLEVEL).BAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -P $(TOPLEVEL).BAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -102,22 +87,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRC_STRADDLE=$(PARAM_RC_STRADDLE) - COMPILE_ARGS += -GRQ_STRADDLE=$(PARAM_RQ_STRADDLE) - COMPILE_ARGS += -GCQ_STRADDLE=$(PARAM_CQ_STRADDLE) - COMPILE_ARGS += -GCC_STRADDLE=$(PARAM_CC_STRADDLE) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_ENABLE=$(PARAM_RQ_SEQ_NUM_ENABLE) - COMPILE_ARGS += -GPCIE_TAG_COUNT=$(PARAM_PCIE_TAG_COUNT) - COMPILE_ARGS += -GBAR0_APERTURE=$(PARAM_BAR0_APERTURE) - COMPILE_ARGS += -GBAR2_APERTURE=$(PARAM_BAR2_APERTURE) - COMPILE_ARGS += -GBAR4_APERTURE=$(PARAM_BAR4_APERTURE) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst diff --git a/example/fb2CG/fpga_axi/tb/fpga_core/Makefile b/example/fb2CG/fpga_axi/tb/fpga_core/Makefile index faf89e167..d099c30a3 100644 --- a/example/fb2CG/fpga_axi/tb/fpga_core/Makefile +++ b/example/fb2CG/fpga_axi/tb/fpga_core/Makefile @@ -59,13 +59,7 @@ export PARAM_RQ_SEQ_NUM_WIDTH ?= 6 ifeq ($(SIM), icarus) PLUSARGS += -fst - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).AXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -P $(TOPLEVEL).RQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-P $(TOPLEVEL).$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) VERILOG_SOURCES += iverilog_dump.v @@ -74,13 +68,7 @@ ifeq ($(SIM), icarus) else ifeq ($(SIM), verilator) COMPILE_ARGS += -Wno-SELRANGE -Wno-WIDTH - COMPILE_ARGS += -GAXIS_PCIE_DATA_WIDTH=$(PARAM_AXIS_PCIE_DATA_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_KEEP_WIDTH=$(PARAM_AXIS_PCIE_KEEP_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RQ_USER_WIDTH=$(PARAM_AXIS_PCIE_RQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_RC_USER_WIDTH=$(PARAM_AXIS_PCIE_RC_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CQ_USER_WIDTH=$(PARAM_AXIS_PCIE_CQ_USER_WIDTH) - COMPILE_ARGS += -GAXIS_PCIE_CC_USER_WIDTH=$(PARAM_AXIS_PCIE_CC_USER_WIDTH) - COMPILE_ARGS += -GRQ_SEQ_NUM_WIDTH=$(PARAM_RQ_SEQ_NUM_WIDTH) + COMPILE_ARGS += $(foreach v,$(filter PARAM_%,$(.VARIABLES)),-G$(subst PARAM_,,$(v))=$($(v))) ifeq ($(WAVES), 1) COMPILE_ARGS += --trace-fst