From 91d0aaf8aebb1b44a8351e772ee543a5694615ad Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Wed, 30 Sep 2020 23:51:11 -0700 Subject: [PATCH] Fix bitstream config for VCU1525 --- fpga/mqnic/VCU1525/fpga_100g/fpga.xdc | 5 ++++- fpga/mqnic/VCU1525/fpga_10g/fpga.xdc | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc b/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc index d73aa3234..c29887600 100644 --- a/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc +++ b/fpga/mqnic/VCU1525/fpga_100g/fpga.xdc @@ -5,10 +5,13 @@ set_property CFGBVS GND [current_design] set_property CONFIG_VOLTAGE 1.8 [current_design] set_property BITSTREAM.GENERAL.COMPRESS true [current_design] -set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design] +set_property BITSTREAM.CONFIG.CONFIGFALLBACK ENABLE [current_design] +set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] +set_property BITSTREAM.CONFIG.CONFIGRATE 85.0 [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] +set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] # System clocks # 300 MHz (DDR 0) diff --git a/fpga/mqnic/VCU1525/fpga_10g/fpga.xdc b/fpga/mqnic/VCU1525/fpga_10g/fpga.xdc index 688a243d0..91f022bf2 100644 --- a/fpga/mqnic/VCU1525/fpga_10g/fpga.xdc +++ b/fpga/mqnic/VCU1525/fpga_10g/fpga.xdc @@ -5,10 +5,13 @@ set_property CFGBVS GND [current_design] set_property CONFIG_VOLTAGE 1.8 [current_design] set_property BITSTREAM.GENERAL.COMPRESS true [current_design] -set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design] +set_property BITSTREAM.CONFIG.CONFIGFALLBACK ENABLE [current_design] +set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design] +set_property BITSTREAM.CONFIG.CONFIGRATE 85.0 [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design] +set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design] # System clocks # 300 MHz (DDR 0)